Electromigration Analysis of Solder Joints for Power Modules Using an Electrical-Thermal-Stress-Atomic Coupled Model

2021 ◽  
Author(s):  
Mitsuaki Kato ◽  
Takahiro Omori ◽  
Akihiro Goryu ◽  
Tomoya Fumikura ◽  
Kenji Hirohata

Abstract Numerical analysis of electromigration in solder joints has mainly examined ball grid arrays (BGAs) in flip-chip packages, and few numerical study has been reported on solder joints in power modules. This report describes an electromigration analysis of solder joints for power modules with a Si-based power device, which are still widely used today, using an electrical-thermal-stress-atomic coupled analysis. To evaluate electromigration, a solder joint with a power device and a substrate as used in power modules was simulated. Due to current crowding, the current density at the edge of the solder joint exceeded the electromigration threshold even in Si-based power modules. Unlike general electromigration phenomena, the vacancy concentration increased at the center and decreased at the edges of the solder joint, regardless of whether it was on the cathode side or anode side. The vacancy concentration clearly increased with increasing current density and size ratio. Creep strain increased significantly with increasing current density, temperature, and size ratio. The largest change in vacancy concentration and creep strain was at the anode edge where current crowding occurred. In addition, we modeled the two-dimensional behavior of metal atoms passing through the interface of the solder joint. The expansion of intermetallic compound was accelerated by increasing the temperature and current density.

Author(s):  
Mitsuaki Kato ◽  
Takahiro Omori ◽  
Akihiro Goryu ◽  
Tomoya Fumikura ◽  
Kenji Hirohata

Abstract Power modules are being developed to increase power output. The larger current densities accompanying increased power output are expected to degrade solder joints in power modules by electromigration. In previous research, numerical analysis of solder for electromigration has mainly examined ball grid arrays in flip-chip packages in which many solder balls are bonded under the semiconductor device. However, in a power module, a single solder joint is uniformly bonded under the power device. Because of this difference in geometric shape, the effect of electromigration in the solder of power modules may be significantly different from that in the solder of flip chips packages. This report describes an electromigration analysis of solder joints for power modules using an electrical-thermal-stress coupled analysis. First, we validate our numerical implementation and show that it can reproduce the vacancy concentrations and hydrostatic stress almost the same as the analytical solutions. We then simulate a single solder joint to evaluate electromigration in a solder joint in a power module. Once inelastic strain appears, the rate of increase in vacancy concentration slows, while the inelastic strain continuously increases. This phenomenon demonstrates that elastic-plastic-creep analysis is crucial for electromigration analysis of solder joints in power modules. Next, the solder joint with a power device and a substrate as used in power modules was simulated. Plasticity-creep and longitudinal gradient generated by current crowding have a strong effect on significantly reducing the vacancy concentration at the anode edge over a long period of time.


Author(s):  
Mitsuaki Kato ◽  
Takahiro Omori ◽  
Akihiro Goryu ◽  
Tomoya Fumikura ◽  
Kenji Hirohata

Abstract Power modules are being developed with the aim of increasing power output. Achieving this aim requires increased current density in power modules. However, at high current densities, power modules can degrade as a result of electromigration, which is a phenomenon where atoms move due to momentum transfer between conducting electrons and metal atoms. In addition, atoms are also moved by mechanical stress gradients and temperature gradients, so it is necessary to consider the combined effects of electrical, thermal, and mechanical stress. This report describes an electromigration analysis of solder joints for power modules. First, we validated our numerical implementation and showed that it could reproduce the distributions of vacancy concentrations and hydrostatic stress that were almost the same as those in previous studies. We then describe the effects of electromigration in a single solder joint. Due to the appearance of plastic and creep strains, the rate of increase in vacancy concentration was very slow and inelastic strain grew at an increasing rate. This result indicates that inelastic properties may strongly affect electromigration-induced degradation. Next, we present results for the solder joint with a SiC device and substrate. A current crowding appeared at the edge of the solder joint, and a vacancy concentration gradient was generated in not only the thickness direction but also the longitudinal direction. The absolute value of vacancy concentration increased significantly at the edge and did not reach a steady state even after a long time. These results indicate that peripheral components may strongly affect the electromigration-induced degradation. In addition, we modeled the behavior of metal atoms passing through the interface of the solder joint and simulated the growth of the intermetallic layer by electromigration.


2021 ◽  
Author(s):  
Mitsuaki Kato ◽  
Takahiro Omori ◽  
Akihiro Goryu ◽  
Tomoya Fumikura ◽  
Kenji Hirohata

2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Yanruoyue Li ◽  
Guicui Fu ◽  
Bo Wan ◽  
Zhaoxi Wu ◽  
Xiaojun Yan ◽  
...  

Purpose The purpose of this study is to investigate the effect of electrical and thermal stresses on the void formation of the Sn3.0Ag0.5Cu (SAC305) lead-free ball grid array (BGA) solder joints and to propose a modified mean-time-to-failure (MTTF) equation when joints are subjected to coupling stress. Design/methodology/approach The samples of the BGA package were subjected to a migration test at different currents and temperatures. Voltage variation was recorded for analysis. Scanning electron microscope and electron back-scattered diffraction were applied to achieve the micromorphological observations. Additionally, the experimental and simulation results were combined to fit the modified model parameters. Findings Voids appeared at the corner of the cathode. The resistance of the daisy chain increased. Two stages of resistance variation were confirmed. The crystal lattice orientation rotated and became consistent and ordered. Electrical and thermal stresses had an impact on the void formation. As the current density and temperature increased, the void increased. The lifetime of the solder joint decreased as the electrical and thermal stresses increased. A modified MTTF model was proposed and its parameters were confirmed by theoretical derivation and test data fitting. Originality/value This study focuses on the effects of coupling stress on the void formation of the SAC305 BGA solder joint. The microstructure and macroscopic performance were studied to identify the effects of different stresses with the use of a variety of analytical methods. The modified MTTF model was constructed for application to SAC305 BGA solder joints. It was found suitable for larger current densities and larger influences of Joule heating and for the welding ball structure with current crowding.


1999 ◽  
Vol 123 (2) ◽  
pp. 127-131 ◽  
Author(s):  
Kuo-Ning Chiang ◽  
Chang-Ming Liu

As electronic packaging technology moving to the CSP, wafer level packaging, fine pitch BGA (ball grid array) and high density interconnections, the wireability of the PCB/substrate and soldering technology are as important as reliability issues. In this work, a comparison of elliptical/round pads of area array type packages has been studied for soldering, reliability, and wireability requirements. The objective of this research is to develop numerical models for predicting reflow shapes of solder joint under elliptical/round pad boundary conditions and to study the reliability issue of the solder joint. In addition, a three-dimensional solder liquid formation model is developed for predicting the geometry, the restoring force, the wireability, and the reliability of solder joints in an area array type interconnections (e.g., ball grid array, flip chip) under elliptical and round pad configurations. In general, the reliability of the solder joints is highly dependent on the thermal-mechanical behaviors of the solder and the geometry configuration of the solder ball. These reliability factors include standoff height/contact angle of the solder joint, and the geometry layout/material properties of the package. An optimized solder pad design cannot only lead to a good reliability life of the solder joint but also can achieve a better wireability of the substrate. Furthermore, the solder reflow simulation used in this study is based on an energy minimization engine called Surface Evolver and the finite element software ABAQUS is used for thermal stress/strain nonlinear analysis.


2021 ◽  
Author(s):  
Imtiaz Ahmed Shaik

Currently in the electronics industry there is a desire to increase component reliability. Fatigue failure in solder joints is an important design consideration for electronic packaging. In through-hole components, fatigue failure of leads has been observed to antecede fatigue failure of solder joints. The main objective of the study for a solder joint in a plated-through-hole bearing the pin during the temperature cycle was to ascertain the thermo mechanical behavior and the dominant deformation mode. The Digital Speckle Correlation (DSC) technique, which is a computer vision technique, was applied for the measurement of solder joint deforamtion for a prescribed outlined temperature and time. The dimensions for the area of the solder joint under study were 21 by 21 um, located at the centre of the hole. And computation of averaged shear strains at 6 data points for this area was done. R Darveaux's constitutive model was applied for the data analysis such as the solder joint yields stress with respect to the time and temperature. On achieving the stress solution, the measured total strains were partitioned into elastic, plastic and creep terms separately and hence the creep strain was evaluated. From the analysis, it was found that the dominant deformation mode was shear deformation due to mismatch of coefficient of thermal expansion between pin and copper plating material of through-hole under thermal loading. And the dominant deformation mechanism was creep strain while stress started to relax at the end of ramp up and continued throughout the test and creep strain rate decreased during high temperature dwell. In Addition, the elastic strain was dominating during the initial stage of thermal cycle but later it was neglibible when compared to creep strain.


2021 ◽  
Author(s):  
Imtiaz Ahmed Shaik

Currently in the electronics industry there is a desire to increase component reliability. Fatigue failure in solder joints is an important design consideration for electronic packaging. In through-hole components, fatigue failure of leads has been observed to antecede fatigue failure of solder joints. The main objective of the study for a solder joint in a plated-through-hole bearing the pin during the temperature cycle was to ascertain the thermo mechanical behavior and the dominant deformation mode. The Digital Speckle Correlation (DSC) technique, which is a computer vision technique, was applied for the measurement of solder joint deforamtion for a prescribed outlined temperature and time. The dimensions for the area of the solder joint under study were 21 by 21 um, located at the centre of the hole. And computation of averaged shear strains at 6 data points for this area was done. R Darveaux's constitutive model was applied for the data analysis such as the solder joint yields stress with respect to the time and temperature. On achieving the stress solution, the measured total strains were partitioned into elastic, plastic and creep terms separately and hence the creep strain was evaluated. From the analysis, it was found that the dominant deformation mode was shear deformation due to mismatch of coefficient of thermal expansion between pin and copper plating material of through-hole under thermal loading. And the dominant deformation mechanism was creep strain while stress started to relax at the end of ramp up and continued throughout the test and creep strain rate decreased during high temperature dwell. In Addition, the elastic strain was dominating during the initial stage of thermal cycle but later it was neglibible when compared to creep strain.


2010 ◽  
Vol 2010 (1) ◽  
pp. 000766-000770 ◽  
Author(s):  
Mary Liu ◽  
Wusheng Yin

In order to meet the demand of fine pitch and 3D package, and eliminate complex underfilling process, a first solder joint encapsulant has been invented. Solder joint encapsulant adhesive is to encapsulate each individual solder joint using polymer to enhance solder joint, and leave empty space in-between solder joints to avoid thermal stress applied onto solder joints. Now two kinds of solder joint encapsulants are SMT256 and SMT266, which have been used in the customer field. Using solder joint encapsulants – SMT256 and SMT266, the pull strength of solder joint has been increased by about five times, resulting in significant increase in the reliability. In this paper more details have been investigated.


2012 ◽  
Vol 2012 (1) ◽  
pp. 001038-001045 ◽  
Author(s):  
Sheng-Tsai Wu ◽  
John H. Lau ◽  
Heng-Chieh Chien ◽  
Yu-Lin Chao ◽  
Ra-Min Tain ◽  
...  

In this study, the nonlinear thermal stress distributions at the Cu-low-k pads of Moore's law chips and creep strain energy density per cycle at the solder joints of a 3D IC integration system-in-package (SiP) are investigated. At the same time, the warpage of the TSV interposer and reliability assessment of solder joints in the architecture is examined. The analyzed structure comprises one PCB (printed circuit board), one BT (bismaleimide triazene) substrate, one interposer with through silicon vias (TSVs), two DRAM (dynamic random access memory) chips and one high power ASIC (application specific integrated circuit) chip. The high power chip and DRAM chips are supported, respectively on the top-side and bottom-side of the Cu-filled TSV interposer.


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