Microsensors for physical signals: Principles, device design, and fabrication technologies

1996 ◽  
Vol 74 (S1) ◽  
pp. 115-130 ◽  
Author(s):  
Arokia Nathan
Keyword(s):  
Integrated Circuit ◽  
Computer Aided Design ◽  
Electrical Signal ◽  
Single Chip ◽  
Research Activity ◽  
Rapid Pace ◽  
Silicon Based ◽  
Aided Design ◽  
New Generation ◽  
Physical And Chemical

Microsensors are miniaturized devices, fabricated using silicon-based and related technologies, that convert input physical and chemical signals into an output electrical signal. The key driving force in microsensor research has been the integrated circuit (IC) and micromachining technologies. The latter, in particular, is fueling tremendous activity in micro-electromechanical systems (MEMS). In terms of technology and design tools, MEMS is at a stage where microelectronics was 30 years ago and is expected to evolve at an equally rapid pace. The synergy between the IC, micromachining, and integrated photonics technologies can potentially spawn a new generation of microsystems that will feature a unique marriage of microsensor, signal-conditioning and -processing circuitry, micromechanics, and optomechanics possibly on a single chip. In this paper, the physical transduction principles, materials considerations, process-fabrication technologies, and computer-aided-design (CAD) tools will be reviewed along with pertinent examples drawn from our microsensor research activity at the Microelectronics Laboratory, University of Waterloo.

scholarly journals A Review on Terahertz Technologies Accelerated by Silicon Photonics

Nanomaterials ◽  
2021 ◽  
Vol 11 (7) ◽  
pp. 1646
Author(s):  
Jingya Xie ◽  
Wangcheng Ye ◽  
Linjie Zhou ◽  
Xuguang Guo ◽  
Xiaofei Zang ◽  
...  
Keyword(s):  
Integrated Circuit ◽  
Silicon Photonics ◽  
Large Scale ◽  
Cost Effective ◽  
Single Chip ◽  
Photonic Integrated Circuit ◽  
Hybrid Silicon ◽  
The Cost ◽  
Silicon Based ◽  
Thz Applications

In the last couple of decades, terahertz (THz) technologies, which lie in the frequency gap between the infrared and microwaves, have been greatly enhanced and investigated due to possible opportunities in a plethora of THz applications, such as imaging, security, and wireless communications. Photonics has led the way to the generation, modulation, and detection of THz waves such as the photomixing technique. In tandem with these investigations, researchers have been exploring ways to use silicon photonics technologies for THz applications to leverage the cost-effective large-scale fabrication and integration opportunities that it would enable. Although silicon photonics has enabled the implementation of a large number of optical components for practical use, for THz integrated systems, we still face several challenges associated with high-quality hybrid silicon lasers, conversion efficiency, device integration, and fabrication. This paper provides an overview of recent progress in THz technologies based on silicon photonics or hybrid silicon photonics, including THz generation, detection, phase modulation, intensity modulation, and passive components. As silicon-based electronic and photonic circuits are further approaching THz frequencies, one single chip with electronics, photonics, and THz functions seems inevitable, resulting in the ultimate dream of a THz electronic–photonic integrated circuit.

APPROACHES FOR THE DEVELOPMENT OF FOR AUTOMATED DESIGN AND SIMULATION OF ONBOARD NETWORKS

2021 ◽  
Vol 4 (30) ◽  
pp. 76-86
Author(s):  
V. L. Olenev ◽  
◽  
A. V. Shakhomirov ◽  
Keyword(s):  
Computer Aided Design ◽  
Aerospace Industry ◽  
Automated Design ◽  
Software Product ◽  
Computer Aided ◽  
Aided Design ◽  
New Generation ◽  
New Industry ◽  
Board Networks ◽  
Development Prospects

The article presents an analysis of the development prospects for the aerospace industry in relation to on-board systems and new-generation networks. It also presents the approaches for developing the SANDS software, intended for computer-aided design and simulation of on-board networks. Various approaches are described that will allow the existing software product to be refined and updated to meet new industry demands.

Up Close: The Interuniversity Microelectronics Center (IMEC), Leuven, Belgium

MRS Bulletin ◽  
1989 ◽  
Vol 14 (6) ◽  
pp. 35-38 ◽  
Author(s):  
Dirk Denoyelle
Keyword(s):  
Integrated Circuit ◽  
Computer Aided Design ◽  
Systems Design ◽  
System Level ◽  
Clean Room ◽  
Integrated Circuit Design ◽  
Processing Technologies ◽  
Wide Range ◽  
Application Specific Integrated Circuit ◽  
Aided Design

The Interuniversity Microelectronics Center, Leuven, Belgium (IMEC) is one of the world's largest independent research centers for microelectronics. It was established in 1984 by the Flemish government as a part of a comprehensive program to promote high technology in Flanders, Belgium. Benefiting from existing experience available mainly at the University of Leuven, IMEC moved into its present facilities in 1986 (Figure 1).The Center covers a wide range of research topics in the microelectronics domain—VLSI systems design methodologies, advanced semiconductor processing, materials, packaging, and more.About 50 people work on computer-aided design, developing a series of “true” silicon compilers: CATHEDRAL. With this software, ASIC (application specific integrated circuit) design becomes extremely attractive, since CATHEDRAL covers design from the high system level down to layout.INVOMEC, the training division of IMEC, supports universities in ASIC design. It trains people for both educational institutes and industry in chip design, makes available the necessary software, and has a well-established Multi Project Chip—Multi Project Wafer service.The Processing Technologies and Materials Divisions involve about 200 people and have a 3,600 m2 clean room at their disposal. The clean room consists of a 20% class 10 area with a fast-turnaround prototyping line and an 80% class 1000 area.IMEC's objectives are: to perform research in the microelectronics field, supporting both industry and universities, and to stimulate the microelectronics industry in Flanders.IMEC performs research on both silicon and III-V technologies.

Computer Aided Design of Auto-Location Head-Controlled Talking Machine for Visually Impaired People with Multiple Disabilities

2014 ◽  
Vol 615 ◽  
pp. 7-10
Author(s):  
Fung Huei Yeh ◽  
Huoy Shyi Tsay ◽  
Chung Chieh Yang
Keyword(s):  
Computer Aided Design ◽  
Visually Impaired ◽  
Multiple Disabilities ◽  
Single Chip ◽  
Usb Interface ◽  
Visually Impaired People ◽  
Impaired People ◽  
Computer Aided ◽  
Aided Design ◽  
Location Function

In this paper, the auto-location head-controlled talking machine has been carried out using computer aided design to solve the problem of communication with the outside world for the visually impaired people with multiple disabilities. The talking machine makes use of the infrared ray sensors to receive the signals launched by shaking the infrared ray emitter on their heads. The communication functions of Pinyin, associating Chinese character, debugging error are processed based on the single chip processor 89C52. Then the signals are transmitted into a personal computer through the RS-232 or USB interface. The pronounced software of head-controlled talking machine is created using text-to-speech system to achieve the communication with other people. This study also develops auto-location function by the CCD tracing module to adjust the infrared ray sensor and increase the accuracy of the head-controlled talking machine. The results of this study can improve the ability of communication for visually impaired people with multiple disabilities.

scholarly journals Design and Investigation of the Junction-Less TFET with Ge/Si0.3Ge0.7/Si Heterojunction and Heterogeneous Gate Dielectric

Electronics ◽  
2019 ◽  
Vol 8 (5) ◽  
pp. 476 ◽  
Author(s):  
Tao Han ◽  
Hongxia Liu ◽  
Shulong Wang ◽  
Shupeng Chen ◽  
Wei Li ◽  
...  
Keyword(s):  
Integrated Circuit ◽  
Computer Aided Design ◽  
Gate Dielectric ◽  
Dielectric Material ◽  
Source Region ◽  
Ultra Low Power ◽  
Narrow Bandgap ◽  
Order Of Magnitude ◽  
Drain Region ◽  
Aided Design

To improve the on-state current and reduce the miller capacitance of the conventional junction-less tunneling field effect transistor (JLTFET), the junction-less TFET with Ge/Si0.3Ge0.7/Si heterojunction and heterogeneous gate dielectric (H-JLTFET) is investigated by the Technology Computer Aided Design (TCAD) simulation in this paper. The source region uses the narrow bandgap semiconductor material germanium to obtain the higher on-state current; the gate dielectric adjacent to the drain region adopts the low-k dielectric material SiO2, which is considered to reduce the gate-to-drain capacitance effectively. Moreover, the gap region uses the Si0.3Ge0.7 material to decrease the tunneling distance. In addition, the effects of the device sizes, doping concentration and work function on the performance of the H-JLTFET are analyzed systematically. The optimal on-state current and switching ratio of the H-JLTFET can reach 6 µA/µm and 2.6 × 1012, which are one order of magnitude and four orders of magnitude larger than the conventional JLTFET, respectively. Meanwhile, the gate-to-drain capacitance, off-state current and power consumption of the H-JLTFET can be effectively suppressed, so it will have a great potential in future ultra-low power integrated circuit applications.

scholarly journals Circuit Simulation Considering Electrical Coupling in Monolithic 3D Logics with Junctionless FETs

Micromachines ◽  
2020 ◽  
Vol 11 (10) ◽  
pp. 887
Author(s):  
Tae Jun Ahn ◽  
Yun Seop Yu
Keyword(s):  
Integrated Circuit ◽  
Computer Aided Design ◽  
Circuit Simulation ◽  
Electrical Coupling ◽  
Ring Oscillator ◽  
Model Parameters ◽  
Flip Flop ◽  
Circuit Simulator ◽  
Aided Design ◽  
Better Than

The junctionless field-effect transistor (JLFET) compact model using the model parameters extracted from the LETI-UTSOI (version 2.1) model was proposed to perform circuit simulation considering the electrical coupling between the stacked JLFETs of a monolithic 3D integrated circuit (M3DIC) composed of JLFETs (M3DIC-JLFET). We validated the model by extracting the model parameters and comparing the simulation results of the technology computer-aided design and the Synopsys HSPICE circuit simulator. The performance of the M3DIC-JLFET was compared with that of the M3DIC composed of MOSFETs (M3DIC-MOSFET). The performance of a fan-out-3 ring oscillator with M3DIC-JLFET varied by less than 3% compared to that with M3DIC-MOSFET. The performances of ring oscillators of M3DIC-JLFET and M3DIC-MOSFET were almost the same. We simulated the performances of M3DICs such as an inverter, a NAND, a NOR, a 2 × 1 multiplexer, and a D flip-flop. The overall performance of the M3DIC-MOSFET was slightly better than that of the M3DIC-JLFET.

Computer-Aided Design and Applications of Planar Branch-Line Coupler Circuits

2020 ◽  
pp. 1-63
Author(s):  
Kok Yeow You ◽  
Nadera Najib Al-Areqi ◽  
Chia Yew Lee ◽  
Yeng Seng Lee
Keyword(s):  
Integrated Circuit ◽  
Computer Aided Design ◽  
Power Measurement ◽  
Design Guideline ◽  
Analytical Analysis ◽  
Branch Line ◽  
Initial Design ◽  
Mode Decomposition ◽  
Aided Design

This book chapter mainly focuses on analytical analysis for the branch-line coupler in which this method provides an explicit solution in the coupler design. Generally, the directional coupler is one of the fundamental components for Microwave Integrated Circuit (MIC), especially the equal power-split coupler that is used for signal monitoring, power measurement, power division, and balanced-type components such as balanced mixers. In this chapter, several applications of the branch-line coupler are also described. The analytical and design formulations of the coupler are derived based on ABCD matrix, transmission line principle, and even-odd mode decomposition. Although the simple analytical analysis is not sufficiently implemented in complex coupler structure, it is capable of providing an initial design guideline for the coupler dimensions. The initial design of the coupler dimensions based on analytical analysis can be gradually modified and optimized to achieve the desired size or performance of the coupler using advanced numerical simulation.

Fast and Accurate Fault Localization Through Effective Use of Design Schematics

2019 ◽  
Author(s):  
Ankush Oberai ◽  
Rupa Kamoji ◽  
Arpan Bhattacherjee
Keyword(s):  
Integrated Circuit ◽  
Computer Aided Design ◽  
Fault Localization ◽  
Ic Design ◽  
Design Data ◽  
Root Cause ◽  
Effective Use ◽  
Aided Design ◽  
Improved Accuracy ◽  
Physical Layout

Abstract In modern-day semiconductor failure analysis (FA), the need for computer-aided design (CAD) has extended beyond the sole physical layout to a much larger scope of integrated circuit (IC) design data, such as the source schematic and netlist. Due to the improved accuracy of predicted failures reported by test and diagnosis tools, it has become virtually mandatory to correlate the potential failing schematic features (e.g., nets and instances) to their corresponding location on the physical-CAD layout and actual device under test (DUT). This paper covers the latest advancements of utilizing IC design schematics for fast and accurate fault localization; along with some of the most-effective methodologies for efficient root-cause analysis.

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