CMOS Based Ovonic Threshold Switching Emulation Circuitry

2020 ◽  
Vol 20 (8) ◽  
pp. 4977-4979
Author(s):  
Jun Young Kweon ◽  
Yun-Heup Song
Keyword(s):  
Circuit Simulation ◽  
Cmos Technology ◽  
Current Level ◽  
Current Generator ◽  
Switching Device ◽  
Threshold Switching ◽  
Threshold Switch ◽  
Output Driver ◽  
Device Research

Ovonic Threshold Switch (OTS) device is most popular switching device in PRAM. There are many OTS device research; however, it is hard to make reasonable OTS device which uses a circuit simulation and real device. In this work, we studied the OTS device emulation circuit, which can follow OTS characteristic, especially snapback current using 0.18 μm CMOS technology. This circuitry composes snapback current generator, cut off switch and output driver. Snapback current generator can make the current level up to 300 μA.

Threshold Energy Switching and Its Application to Wireless Sensing in High Energy Manufacturing Processes

2002 ◽  
Author(s):  
Charles B. Theurer ◽  
Li Zhang ◽  
David O. Kazmer ◽  
Robert X. Gao
Keyword(s):  
Pressure Sensor ◽  
Pressure Measurement ◽  
Circuit Simulation ◽  
Signal Transmission ◽  
Threshold Energy ◽  
Relaxation Oscillator ◽  
High Energy ◽  
Switching Device ◽  
Threshold Switching

A solid state threshold energy switching device based on a relaxation oscillator is discussed in the context of a self energizing wireless pressure sensor. The study is an integral part of the design of a wireless pressure sensor for in-situ injection molding machine cavity pressure measurement and real time process control. The pressure information is measured using a piezoelectric stack and converted to a train of ultrasonic pulses, using the oscillator based threshold switching device, to a receiver outside of the mold. In this paper the threshold switching device is developed, simulated using a circuit simulation program, and validated experimentally. Its properties are discussed with reference to pressure measurement and acoustic signal transmission.

scholarly journals Steep-slope field-effect transistors with AlGaN/GaN HEMT and oxide-based threshold switching device

2019 ◽  
Vol 30 (21) ◽  
pp. 215201 ◽  
Author(s):  
Xuanqi Huang ◽  
Runchen Fang ◽  
Chen Yang ◽  
Kai Fu ◽  
Houqiang Fu ◽  
...  
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Steep Slope ◽  
Switching Device ◽  
Gan Hemt ◽  
Threshold Switching

CMOS-MEMS Based Current Mirror MOSFET Embedded Pressure Sensor for Healthcare and Biomedical Applications

2013 ◽  
Vol 647 ◽  
pp. 315-320 ◽  
Author(s):  
Pradeep Kumar Rathore ◽  
Brishbhan Singh Panwar
Keyword(s):  
Pressure Sensor ◽  
Biomedical Applications ◽  
Circuit Simulation ◽  
Applied Pressure ◽  
Pressure Sensors ◽  
Cmos Technology ◽  
Current Mirror ◽  
Sensing Element ◽  
Pressure Sensing ◽  
Cmos Mems

This paper reports on the design and optimization of current mirror MOSFET embedded pressure sensor. A current mirror circuit with an output current of 1 mA integrated with a pressure sensing n-channel MOSFET has been designed using standard 5 µm CMOS technology. The channel region of the pressure sensing MOSFET forms the flexible diaphragm as well as the strain sensing element. The piezoresistive effect in MOSFET has been exploited for the calculation of strain induced carrier mobility variation. The output transistor of the current mirror forms the active pressure sensing MOSFET which produces a change in its drain current as a result of altered channel mobility under externally applied pressure. COMSOL Multiphysics is utilized for the simulation of pressure sensing structure and Tspice is employed to evaluate the characteristics of the current mirror pressure sensing circuit. Simulation results show that the pressure sensor has a sensitivity of 10.01 mV/MPa. The sensing structure has been optimized through simulation for enhancing the sensor sensitivity to 276.65 mV/MPa. These CMOS-MEMS based pressure sensors integrated with signal processing circuitry on the same chip can be used for healthcare and biomedical applications.

scholarly journals Design of an Ultra-Low Voltage Bias Current Generator Highly Immune to Electromagnetic Interference

2021 ◽  
Vol 11 (1) ◽  
pp. 6
Author(s):  
Orazio Aiello
Keyword(s):  
Integrated Circuits ◽  
Electromagnetic Interference ◽  
Low Voltage ◽  
Current Source ◽  
Building Blocks ◽  
Cmos Technology ◽  
Threshold Region ◽  
Output Current ◽  
Current Generator ◽  
Technology Process

The paper deals with the immunity to Electromagnetic Interference (EMI) of the current source for Ultra-Low-Voltage Integrated Circuits (ICs). Based on the properties of IC building blocks, such as the current-splitter and current correlator, a novel current generator is conceived. The proposed solution is suitable to provide currents to ICs operating in the sub-threshold region even in the presence of an electromagnetic polluted environment. The immunity to EMI of the proposed solution is compared with that of a conventional current mirror and evaluated by analytic means and with reference to the 180 nm CMOS technology process. The analysis highlights how the proposed solution generates currents down to nano-ampere intrinsically robust to the Radio Frequency (RF) interference affecting the input of the current generator, differently to what happens to the output current of a conventional mirror under the same conditions.

An Offset Reduction Technique for Latch Type Sense Amplifier in High Performance and High Density SRAM

2012 ◽  
Vol 542-543 ◽  
pp. 769-774
Author(s):  
Qun Ling Yu ◽  
Na Bai ◽  
Yan Zhou ◽  
Rui Xing Li ◽  
Jun Ning Chen ◽  
...  
Keyword(s):  
High Performance ◽  
Circuit Simulation ◽  
Cmos Technology ◽  
Optimal Operation ◽  
Reduction Technique ◽  
Total Speed ◽  
Sense Amplifier ◽  
Simulation Results ◽  
A New Technique ◽  
Total Energy Dissipation

A new technique for reducing the offset of latch-type sense amplifier has been proposed and effect of enable signal voltage upon latch-type sense amplifier offset in SRAM has been investigated in this paper. Circuit simulation results on both StrongARM and Double-tail topologies show that the standard deviation of offset can be reduced by 31.23% (StrongARM SA) and 25.2% (Double-tail SA) , respectively, when the voltage of enable signal reaches 0.6V in TSMC 65nm CMOS technology. For a column of bit-cell (1024 bit-cell), the total speed is improved by 14.98% (StrongARAM SA) and 22.26% (Double-tail SA) at the optimal operation point separately, and the total energy dissipation is reduced by 30.45% and 29.47% with this scheme.

A 25 Gbps VCSEL driving ASIC: an attempt for ultra-high-speed front-end readout applications

2022 ◽  
Vol 17 (01) ◽  
pp. C01040
Author(s):  
C. Zhao ◽  
D. Guo ◽  
Q. Chen ◽  
N. Fang ◽  
Y. Gan ◽  
...  
Keyword(s):  
High Speed ◽  
Cmos Technology ◽  
Test Results ◽  
Eye Diagram ◽  
Optical Links ◽  
Optical Module ◽  
Active Feedback ◽  
High Bandwidth ◽  
Output Driver ◽  
Very High

Abstract This paper presents the design and the test results of a 25 Gbps VCSEL driving ASIC fabricated in a 55 nm CMOS technology as an attempt for the future very high-speed optical links. The VCSEL driving ASIC is composed of an input equalizer stage, a pre-driver stage and a novel output driver stage. To achieve high bandwidth, the pre-driver stage combines the inductor-shared peaking structure and the active-feedback technique. A novel output driver stage uses the pseudo differential CML driver structure and the adjustable FFE pre-emphasis technique to improve the bandwidth. This VCSEL driver has been integrated in a customized optical module with a VCSEL array. Both the electrical function and optical performance have been fully evaluated. The output optical eye diagram has passed the eye mask test at the data rate of 25 Gbps. The peak-to-peak jitter of 25 Gbps optical eye is 19.5 ps and the RMS jitter is 2.9 ps.

Enhanced switching characteristics of an ovonic threshold switching device with an ultra-thin MgO interfacial layer

2021 ◽  
pp. 1-1
Author(s):  
Jangseop Lee ◽  
Sangmin Lee ◽  
Myonghoon Kwak ◽  
Wooseok Choi ◽  
Oleksandr Mosendz ◽  
...  
Keyword(s):  
Interfacial Layer ◽  
Switching Device ◽  
Threshold Switching ◽  
Switching Characteristics

A High-Linear CMOS Down Conversion Mixer Using Adjusting the Second and Third-Order Harmonic in Transconductance Stage

2014 ◽  
Vol 24 (01) ◽  
pp. 1550002 ◽  
Author(s):  
Mina Amiri ◽  
Adib Abrishamifar
Keyword(s):  
Low Voltage ◽  
Supply Voltage ◽  
Circuit Simulation ◽  
Cmos Technology ◽  
Conversion Gain ◽  
Third Order ◽  
Cmos Mixer ◽  
Simulation Results ◽  
Down Conversion ◽  
Pmos Transistor

In this paper a new high-linear CMOS mixer is proposed. A well-known low voltage CMOS multiplier structure is used for mixer application in this paper and its linearity is provided by adjusting the value of a resistor, sizing the aspect ratio of a PMOS transistor and adding a proper value of inductor at the input stage. In simulation, a supply voltage as low as 1 V is applied to the circuit. Simulation results of improved mixer in a 0.18-μm CMOS technology illustrate 14 dB increases in IIP3 and also an increase around 1.4 dB is obtained in conversion gain. Furthermore, additional components which are used for improving linearity would not increase the power consumption and area significantly.

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