Modeling and Simulation of the Influence of SOI Structure on Damage Evolution and Ultra-shallow Junction Formed by Ge Preamorphization Implants and Solid Phase Epitaxial Regrowth

2006 ◽  
Vol 912 ◽  
Author(s):  
Caroline Mok ◽  
B. Colombeau ◽  
M. Jaraiz ◽  
P. Castrillo ◽  
J. E. Rubio ◽  
...  
Keyword(s):  
Damage Evolution ◽  
Solid Phase ◽  
Kinetic Monte Carlo ◽  
Silicon On Insulator ◽  
Bulk Silicon ◽  
Shallow Junction ◽  
Defect Interaction ◽  
Epitaxial Regrowth ◽  
Junction Formation ◽  
Ultra Shallow Junctions

AbstractPreamorphization implant (PAI) prior to dopant implantation, followed by solid phase epitaxial regrowth (SPER) is of great interest due to its ability to form highly-activated ultra-shallow junctions. Coupled with growing interest in the use of silicon-on-insulator (SOI) wafers, modeling and simulating the influence of SOI structure on damage evolution and ultra-shallow junction formation is required. In this work, we use a kinetic Monte Carlo (kMC) simulator to model the different mechanisms involved in the process of ultra-shallow junction formation, including amorphization, recrystallization, defect interaction and evolution, as well as dopant-defect interaction in both bulk silicon and SOI. Simulation results of dopant concentration profiles and dopant activation are in good agreement with experimental data and can provide important insight for optimizing the process in bulk silicon and SOI.

Effect of B dose and Ge preamorphization energy on the electrical and structural properties of ultrashallow junctions in silicon-on-insulator

2006 ◽  
Vol 912 ◽  
Author(s):  
Justin J Hamilton ◽  
Erik JH Collart ◽  
Benjamin Colombeau ◽  
Massimo Bersani ◽  
Damiano Giubertoni ◽  
...  
Keyword(s):  
Structural Properties ◽  
Solid Phase ◽  
Silicon Film ◽  
Silicon On Insulator ◽  
Bulk Silicon ◽  
Defect Band ◽  
Future Technology ◽  
Ultrashallow Junctions ◽  
P Type ◽  
Technology Nodes

AbstractFormation of highly activated, ultra-shallow and abrupt profiles is a key requirement for the next generations of CMOS devices, particularly for source-drain extensions. For p-type dopant implants (boron), a promising method of increasing junction abruptness is to use Ge preamorphizing implants prior to ultra-low energy B implantation and solid-phase epitaxy regrowth to re-crystallize the amorphous Si. However, for future technology nodes, new issues arise when bulk silicon is supplanted by silicon-on-insulator (SOI). Previous results have shown that the buried Si/SiO2 interface can improve dopant activation, but the effect depends on the detailed preamorphization conditions and further optimization is required. In this paper a range of B doses and Ge energies have been chosen in order to situate the end-of-range (EOR) defect band at various distances from the back interface of the active silicon film (the interface with the buried oxide), in order to explore and optimize further the effect of the interface on dopant behavior. Electrical and structural properties were measured by Hall Effect and SIMS techniques. The results show that the boron deactivates less in SOI material than in bulk silicon, and crucially, that the effect increases as the distance from the EOR defect band to the back interface is decreased. For the closest distances, an increase in junction steepness is also observed, even though the B is located close to the top surface, and thus far from the back interface. The position of the EOR defect band shows the strongest influence for lower B doses.

Leakage optimization of ultra-shallow junctions formed by solid phase epitaxial regrowth

2004 ◽  
Vol 22 (1) ◽  
pp. 306 ◽  
Author(s):  
R. Lindsay ◽  
K. Henson ◽  
W. Vandervorst ◽  
K. Maex ◽  
B. J. Pawlak ◽  
...  
Keyword(s):  
Solid Phase ◽  
Epitaxial Regrowth ◽  
Shallow Junctions ◽  
Ultra Shallow Junctions

Ultra-Shallow Junction Formation by a Non-Melting Process; Double-Pulsed Green Laser Annealing

2005 ◽  
Vol 862 ◽  
Author(s):  
Toshio Kudo ◽  
Susumu Sakuragi ◽  
Kazunori Yamazaki
Keyword(s):  
Penetration Depth ◽  
Laser Annealing ◽  
Melting Process ◽  
Green Laser ◽  
Deep Penetration ◽  
Shallow Junction ◽  
Junction Formation ◽  
Ultra Shallow Junctions ◽  
Short Annealing ◽  
Overlap Ratio

AbstractIn order to investigate the possibility of nanosecond activation in the non-melting state, we adopted the method of double-pulsed green laser annealing (DPSS), controlling effectively the combined pulse width with two pulsed lasers (pulse duration: ˜100ns, frequency: 1kHz). We investigated the formation of ultra-shallow junctions (USJ) less than 10nm in spite of the deep penetration depth of the green wavelength in crystalline Si (˜1000nm). In order to limit the depth of B implant, a Ge pre-amorphization implant was performed at an energy of 3keV to a dose of 3E+14/cm2. After the pre-amorphization implant, a B implant was performed at 0.2kev and doses of 5E+14/cm2 and 1E+15/cm2. The implanted B dopants remain within the pre-amorphized Si layer. The double-pulsed laser irradiation was performed with a homogenized line beam of 0.1mm x 17mm, scanning a sample stage at a constant velocity of 10mm/s, that is, at an overlap ratio of 90%. The non-melting state was found to be in the pulse energy density range of E ≤ 780mJ/cm2 at a delay time of 300ns. Overcoming the issues of the short annealing time (˜<1μs) and the deep penetration depth (˜1000nm), we succeeded in the ultra-shallow junction formation beyond the 45nm CMOS node: maximum junction depth of 6nm, minimum sheet resistance of 0.65kohm/sq at a B dose of 1E+15/cm2, an abruptness of 1.4nm/dec.

Athermal germanium migration in strained silicon layers during junction formation with solid-phase epitaxial regrowth

2005 ◽  
Vol 86 (8) ◽  
pp. 081915 ◽  
Author(s):  
W. Vandervorst ◽  
T. Janssens ◽  
B. Brijs ◽  
R. Delhougne ◽  
R. Loo ◽  
...  
Keyword(s):  
Solid Phase ◽  
Strained Silicon ◽  
Epitaxial Regrowth ◽  
Junction Formation

scholarly journals Doping and Mobility Profiles in Defect-Engineered Ultra-shallow Junctions: Bulk and SOI

2004 ◽  
Vol 810 ◽  
Author(s):  
A. J. Smith ◽  
B. Colombeau ◽  
R. Gwilliam ◽  
E. Collart ◽  
N.E.B. Cowern ◽  
...  
Keyword(s):  
Hall Effect ◽  
Carrier Concentration ◽  
Vacancy Concentration ◽  
Depth Resolution ◽  
Silicon On Insulator ◽  
Bulk Silicon ◽  
Near Surface ◽  
Silicon Ions ◽  
Shallow Junctions ◽  
Ultra Shallow Junctions

ABSTRACTSilicon on insulator (SOI - Smartcut®) wafers were implanted with 1MeV and 300keV silicon ions to doses of 3.8x1015 cm−2 and 3x1014 cm−2, respectively, in order to modify the vacancy concentration in a controlled way. Boron was then implanted at 2keV to a dose of 1×1015 cm−2 into the near-surface part of the vacancy-engineered region. Atomic profiles were determined using SIMS and electrical profiles were measured using a novel Differential Hall Effect (DHE) technique, which enables profiling of electrically active dopants with a nanometer depth resolution. The electrical profiles provide pairs of carrier concentration and mobility values as a function of depth. The buried oxide (BOX) is proven to restrict the back diffusing interstitials positioned below the BOX from entering the silicon top layer and interacting with the boron profile. Also an increase of ∼50% in boron activation is achieved when a co-implant is used. However, SOI shows a reduced degree of activation when compared to bulk silicon, with or without a co-implant.

scholarly journals Simulation Of Ultra Shallow Junction Formation For Nano Devices Applications By Dopant Diffusion From Spin On Glasses

2012 ◽  
Author(s):  
Nik Hazura N. Hamat ◽  
Uda Hashim ◽  
Ibrahim Ahmad
Keyword(s):  
Sheet Resistance ◽  
High Performance ◽  
High Surface ◽  
Deep Submicron ◽  
Short Channel ◽  
Shallow Junction ◽  
Si Substrates ◽  
Junction Formation ◽  
Shallow Junctions ◽  
Ultra Shallow Junctions

Bagi merealisasikan MOSFET submikron, simpangan cetek ultra berkerintangan rendah diperlukan bagi menghalang kesan saluran pendek dan bagi meningkatkan peranti. Dalam kajian ini, pembentukan simpangan cetek ultra disimulasikan menggunakan perisian ATHENA dan Silvaco Inc. bagi memodelkan resapan dari SOD ke dalam silikon. Simpangan ultra P+N berkualiti tinggi dengan kedalaman 40 nm telah dibentuk menggunakan ciri–ciri yang baik dengan arus bocor serendah 0.5 na/cm2. Simpangan cetek kurang daripada turut diperoleh tetapi kualiti simpangan–simpangan cetek ini kurang baik disebabkan oleh arus bocor permukaan yang tinggi. Pembentukan simpangan dari resapan lapisan polisilikon di atas silikon diikuti oleh SOD di atasnya menghasilkan simpangan yang lebih cetek yang berkerintangan rendah. Kata kunci: Simpangan cetek ultra, resapan, SOD, ATHENA, MOSFET For realizing deep submicron MOSFETs, ultra shallow junctions with low sheet resistance and high doping concentrations are required to suppress short channel effects and to increase the performance. In this paper, ultra shallow junctions were simulated using ATHENA software package from Silvaco TCAD Tools to model the diffusion from spin on dopant (SOD) into silicon. High performance 40 nm P+N shallow junction fabricated by rapid thermal diffusion of B150 into silicon have been obtained. The junction showed very good characteristics with leakage currents as low as 0.5 nA/cm2. Shallow junctions less than 20 nm have also been obtained but the quality was not very good due to very high surface leakage current. Junction formation by diffusion of polysilicon layer on Si substrates then SOD layer deposition on top of it produced shallower junctions with low sheet resistance. Key words: Ultra shallow junction, MOSFET, ULSI, diffusion, spin on dopant, ATHENA, ATLAS

(A)thermal migration of Ge during junction formation in s-Si layers grown on thin SiGebuffer layers

2004 ◽  
Vol 809 ◽  
Author(s):  
W. Vandervorst ◽  
B.J. Pawlak ◽  
T. Janssens ◽  
B. Brijs ◽  
R. Delhougne ◽  
...  
Keyword(s):  
Activation Energy ◽  
Distribution Function ◽  
Solid Phase ◽  
Silicon Layer ◽  
Damage Distribution ◽  
Strained Si ◽  
Advanced Technologies ◽  
Epitaxial Regrowth ◽  
Junction Formation ◽  
Determining Factor

ABSTRACTSolid phase epitaxial regrowth (SPER) has been proven to be highly advantageous for ultra shallow junction formation in advanced technologies. Application of SPER to strained Si/SiGe structures raises the concern that the Ge may out diffuse during the implantation and/or anneal steps and thus reduce the strain in the top silicon layer.In the present studies we expose 8-30 nm strained silicon layers grown on thin relaxed SiGe-buffers, to implant conditions and anneal cycles, characteristic for formation of the junctions by solid phase epitaxial regrowth and conventional spike activation. The resulting Geredistribution is measured using SIMS. Based on the outdiffused Ge-profiles the Ge-diffusion coefficient has been determined in the temperature range of 800-1100C from which an activation energy of ∼ 3.6 eV can be deduced. Up to 1050 C, 10 min, even a 30 nm strained film remains highly stable and shows only very moderate outdiffusion.We also have observed a far more efficient, athermal Ge-redistribution process linked to the implantation step itself. This was studied by analysing the Ge-redistribution following an Asimplant (2-15 keV, 5 1014 – 3 1015 at/cm2). It is shown that the energy of the implant species (or more specifically the position of the damage distribution function relative to the Ge-edge) plays a determining factor with respect to the Ge-migration. For implants whereby the damage distribution overlaps with the Ge-edge, a very efficient transport of the Ge is observed, even prior to any anneal cycle. The migration is entirely correlated with the collision cascade and the resulting (forward!) Ge-recoil distribution. The scaling with dose for a given energy links the observed Ge-profile with a broadening mechanism related to the number of atom displacements induced in the sample within the vicinity of the Si-SiGe-transition.

Solid-Phase Epitaxial Regrowth of Ion-Implanted Silicon on Sapphire Using Rapid Thermal Annealing

1984 ◽  
Vol 35 ◽  
Author(s):  
A M Hodge ◽  
A G Cullis ◽  
N G Chew
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Solid Phase ◽  
Silicon Film ◽  
Silicon On Insulator ◽  
Full Potential ◽  
Cross Sectional ◽  
Epitaxial Regrowth ◽  
Transmission Electron ◽  
Device Processing

ABSTRACTSolid phase epitaxial regrowth of silicon on sapphire is used to improve the quality of as-received silicon films prior to conventional device processing. It has been shown that this is necessary, especially for layers of 0.3μm and thinner, if the full potential of this particular silicon on insulator technology is to be realised. Si+ ions are implanted at an energy and dose such that all but the surface of the silicon film is rendered amorphous. In this study, the layer is regrown using a rapid thermal annealer operated in the multi-second regime. A second shallower implant followed by rapid thermal annealing produces a further improvement. Characterisation of the material has been principally by cross-sectional transmission electron microscopy. The structures observed after different implant and regrowth treatments are discussed.

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