From Radiation Induced Leakage Current to Soft Breakdown in Irradiated MOS Devices With Ultrathin Gate Oxide

1999 ◽  
Vol 592 ◽  
Author(s):  
M. Ceschia ◽  
A. Paccagnella ◽  
A. Cester ◽  
G. Ghidini ◽  
J. Wyss

ABSTRACTMetal Oxide Semiconductor (MOS) capacitors with ultra-thin oxides have been irradiated with ionising particles (8 MeV electrons or Si, Ni, and Ag high energy ions), featuring various Linear Energy Transfer (LET) ranging over 4 orders of magnitude. Different oxide fields (Fbias) were applied during irradiation, ranging between flat-band and 3 MV/cm. We measured the DC Radiation Induced Leakage Current (RILC) at low fields (3-6 MV/cm) after electron or Si ion irradiation. RILC was the highest in devices biased at flat band during irradiation. In devices irradiated with higher LET ions (Ni and Ag) we observed the onset of Soft-Breakdown phenomena. Soft-Breakdown current increases with the oxide field applied during the stress.

2007 ◽  
Vol 996 ◽  
Author(s):  
Takuya Sugawara ◽  
Raghavasimhan Sreenivasan ◽  
Yasuhiro Oshima ◽  
Paul C. McIntyre

AbstractGermanium and hafnium-dioxide (HfO2) stack structures' physical and electrical properties were studied based on the comparison of germanium and silicon based metal-oxide-semiconductor (MOS) capacitors' electrical properties. In germanium MOS capacitor with oxide/oxynitride interface layer, larger negative flat-band-voltage (Vfb) shift compared with silicon based MOS capacitors was observed. Secondary ion mass spectrum (SIMS) characteristics of HfO2-germanium stack structure with germanium oxynitride (GeON) interfacial layer showed germanium out diffusion into HfO2. These results indicate that the germanium out diffusion into HfO2 would be the origin of the germanium originated negative Vfb shift. Using Ta3N5 layer as a germanium passivation layer, reduced Vfb shift and negligible hysteresis were observed. These results suggest that the selection of passivation layer strongly influences the electrical properties of germanium based MOS devices.


2021 ◽  
Vol 11 (1) ◽  
Author(s):  
H. Amekura ◽  
M. Toulemonde ◽  
K. Narumi ◽  
R. Li ◽  
A. Chiba ◽  
...  

AbstractDamaged regions of cylindrical shapes called ion tracks, typically in nano-meters wide and tens micro-meters long, are formed along the ion trajectories in many insulators, when high energy ions in the electronic stopping regime are injected. In most cases, the ion tracks were assumed as consequences of dense electronic energy deposition from the high energy ions, except some cases where the synergy effect with the nuclear energy deposition plays an important role. In crystalline Si (c-Si), no tracks have been observed with any monomer ions up to GeV. Tracks are formed in c-Si under 40 MeV fullerene (C60) cluster ion irradiation, which provides much higher energy deposition than monomer ions. The track diameter decreases with decreasing the ion energy until they disappear at an extrapolated value of ~ 17 MeV. However, here we report the track formation of 10 nm in diameter under C60 ion irradiation of 6 MeV, i.e., much lower than the extrapolated threshold. The diameters of 10 nm were comparable to those under 40 MeV C60 irradiation. Furthermore, the tracks formed by 6 MeV C60 irradiation consisted of damaged crystalline, while those formed by 40 MeV C60 irradiation were amorphous. The track formation was observed down to 1 MeV and probably lower with decreasing the track diameters. The track lengths were much shorter than those expected from the drop of Se below the threshold. These track formations at such low energies cannot be explained by the conventional purely electronic energy deposition mechanism, indicating another origin, e.g., the synergy effect between the electronic and nuclear energy depositions, or dual transitions of transient melting and boiling.


2013 ◽  
Vol 781-784 ◽  
pp. 357-361 ◽  
Author(s):  
Igor V. Khromushin ◽  
Taтiana I. Aksenova ◽  
Turgora Tuseyev ◽  
Karlygash K. Munasbaeva ◽  
Yuri V. Ermolaev ◽  
...  

The effect of irradiation with heavy ions Ne, Ar, and Kr of various energies on the structure and properties of ceramic barium cerate doped with neodymium and annealed in air at 650°C for 7 hours is studied. It is noted that blistering was observed on cerate surface during its irradiation by low energy Ne ions, whereas it was not observed under low-energy Ar and Kr ions irradiation. Irradiation of the cerate with high energy ions caused partial amorphization of the irradiated surface of the material, while the structure of the non-irradiated surface did not change. In addition, the irradiated surface of the cerate endured solid-phase structural changes. Thus, upon high-energy ions irradiation in the range of Ne, Ar, Kr the cerate surface resembled the stages of spherulite formation - nucleation, growth (view of cauliflower), formation of spherulitic crust, respectively. The increase in water molecules release and reduction of molecular oxygen release from the barium cerate, irradiated by high-energy ions is found during vacuum constant rate heating. It is concluded that cerates undergo changes to the distances significantly exceeding the ion ranges in these materials. Features of high-energy ions influence on thermal desorption of carbon dioxide from cerates show, apparently, the formation of weakly bound carbonate compounds on the cerate surface in the irradiation process.


1998 ◽  
Vol 525 ◽  
Author(s):  
M. R. Mirabedini ◽  
V. Z-Q Li ◽  
A. R. Acker ◽  
R. T. Kuehn ◽  
D. Venables ◽  
...  

ABSTRACTIn this work, in-situ doped polysilicon and poly-SiGe films have been used as the gate material for the fabrication of MOS devices to evaluate their respective performances. These films were deposited in an RTCVD system using a Si2H6 and GeH4 gas mixture. MOS capacitors with 45 Å thick gate oxides and polysilicon/poly-SiGe gates were subjected to different anneals to study boron penetration. SIMS analysis and flat band voltage measurements showed much lower boron penetration for devices with poly-SiGe gates than for devices with polysilicon gates. In addition, C-V measurements showed no poly depletion effects for poly-SiGe gates while polysilicon gates had a depletion effect of about 8%. A comparison of resistivities of these films showed a low resistivity of 1 mΩ-cm for poly-SiGe films versus 3 mΩ-cm for polysilicon films after an anneal at 950 °C for 30 seconds.


RSC Advances ◽  
2015 ◽  
Vol 5 (102) ◽  
pp. 83837-83842 ◽  
Author(s):  
Sk Masiul Islam ◽  
K. Sarkar ◽  
P. Banerji ◽  
Kalyan Jyoti Sarkar ◽  
Biswajit Pal

Carrier transport vis-a-vis leakage current in GaAs MOS capacitors with various structures; quantum dot embedded devices show the lowest leakage.


2013 ◽  
Vol 740-742 ◽  
pp. 695-698 ◽  
Author(s):  
Tsuyoshi Akagi ◽  
Hiroshi Yano ◽  
Tomoaki Hatayama ◽  
Takashi Fuyuki

Metal-oxide-semiconductor (MOS) capacitors with phosphorus localized near the SiO2/SiC interface were fabricated on 4H-SiC by direct POCl3treatment followed by SiO2deposition. Post-deposition annealing (PDA) temperature affected MOS device properties and phosphorus distribution in the oxide. The sample with PDA at 800 °C showed narrow phosphorus-doped oxide region, resulting in low interface state density near the conduction band edge and small flatband voltage shift after FN injection. The interfacial localization of phosphorus improved both interface properties and reliability of 4H-SiC MOS devices.


2010 ◽  
Vol 645-648 ◽  
pp. 821-824 ◽  
Author(s):  
Kohei Kozono ◽  
Takuji Hosoi ◽  
Yusuke Kagei ◽  
Takashi Kirino ◽  
Shuhei Mitani ◽  
...  

The dielectric breakdown mechanism in 4H-SiC metal-oxide-semiconductor (MOS) devices was studied using conductive atomic force microscopy (C-AFM). We performed time-dependent dielectric breakdown (TDDB) measurements using a line scan mode of C-AFM, which can characterize nanoscale degradation of dielectrics. It was found that the Weibull slope () of time-to-breakdown (tBD) statistics in 7-nm-thick thermal oxides on SiC substrates was much larger for the C-AFM line scan than for the common constant voltage stress TDDB tests on MOS capacitors, suggesting the presence of some weak spots in the oxides. Superposition of simultaneously obtained C-AFM topographic and current map images of SiO2/SiC structure clearly demonstrated that most of breakdown spots were located at step bunching. These results indicate that preferential breakdown at step bunching due to local electric field concentration is the probable cause of poor gate oxide reliability of 4H-SiC MOS devices.


Coatings ◽  
2019 ◽  
Vol 9 (11) ◽  
pp. 720
Author(s):  
He Guan ◽  
Shaoxi Wang

Au-Pt-Ti/high-k/n-InAlAs metal-oxide-semiconductor (MOS) capacitors with HfO2-Al2O3 laminated dielectric were fabricated. We found that a Schottky emission leakage mechanism dominates the low bias conditions and Fowler–Nordheim tunneling became the main leakage mechanism at high fields with reverse biased condition. The sample with HfO2 (4 m)/Al2O3 (8 nm) laminated dielectric shows a high barrier height ϕB of 1.66 eV at 30 °C which was extracted from the Schottky emission mechanism, and this can be explained by fewer In–O and As–O states on the interface, as detected by the X-ray photoelectron spectroscopy test. These effects result in HfO2 (4 m)/Al2O3 (8 nm)/n-InAlAs MOS-capacitors presenting a low leakage current density of below 1.8 × 10−7 A/cm2 from −3 to 0 V at 30 °C. It is demonstrated that the HfO2/Al2O3 laminated dielectric with a thicker Al2O3 film of 8 nm is an optimized design to be the high-k dielectric used in Au-Pt-Ti/HfO2-Al2O3/InAlAs MOS capacitor applications.


2006 ◽  
Vol 527-529 ◽  
pp. 1007-1010 ◽  
Author(s):  
Daniel B. Habersat ◽  
Aivars J. Lelis ◽  
G. Lopez ◽  
J.M. McGarrity ◽  
F. Barry McLean

We have investigated the distribution of oxide traps and interface traps in 4H Silicon Carbide MOS devices. The density of interface traps, Dit, was characterized using standard C-V techniques on capacitors and charge pumping on MOSFETs. The number of oxide traps, NOT, was then calculated by measuring the flatband voltage VFB in p-type MOS capacitors. The amount that the measured flatband voltage shifts from ideal, minus the contributions due to the number of filled interface traps Nit, gives an estimate for the number of oxide charges present. We found Dit to be in the low 1011cm−2eV−1 range in midgap and approaching 1012 −1013cm−2eV−1 near the band edges. This corresponds to an Nit of roughly 2.5 ⋅1011cm−2 for a typical capacitor in flatband at room temperature. This data combined with measurements of VFB indicates the presence of roughly 1.3 ⋅1012cm−2 positive NOT charges in the oxide near the interface for our samples.


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