Gate Stacks for Low Voltage Ferroelectric Field Effect Devices Based on Pt/SBT/CeO2/Si(100)

1999 ◽  
Vol 596 ◽  
Author(s):  
T. Haneder ◽  
W. Hönlein ◽  
H. Bachhofer ◽  
M. Ullmann ◽  
H. von Philipsborn ◽  
...  
Keyword(s):  
Buffer Layer ◽  
Low Voltage ◽  
Interface State ◽  
State Density ◽  
Thin Layers ◽  
Solution Deposition ◽  
Additional Information ◽  
Voltage Sweep ◽  
Ferroelectric Layer ◽  
Field Effect Devices

AbstractMETS (Metal Ferroelectric Insulator Semiconductor) capacitors were fabricated using CSD (Chemical Solution Deposition). Thin layers of CeO2 were deposited as an insulating buffer layer on Si(100) substrates and SrBi2Ta2O9 (SBT) was used as a ferroelectric layer. Pt electrodes were deposited by evaporation on top of the SBT layer. At constant SBT thickness the thickness of the CeO2 layer was varied to investigate the effects of the change in capacitance ratio between the ferroelectric and the buffer layer. XRD spectra were used to determine the phase of the SBT and the quality of the CeO2 layer. C(V) measurements showed the ferroelectric nature of the SBT. Additional information was provided by TEM and EDX analysis.Some samples showed a memory window as big as 1.6 Volt at a moderate voltage sweep from −3.5 to +3.5 Volt. Interface state density is approximately 2×1011/cm2 eV and remanent polarization was found to be in the range of 0.3 μC/cm2. These results are already very promising in terms of fabricating a Ferroelectric FET. Some basic considerations with respect to the development of IT memory cells on the basis of this kind of transistor will also be presented.

Long Retention Performance of a MFIS Device Achieved by Introducing High-k Al2O3/Si3N4/Si Buffer Layer

2003 ◽  
Vol 784 ◽  
Author(s):  
Yoshihisa Fujisaki ◽  
Kunie Iseki ◽  
Hiroshi Ishiwara
Keyword(s):  
Buffer Layer ◽  
Atomic Layer ◽  
Interface State ◽  
State Density ◽  
Retention Performance ◽  
Si Substrate ◽  
Capacitance Density ◽  
High K ◽  
Nitrogen Radicals ◽  
Mfis Structure

ABSTRACTWe introduced high-k Al2O3/Si3N4 buffer layer in MFIS (Metal-Ferroelectric-Insulator-Semiconductor) devices to reduce the leakage current though the buffer (I) layer. We prepared the buffer layer by nitridizing Si substrate by atomic nitrogen radicals and then deposited Al2O3 film using ALD (Atomic Layer Deposition) technique. The interface state density between the ALD-Al2O3/Radical-Si3N4 stacked insulator and a Si substrate is as low as 1011 cm-2eV-1. The current density less than 10-9 A/cm2 is realized under the 1V bias application using films with the capacitance density of 12fF/μm2. The c-axis oriented Bi3.45La0.75Ti3O12 (BLT) ferroelectric films were deposited to make MFIS structure. With this structure, we obtained the retention time as long as 1.5×106 sec (about 17 days). This excellent retention character is attributable to the high insulating property of the ALD-Al2O3/Radical-Si3N4 stacked insulator and also attributable to the perfect elimination of defects at the interfaces in the MFIS structure.

Long Retention Performance of a MFIS Device Achieved by Introducing High-k Al2O3/Si3N4/Si Buffer Layer

2003 ◽  
Vol 786 ◽  
Author(s):  
Yoshihisa Fujisaki ◽  
Kunie Iseki ◽  
Hiroshi Ishiwara
Keyword(s):  
Buffer Layer ◽  
Atomic Layer ◽  
Interface State ◽  
State Density ◽  
Retention Performance ◽  
Si Substrate ◽  
Capacitance Density ◽  
High K ◽  
Nitrogen Radicals ◽  
Mfis Structure

ABSTRACTWe introduced high-k Al2O3/Si3N4 buffer layer in MFIS (Metal-Ferroelectric-Insulator-Semiconductor) devices to reduce the leakage current though the buffer (I) layer. We prepared the buffer layer by nitridizing Si substrate by atomic nitrogen radicals and then deposited Al2O3 film using ALD (Atomic Layer Deposition) technique. The interface state density between the ALD-Al2O3/Radical-Si3N4 stacked insulator and a Si substrate is as low as 1011 cm−2eV−1. The current density less than 10−9 A/cm2 is realized under the 1V bias application using films with the capacitance density of 12fF/mm2. The c-axis oriented Bi3.45La0.75Ti3O12 (BLT) ferroelectric films were deposited to make MFIS structure. With this structure, we obtained the retention time as long as 1.5×106 sec (about 17 days). This excellent retention character is attributable to the high insulating property of the ALD-Al2O3/Radical-Si3N4 stacked insulator and also attributable to the perfect elimination of defects at the interfaces in the MFIS structure.

Characteristics of Thin Layers of SiO2 Fabricated by Rapid Thermal Oxidation

1987 ◽  
Vol 92 ◽  
Author(s):  
S. Prasad ◽  
J. Haase ◽  
R. Früchtnicht ◽  
R. Ferretti ◽  
D. Haack
Keyword(s):  
Growth Rate ◽  
Thermal Oxidation ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Thin Layers ◽  
Rapid Thermal Oxidation ◽  
High Temperature Anneal ◽  
Work Function Difference ◽  
Function Difference

ABSTRACTThin layers of SiO2 (60-300 Å) were fabricated by rapid thermal oxidation (RTO). Growth rate on (100) and (111) Si was determined. Two different high-temperature anneal cycles were used to reduce the interface state density. Work function difference between metal and semiconductor depends upon technology and can be attributed to the changes in Si-SiO2 barrier height.

Al-Oxynitride Buffer Layer Facilities for PrOX/SiC Interfaces

2007 ◽  
Vol 996 ◽  
Author(s):  
Karsten Henkel ◽  
Rakesh Sohal ◽  
Carola Schwiertz ◽  
Yevgen Burkov ◽  
Mohamed Torche ◽  
...  
Keyword(s):  
Buffer Layer ◽  
Metal Layer ◽  
Interface State ◽  
State Density ◽  
Aluminum Oxynitride ◽  
Electrical Measurements ◽  
Praseodymium Oxide ◽  
High K ◽  
Good Lattice ◽  
Layer I

AbstractWe investigate the dielectric properties of Praseodymium based oxides and silicates by preparing MIS structures consisting of a metal layer (M), PrOX (praseodymium oxide) as a high-k insulating layer (I), and silicon (Si) or silicon carbide (SiC) as semiconductor substrates (S).The use of a buffer layer between PrOX and SiC is necessary as we found destructive interactions like silicate and graphite formation between these materials. Based on a higher permittivity value than SiO2 and a good lattice matching in conjunction with nearly the same thermal expansion coefficient to SiC, we focus on aluminum oxynitride (AlON) as a suitable buffer layer for this high-k/wide-bandgap system. We report on results achieved by Synchrotron Radiation Photoemission Spectroscopy (SRPES) and by electrical measurements.In our spectroscopic investigations we found a stable AlON/3C-SiC interface as well as no elemental carbon and silicate contributions in the core levels after thin PrOX deposition and annealing up to 900°C.In electrical characterizations of PrOX/AlON stacks on silicon we already found a strong improvement in the leakage current down to values of 10-7 A/cm2 at an CET of 4nm. We observed an interface state density in the range of 5x1011-1x1012/eVcm2 and 1-5x1012/eVcm2 on Si and SiC, respectively.

Interface-State-Density Evaluation of p-type and n-type Ge/GeNx Structures by Conductance Technique

2013 ◽  
Vol 133 (7) ◽  
pp. 1279-1284
Author(s):  
Takuro Iwasaki ◽  
Toshiro Ono ◽  
Yohei Otani ◽  
Yukio Fukuda ◽  
Hiroshi Okamoto
Keyword(s):  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Conductance Technique ◽  
Density Evaluation ◽  
P Type

Identification of Charging Effects in Plasma-Enhanced TEOS Deposition with Non-Contact Test Techniques

1998 ◽  
Author(s):  
Tomasz Brozek ◽  
James Heddleson
Keyword(s):  
Vapor Deposition ◽  
Chemical Vapor ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Wafer Surface ◽  
Oxide Charge ◽  
Contact Test ◽  
Deposition Power ◽  
Oxide Deposition

Abstract Use of non-contact test techniques to characterize degradation of the Si-SiO2 system on the wafer surface exposed to a plasma environment have proven themselves to be sensitive and useful in investigation of plasma charging level and uniformity. The current paper describes application of the surface charge analyzer and surface photo-voltage tool to explore process-induced charging occurring during plasma enhanced chemical vapor deposition (PECVD) of TEOS oxide. The oxide charge, the interface state density, and dopant deactivation are studied on blanket oxidized wafers with respect to the effect of oxide deposition, power lift step, and subsequent annealing.

Properties of MOS Structure Fabricated on 3C-SiC Grown by Reactive Magnetron Sputtering.

1994 ◽  
Vol 339 ◽  
Author(s):  
R. Turan ◽  
Q. Wahab ◽  
L. Hultman ◽  
M. Willander ◽  
J. -E. Sundgren
Keyword(s):  
Magnetron Sputtering ◽  
Interface State ◽  
State Density ◽  
Reactive Magnetron Sputtering ◽  
Oxide Semiconductor ◽  
Reactive Magnetron ◽  
Cross Sectional ◽  
Mos Structure ◽  
Transmission Electron ◽  
Wide Bandgap Materials

ABSTRACTWe report the fabrication and the characterization of Metal Oxide Semiconductor (MOS) structure fabricated on thermally oxidized 3C-SiC grown by reactive magnetron sputtering. The structure and the composition of the SiO2 layer was studied by cross-sectional transmission electron microscopy (XTEM) Auger electron spectroscopy (AES). Homogeneous stoichiometric SiO2 layers formed with a well-defined interface to the faceted SiC(lll) top surface. Electrical properties of the MOS capacitor have been analyzed by employing the capacitance and conductance techniques. C-V curves shows the accumulation, depletion and deep depletion phases. The capacitance in the inversion regime is not saturated, as usually observed for wide-bandgap materials. The unintentional doping concentration determined from the 1/C2 curve was found to be as low as 2.8 × 1015 cm-3. The density of positive charges in the grown oxide and the interface states have been extracted by using high-frequency C-V and conductance techniques. The interface state density has been found to be in the order of 1011cm2-eV-1.

An optimized process for fabrication of SrBi2Ta2O9 thin films using a novel chemical solution deposition technique

1999 ◽  
Vol 14 (11) ◽  
pp. 4395-4401 ◽  
Author(s):  
Seung-Hyun Kim ◽  
D. J. Kim ◽  
K. M. Lee ◽  
M. Park ◽  
A. I. Kingon ◽  
...  
Keyword(s):  
Thin Films ◽  
Chemical Solution Deposition ◽  
Low Voltage ◽  
Ferroelectric Properties ◽  
Chemical Solution ◽  
Solution Deposition ◽  
Chemical Solution Deposition Method ◽  
Low Leakage ◽  
Low Leakage Current ◽  
Voltage Saturation

Ferroelectric SrBi2Ta2O9 (SBT) thin films on Pt/ZrO2/SiO2/Si were successfully prepared by using an alkanolamine-modified chemical solution deposition method. It was observed that alkanolamine provided stability to the SBT solution by retarding the hydrolysis and condensation rates. The crystallinity and the microstructure of the SBT thin films improved with increasing annealing temperature and were strongly correlated with the ferroelectric properties of the SBT thin films. The films annealed at 800 °C exhibited low leakage current density, low voltage saturation, high remanent polarization, and good fatigue characteristics at least up to 1010 switching cycles, indicating favorable behavior for memory applications.

scholarly journals Preparation and Characterization of Nitridation Layer on 4H SiC (0001) Surface by Direct Plasma Nitridation

2014 ◽  
Vol 778-780 ◽  
pp. 631-634 ◽  
Author(s):  
Yoshiyuki Akahane ◽  
Takuo Kano ◽  
Kyosuke Kimura ◽  
Hiroki Komatsu ◽  
Yukimune Watanabe ◽  
...  
Keyword(s):  
Interface State ◽  
Nitride Layer ◽  
State Density ◽  
Interface State Density ◽  
Process Temperature ◽  
Pure Nitrogen ◽  
Interface Property ◽  
Plasma Nitridation

A nitride layer was formed on a SiC surface by plasma nitridation using pure nitrogen as the reaction gas at the temperature from 800°C to 1400°C. The surface was characterized by XPS. The XPS measurement showed that an oxinitride layer was formed on the SiC surface by the plasma nitridation. The high process temperature seemed to be effective to activate the niridation reaction. A SiO2film was deposited on the nitridation layer to form SiO2/nitride/SiC structure. The interface state density of the SiO2/nitride/SiC structure was lower than that of the SiO2/SiC structure. This suggested that the nitridation was effective to improve the interface property.

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