Fabrication of Air-Gaps Between Cu Interconnects for Low Intralevel k.

2000 ◽  
Vol 612 ◽  
Author(s):  
Dhananjay M. Bhusari ◽  
Michael D. Wedlake ◽  
Paul A. Kohl ◽  
Carlye Case ◽  
Fred P. Klemens ◽  
...  

AbstractWe present here a method for fabrication of air-gaps between Cu-interconnects to achieve low intralevel dielectric constant, using a sacrificial polymer as a ‘place holder’. IC compatible metallization and CMP processes were used in a single damascene process. The air-gap occupies the entire intralevel volume between the copper lines with fully densified SiO2 as the planer interlevel dielectric. The width of the air-gaps was 286 nm and the width of the copper lines was 650 nm. The effective intralevel dielectric constant was calculated to be 2.19. The thickness of the interlevel SiO2 and copper lines were 1100 nm and 700 nm, respectively. Further reduction in the value of intralevel dielectric constant is possible by optimization of the geometry of the metal/air-gap structure, and by use of a low k interlevel dielectric material.In this method of forming air-gaps, the layer of sacrificial polymer was spin-coated onto the substrate and formed into the desired pattern using an oxide or metal mask and reactive-ion-etching. The intralevel Cu trench is then inlaid using a damascene process. After the CMP of copper, interlevel SiO2 is deposited by plasma-CVD. Finally, the polymer place-holder is thermally decomposed with the decomposition products permeating through the interlevel dielectric material. The major advantages of this method over other reported methods of formation of air-gaps are excellent control over the geometry of the air-gaps; no protrusion of air-gaps into the interlevel dielectric; no deposition of SiO2 over the side-walls, and no degradation of the interlevel dielectric during the formation of air-gap.

1999 ◽  
Vol 565 ◽  
Author(s):  
Paul A. Kohl ◽  
Agnes Padovani ◽  
Michael Wedlake ◽  
Dhananjay Bhusari ◽  
Sue Ann ◽  
...  

AbstractPreviously, the fabrication of air-gap structures for electrical interconnections was demonstrated using a sacrificial polymer encapsulated in conventional dielectric materials. The air-gaps were formed by thermally decomposing the sacrificial polymer and allowing the by-products to diffuse through the encapsulating dielectric. The diffusivity of the polymer decomposition products is adequate at elevated temperatures to allow the formation of air-gaps. This process was extended to form low dielectric constant, porous silica from commercially available methylsilsesquioxane (MSQ) by the addition of the sacrificial polymer to the MSQ. The porous MSQ film was thermally cured followed by decomposition of the NB at temperatures above 400°C. The dielectric constant of the MSQ was lowered from 2.7 to 2.3 by creating 70 nm pores in the MSQ. The voids created in the MSQ appeared to exhibit a closed-pore structure.


Materials ◽  
2021 ◽  
Vol 14 (17) ◽  
pp. 4827
Author(s):  
Nianmin Hong ◽  
Yinong Zhang ◽  
Quan Sun ◽  
Wenjie Fan ◽  
Menglu Li ◽  
...  

Since the application of silicon materials in electronic devices in the 1950s, microprocessors are continuously getting smaller, faster, smarter, and larger in data storage capacity. One important factor that makes progress possible is decreasing the dielectric constant of the insulating layer within the integrated circuit (IC). Nevertheless, the evolution of interlayer dielectrics (ILDs) is not driven by a single factor. At first, the objective was to reduce the dielectric constant (k). Reduction of the dielectric constant of a material can be accomplished by selecting chemical bonds with low polarizability and introducing porosity. Moving from silicon dioxide, silsesquioxane-based materials, and silica-based materials to porous silica materials, the industry has been able to reduce the ILDs’ dielectric constant from 4.5 to as low as 1.5. However, porous ILDs are mechanically weak, thermally unstable, and poorly compatible with other materials, which gives them the tendency to absorb chemicals, moisture, etc. All these features create many challenges for the integration of IC during the dual-damascene process, with plasma-induced damage (PID) being the most devastating one. Since the discovery of porous materials, the industry has shifted its focus from decreasing ILDs’ dielectric constant to overcoming these integration challenges. More supplementary precursors (such as Si-C-Si structured compounds), deposition processes (such as NH3 plasma treatment), and post porosity plasma protection treatment (P4) were invented to solve integration-related challenges. Herein, we present the evolution of interlayer dielectric materials driven by the following three aspects, classification of dielectric materials, deposition methods, and key issues encountered and solved during the integration phase. We aim to provide a brief overview of the development of low-k dielectric materials over the past few decades.


2000 ◽  
Vol 612 ◽  
Author(s):  
R. A. Donaton ◽  
B. Coenegrachts ◽  
E. Sleeckx ◽  
M. Schaekers ◽  
G. Sophie ◽  
...  

AbstractAURORA films, which have a Si-O-Si network with –CH3 terminations, were characterized and integrated into Cu single damascene structures. The relatively low carbon concentration (∼ 20%) and the very small pore size (∼ 0.6 nm) found could be advantageous during integration of AURORA. Integration of AURORA into Cu single damascene structures was successfully achieved. Suitable resist strip processes, which are critical for Si-O-C type materials, were developed, resulting in trenches with satisfactory profiles. After a complete single damascene process, a interline dielectric constant value of 2.7 was found for line spacing down to 0.25 µm.


2006 ◽  
Vol 914 ◽  
Author(s):  
Romano Hoofman ◽  
Roel Daamen ◽  
Viet Nguyenhoang ◽  
Julien Michelon ◽  
Laurent G. Gosset ◽  
...  

AbstractIn this paper, two different air gap integration approaches are discussed in detail. Firstly, air gaps can be created using sacrificial materials, which are selectively removed through a capping layer either by wet- or dry-etching or by thermal decomposition. The second class benefits from the non-conformal deposition of different CVD dielectrics, which creates air gaps for narrow spaced lines. The benefit of air gaps in terms of capacitance reduction in multilevel interconnects is well known, therefore the authors will mainly concentrate on the challenges associated with the introduction of air gaps in interconnect systems. It will be shown that interconnect containing air gaps does not suffer more from reliability challenges than interconnects with porous low-k dielectrics. Therefore, air gaps can be considered as a viable option for the 32nm node and beyond.


2018 ◽  
Vol 6 (9) ◽  
pp. 2370-2378 ◽  
Author(s):  
Yang Liu ◽  
Cheng Zhang ◽  
Benyuan Huang ◽  
Xu Wang ◽  
Yulong Li ◽  
...  

A novel skin–core structured fluorinated MWCNT nanofiller was prepared to fabricate epoxy composite with broadband high dielectric constant and low dielectric loss.


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