SiC BJT's for High Power Switching and RF Applications

2002 ◽  
Vol 742 ◽  
Author(s):  
Anant Agarwal ◽  
Sei-Hyung Ryu ◽  
Craig Capell ◽  
James Richmond ◽  
John W. Palmour ◽  
...  
Keyword(s):  
Single Cell ◽  
Temperature Coefficient ◽  
Supply Voltage ◽  
Maximum Output Power ◽  
Low Frequency ◽  
Current Gain ◽  
Maximum Output ◽  
Positive Temperature ◽  
Power Gain ◽  
Power Switching

ABSTRACTIn this paper, high performance, high voltage NPN bipolar junction transistors in 4H-SiC are presented for applications in low frequency (< 5 MHz) power conversion systems as well as in RF (425 MHz) power amplifiers. The power BJTs for low frequency switching applications were designed to block 1300 V and showed a specific on-resistance of 8.0 mohm-cm2, which outperforms all SiC power switching devices ever reported. Moreover, these transistors show a positive temperature coefficient in the on-resistance and a negative temperature coefficient in the current gain, which enable easy paralleling of the devices. In addition, RF BJTs were designed, fabricated and tested for operation at UHF frequencies. The common emitter breakdown voltage was in excess of 500 V consistent with the 5 micron collector thickness. For VCC = 20 V, fT peaked at about 1.5 GHz. A single cell was measured in common emitter mode with a collector supply voltage of 80 V in class AB at 425 MHz. A 100 μs pulse width with 10% duty cycle was used. A maximum output power of 50 W for a single cell was achieved. The peak large signal power gain was 9.6 dB. The collector efficiency at the power output of 50 W was 51% with a power gain of 9.3 dB. This represents the first demonstration of a SiC RF BJT.

scholarly journals Study of the Properties of a Hybrid Piezoelectric and Electromagnetic Energy Harvester for a Civil Engineering Low-Frequency Sloshing Environment

Energies ◽  
2021 ◽  
Vol 14 (2) ◽  
pp. 391
Author(s):  
Nan Wu ◽  
Yuncheng He ◽  
Jiyang Fu ◽  
Peng Liao
Keyword(s):  
Output Power ◽  
Energy Harvester ◽  
Civil Engineering ◽  
Maximum Output Power ◽  
Low Frequency ◽  
Electromagnetic Energy ◽  
Maximum Output ◽  
Piezoelectric Film ◽  
Hybrid Energy ◽  
Level Height

In this paper a novel hybrid piezoelectric and electromagnetic energy harvester for civil engineering low-frequency sloshing environment is reported. The architecture, fabrication and characterization of the harvester are discussed. The hybrid energy harvester is composed of a permanent magnet, copper coil, and PVDF(polyvinylidene difluoride) piezoelectric film, and the upper U-tube device containing a cylindrical fluid barrier is connected to the foundation support plate by a hinge and spring. The two primary means of energy collection were through the vortex street, which alternately impacted the PVDF piezoelectric film through fluid shedding, and the electromotive force (EMF) induced by changes in the magnetic field position in the conducting coil. Experimentally, the maximum output power of the piezoelectric transformer of the hybrid energy harvester was 2.47 μW (circuit load 270 kΩ; liquid level height 80 mm); and the maximum output power of the electromagnetic generator was 2.72 μW (circuit load 470 kΩ; liquid level height 60 mm). The low-frequency sloshing energy collected by this energy harvester can drive microsensors for civil engineering monitoring.

Study of Cantilever Structures Based on Piezoelectric Materials for Energy Harvesting at Low Frequency of Vibration

2014 ◽  
Vol 976 ◽  
pp. 159-163 ◽  
Author(s):  
Roberto Ambrosio ◽  
Hector Gonzalez ◽  
Mario Moreno ◽  
Alfonso Torres ◽  
Rafael Martinez ◽  
...  
Keyword(s):  
Energy Harvesting ◽  
Output Power ◽  
Lead Zirconate Titanate ◽  
Maximum Output Power ◽  
Low Frequency ◽  
Electrical Contacts ◽  
Piezoelectric Energy Harvesting ◽  
Maximum Output ◽  
Coupling Coefficients ◽  
Piezoelectric Energy

In this work is presented a study of a piezoelectric energy harvesting device used for low power consumption applications operating at relative low frequency. The structure consists of a cantilever beam made by Lead Zirconate Titanate (PZT) layer with two gold electrodes for electrical contacts. The piezoelectric material was selected taking into account its high coupling coefficients. Different structures were analyzed with variations in its dimensions and shape of the cantilever. The devices were designed to operate at the resonance frequency to get maximum electrical power output. The structures were simulated using finite element (FE) software. The analysis of the harvesting devices was performed in order to investigate the influence of the geometric parameters on the output power and the natural frequency. To validate the simulation results, an experiment with a PZT cantilever with brass substrate was carried out. The experimental data was found to be very close to simulation data. The results indicate that large structures, in the order of millimeters, are the ideal for piezoelectric energy harvesting devices providing a maximum output power in the range of mW

A fully matched dual stage CMOS power amplifier with integrated passive linearizer attaining 23 db gain, 40% PAE and 28 DBM OIP3

2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Premmilaah Gunasegaran ◽  
Jagadheswaran Rajendran ◽  
Selvakumar Mariappan ◽  
Yusman Mohd Yusof ◽  
Zulfiqar Ali Abdul Aziz ◽  
...  
Keyword(s):  
Power Consumption ◽  
Output Power ◽  
Power Amplifier ◽  
Maximum Output Power ◽  
Maximum Output ◽  
Power Gain ◽  
Matching Network ◽  
Content Type ◽  
Power Added Efficiency ◽  
Main Amplifier

Purpose The purpose of this paper is to introduce a new linearization technique known as the passive linearizer technique which does not affect the power added efficiency (PAE) while maintaining a power gain of more than 20 dB for complementary metal oxide semiconductor (CMOS) power amplifier (PA). Design/methodology/approach The linearization mechanism is executed with an aid of a passive linearizer implemented at the gate of the main amplifier to minimize the effect of Cgs capacitance through the generation of opposite phase response at the main amplifier. The inductor-less output matching network presents an almost lossless output matching network which contributes to high gain, PAE and output power. The linearity performance is improved without the penalty of power consumption, power gain and stability. Findings With this topology, the PA delivers more than 20 dB gain for the Bluetooth Low Energy (BLE) Band from 2.4 GHz to 2.5 GHz with a supply headroom of 1.8 V. At the center frequency of 2.45 GHz, the PA exhibits a gain of 23.3 dB with corresponding peak PAE of 40.11% at a maximum output power of 14.3 dBm. At a maximum linear output power of 12.7 dBm, a PAE of 37.3% has been achieved with a peak third order intermodulation product of 28.04 dBm with a power consumption of 50.58 mW. This corresponds to ACLR of – 20 dBc, thus qualifying the PA to operate for BLE operation. Practical implications The proposed technique is able to boost up the efficiency and output power, as well as linearize the PA closer to 1 dB compression point. This reduces the trade-off between linear output power and PAE in CMOS PA design. Originality/value The proposed CMOS PA can be integrated comfortably to a BLE transmitter, allowing it to reduce the transceiver’s overall power consumption.

4H-SiC Planar MESFETs on High-Purity Semi-Insulating Substrates

2007 ◽  
Vol 556-557 ◽  
pp. 763-766 ◽  
Author(s):  
Jeong Hyuk Yim ◽  
Ho Keun Song ◽  
Jeong Hyun Moon ◽  
Han Seok Seo ◽  
Jong Ho Lee ◽  
...  
Keyword(s):  
Power Density ◽  
Output Power ◽  
High Purity ◽  
Maximum Output Power ◽  
Drain Current ◽  
Maximum Output ◽  
Power Gain ◽  
Si Substrates ◽  
Class A ◽  
Current Instability

Planar MESFETs were fabricated on high-purity semi-insulating (HPSI) 4H-SiC substrates. The saturation drain current of the fabricated MESFETs with a gate length of 0.5 μm and a gate width of 100 μm was 430 mA/mm, and the transconductance was 25 mS/mm. The maximum oscillation frequency and cut-off frequency were 26.4 GHz and 7.2 GHz, respectively. The power gain was 8.4 dB and the maximum output power density was 2.8 W/mm for operation of class A at CW 2 GHz. MESFETs on HPSI substrates showed no current instability and much higher output power density in comparison to MESFETs on vanadium-doped SI substrates.

GaN digital microwave outphasing PA

2020 ◽  
Vol 12 (7) ◽  
pp. 567-577
Author(s):  
Thomas Hoffmann ◽  
Andreas Wentzel ◽  
Thomas Flisgen ◽  
Florian Hühn ◽  
Wolfgang Heinrich
Keyword(s):  
Supply Voltage ◽  
Maximum Output Power ◽  
Equivalent Circuit Model ◽  
Base Station ◽  
Electromagnetic Simulation ◽  
Maximum Output ◽  
Full Information ◽  
Promising Candidate ◽  
Impedance Characteristics ◽  
Final Design

AbstractThis paper presents a novel GaN-based digital outphasing power amplifier (PA) for the 800 MHz range. The PA reaches a maximum output power of 5.8 W at 30 V final-stage (FS) drain supply voltage. A novel output combiner circuit is used and efficiency is improved by resonant commutation of the FSs and optimized driver circuits for the two GaN push-pull FSs. 3D electromagnetic simulation of output network has been conducted to extract an equivalent circuit model and to access full information in terms of functionality and broadband impedance characteristics for optimized outphasing operation in the final design. Measured total efficiencies (ηtot) of 59 and 25% at 0 and 10 dB power back-off are achieved, respectively, fitting the simulation quite well. The proposed digital outphasing module is a promising candidate for fully digitized base-station architectures in future wireless communications.

Design of a 0.7~2.6GHz Wideband Power Amplifier in 0.18-μm CMOS Process

2014 ◽  
Vol 618 ◽  
pp. 543-547
Author(s):  
Zhou Yu ◽  
Xiang Ning Fan ◽  
Zai Jun Hua ◽  
Chen Xu
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
Negative Feedback ◽  
Maximum Output Power ◽  
Cmos Process ◽  
Maximum Output ◽  
Power Gain ◽  
Class A ◽  
Simulation Results ◽  
Multi Mode

A power amplifier (PA) for multi-mode multi-standard transceiver which is implemented in a TSMC 0.18μm process is presented. The proposed PA uses matching compensation, lossy matching network and negative feedback technique to improve bandwidth. To achieve the linearity performance, the two-stage PA operates in Class-A regime. Simulation results show that the power amplifier achieves maximum output power of more than 24dBm in 0.7~2.6GHz. The output P1dBof the PA is larger than 22dBm. The simulated power gain is more than 27dB. The S11 is less than-10dB and the S22 is under-5dB.

scholarly journals A Novel Configuration of A Microstrip Power Amplifier based on GaAs-FET for ISM Applications

2018 ◽  
Vol 8 (5) ◽  
pp. 3882
Author(s):  
Amine Rachakh ◽  
Larbi El Abdellaoui ◽  
Jamal Zbitou ◽  
Ahmed Errkik ◽  
Abdelali Tajmouati ◽  
...  
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
Return Loss ◽  
Maximum Output Power ◽  
Maximum Power ◽  
Design System ◽  
Stability Factor ◽  
Maximum Output ◽  
Power Gain ◽  
Microstrip Technology

Power Amplifiers (PA) are very indispensable components in the design of numerous types of communication transmitters employed in microwave technology. The methodology is exemplified through the design of a 2.45GHz microwave power Amplifier (PA) for the industrial, scientific and medical (ISM) applications using microstrip technology. The main design target is to get a maximum power gain while simultaneously achieving a maximum output power through presenting the optimum impedance which is characteristically carried out per adding a matching circuit between the source and the input of the power amplifier and between the load and the output of the power amplifier. A "T" matching technique is used at the input and the output sides of transistor for assure in band desired that this circuit without reflections and to obtain a maximum power gain. The proposed power amplifier for microwave ISM applications is designed, simulated and optimized by employing Advanced Design System (ADS) software by Agilent. The PA shows good performances in terms of return loss, output power, power gain and stability; the circuit has an input return loss of -38dB and an output return loss of -33.5dB. The 1-dB compression point is 8.69dBm and power gain of the PA is 19.4dBm. The Rollet's Stability measure B1 and the stability factor K of the amplifier is greater than 0 and 1 respectively, which shows that the circuit is unconditionally stable. The total chip size of the PA is 73.5× 36 mm2.

scholarly journals MEMS energy harvesters with a wide bandwidth for low frequency vibrations

2015 ◽  
Author(s):  
◽  
Nuh Sadi Yuksek
Keyword(s):  
Resonance Frequency ◽  
High Frequency ◽  
Maximum Output Power ◽  
Low Frequency ◽  
Maximum Output ◽  
Wide Bandwidth ◽  
Electromagnetic Power ◽  
Wide Range ◽  
Macro Scale ◽  
Load Resistor

We have designed and built macro-scale wideband electrostatic and electromagnetic power harvesters for low frequency vibration. Initially, MEMS capacitive plates for power harvesting have been designed, modeled and fabricated, and characterized. It was designed with a 2 x 2 mm2 movable metallic plate with a thickness of 10 [mu]m suspended by four straight beams above a fixed electrode with a gap of 10 [mu]m to form a variable capacitor. The suspension beams are made with a width, thickness and total length of 20 [mu]m, 10 [mu]m and 1500 [mu]m, respectively. It was found that the single cavity device can harvest almost 180 nW peak power across a 100 k[omega] load resistor at 5g. The harvested power was dependent on excitation amplitude and supplied DC voltage. The MEMS capacitive energy harvester was integrated with two impact oscillators at 18 Hz and 25 Hz for transferring energy from low frequency structural vibration with varying mechanical spectra to high frequency vibration of a high resonance frequency cantilever at 605 Hz. The results demonstrate that the device was able to harvest power on a wide range from 14 to 39 Hz at 1g excitation. The harvested power was 96 nW on a 100 k[omega] load resistor. We also studied a macro-scale electromagnetic power harvester with multi-impact oscillations to achieve a broad bandwidth at low frequency vibrations. The device consists of three low frequency cantilever designed to resonate at 12 Hz, 19 Hz and 40 Hz, a high frequency cantilever with resonance frequency of 210 Hz and a pick-up coil fixed at the tip of the high frequency cantilever. This results in a wide bandwidth response from 11-62 Hz at 1 g. A maximum output power of 23.5 [mu]W can be harvested at 1 g acceleration on an optimum load resistor of 22 [omega].

A 5.2/5.8 GHz Dual Band On-Off Keying Transmitter Design for Bio-Signal Transmission

2018 ◽  
Vol 3 (2) ◽  
Author(s):  
Chang-Hsi Wu ◽  
Hong-Cheng You ◽  
Shun-Zhao Huang
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
Power Efficiency ◽  
Supply Voltage ◽  
Maximum Output Power ◽  
Dual Band ◽  
Maximum Output ◽  
Power Combiner ◽  
Power Added Efficiency ◽  
Chip Size

Abstract An architecture of 5.2/5.8-GHz dual-band on-off keying (DBOOK) modulated transmitter is designed in a 0.18-μm CMOS technology. The proposed DBOOK transmitter is used in the biosignal transmission system with high power efficiency and small area. To reduce power consumption and enhance output swing, two pairs of center-tapped transformers are used as both LC tank and source grounding choke for the designed voltage controlled oscillator (VCO). Switching capacitances are used to achieve dual band operations, and a complemented power combiner is used to merge the differential output power of VCO to a single-ended output. Besides, the linearizer circuits are used in the proposed power amplifier with wideband output matching to improve the linearity both at 5.2/5.8-GHz bands. The designed DBOOK transmitter is implemented by dividing it into two chips. One chip implements the dual-band switching VCO and power combiner, and the other chip implements a linear power amplifier including dual-band operation. The first chip drives an output power of 2.2mW with consuming power of 5.13 mW from 1.1 V supply voltage. With the chip size including pad of 0.61 × 0.91 m2, the measured data rate and transmission efficiency attained are 100 Mb/s and 51 pJ/bit, respectively. The second chip, for power enhanced mode, exhibits P1 dB of −9 dBm, IIP3 of 1 dBm, the output power 1 dB compression point of 12.42 dBm, OIP3 of about 21 dBm, maximum output power of 17.02/16.18 dBm, and power added efficiency of 17.13/16.95% for 5.2/ 5.8 GHz. The chip size including pads is 0:693 × 1:084mm2.

scholarly journals A Low-Voltage Multi-Band ZigBee Transceiver

Electronics ◽  
2019 ◽  
Vol 8 (12) ◽  
pp. 1474
Author(s):  
Zhiqun Li ◽  
Yan Yao ◽  
Zengqi Wang ◽  
Guoxiao Cheng ◽  
Lei Luo
Keyword(s):  
Frequency Synthesizer ◽  
Low Voltage ◽  
Supply Voltage ◽  
Maximum Output Power ◽  
Cmos Technology ◽  
Maximum Output ◽  
Band Pass Filter ◽  
Pass Filter ◽  
Front End ◽  
Band Pass

This paper presents a low-voltage ZigBee transceiver covering a unique frequency band of 780/868/915/2400 MHz in 180 nm CMOS technology. The design consists of a receiver with a wideband variable-gain front end and a complex band-pass filter (CBPF) based on poles construction, a transmitter employing the two-point direct-modulation structure, a Ʃ-Δ fractional-N frequency synthesizer with two VCOs and some auxiliary circuits. The measured results show that under 1 V supply voltage, the receiver reaches −93.8 dBm and −102 dBm sensitivity for 2.4 GHz and sub-GHz band, respectively, and dissipates only 1.42 mW power. The frequency synthesizer achieves −106.8 dBc/Hz and −116.7 dBc/Hz phase noise at 1 MHz frequency offset along with 4.2 mW and 3.5 mW power consumption for 2.4 GHz and sub-GHz band, respectively. The transmitter features 2.67 dBm and 12.65 dBm maximum output power at the expense of 21.2 mW and 69.5 mW power for 2.4 GHz and sub-GHz band, respectively.

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