Material-Technological Approach in the Formation of Interconnects in Microelectronic Device Structures

Conductor, resistor, and dielectric patterns of microelectronic device are usually defined by exposure of a photosensitive material through a mask onto the device with subsequent development of the photoresist and chemical removal of the undesired materials. Standard optical techniques are limited and electron lithography provides several important advantages, including the ability to expose features as small as 1,000 Å, and direct exposure on the wafer with no intermediate mask. This presentation is intended to report how electron lithography was used to define the permalloy patterns which are used to manipulate domains in magnetic bubble memory devices.The electron optical system used in our experiment as shown in Fig. 1 consisted of a high resolution scanning electron microscope, a computer, and a high precision motorized specimen stage. The computer is appropriately interfaced to address the electron beam, control beam exposure, and move the specimen stage.

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A technique to prepare cross-sectional TEM specimens of semiconducting devices

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s042482010014508x ◽

1986 ◽

Vol 44 ◽

pp. 742-743

Author(s):

A. K. Rai ◽

P. P. Pronko

Keyword(s):

Thin Films ◽

Surface Region ◽

Sample Surface ◽

Specific Region ◽

Cross Sectional ◽

Thin Sections ◽

The Past ◽

Device Structures ◽

Ion Implanted

Several techniques have been reported in the past to prepare cross(x)-sectional TEM specimen. These methods are applicable when the sample surface is uniform. Examples of samples having uniform surfaces are ion implanted samples, thin films deposited on substrates and epilayers grown on substrates. Once device structures are fabricated on the surfaces of appropriate materials these surfaces will no longer remain uniform. For samples with uniform surfaces it does not matter which part of the surface region remains in the thin sections of the x-sectional TEM specimen since it is similar everywhere. However, in order to study a specific region of a device employing x-sectional TEM, one has to make sure that the desired region is thinned. In the present work a simple way to obtain thin sections of desired device region is described.

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Behavior of contact-silicided TFSOI gate structures

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100172036 ◽

1994 ◽

Vol 52 ◽

pp. 860-861

Author(s):

N. David Theodore ◽

Juergen Foerstner ◽

Peter Fejes

Keyword(s):

Semiconductor Device ◽

Series Resistance ◽

Field Effect Transistors ◽

Silicon Layer ◽

Device Fabrication ◽

Silicon On Insulator ◽

Continuous Layer ◽

Buried Oxide ◽

Device Structures ◽

Thin Silicon

As semiconductor device dimensions shrink and packing-densities rise, issues of parasitic capacitance and circuit speed become increasingly important. The use of thin-film silicon-on-insulator (TFSOI) substrates for device fabrication is being explored in order to increase switching speeds. One version of TFSOI being explored for device fabrication is SIMOX (Silicon-separation by Implanted OXygen).A buried oxide layer is created by highdose oxygen implantation into silicon wafers followed by annealing to cause coalescence of oxide regions into a continuous layer. A thin silicon layer remains above the buried oxide (~220 nm Si after additional thinning). Device structures can now be fabricated upon this thin silicon layer.Current fabrication of metal-oxidesemiconductor field-effect transistors (MOSFETs) requires formation of a polysilicon/oxide gate between source and drain regions. Contact to the source/drain and gate regions is typically made by use of TiSi2 layers followedby Al(Cu) metal lines. TiSi2 has a relatively low contact resistance and reduces the series resistance of both source/drain as well as gate regions

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Defect morphology in thick relaxed layers of InGaAs on GaAs

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100176472 ◽

1990 ◽

Vol 48 (4) ◽

pp. 668-669

Author(s):

R H Dixon ◽

P Kidd ◽

P J Goodhew

Keyword(s):

Electron Microscopy ◽

Surface Morphology ◽

Growth Conditions ◽

X Ray Diffraction ◽

Double Crystal ◽

Strained Layers ◽

Good Surface ◽

Transmission Electron ◽

Device Structures ◽

Surface Morphologies

Thick relaxed InGaAs layers grown epitaxially on GaAs are potentially useful substrates for growing high indium percentage strained layers. It is important that these relaxed layers are defect free and have a good surface morphology for the subsequent growth of device structures.3μm relaxed layers of InxGa1-xAs were grown on semi - insulating GaAs substrates by Molecular Beam Epitaxy (MBE), where the indium composition ranged from x=0.1 to 1.0. The interface, bulk and surface of the layers have been examined in planar view and cross-section by Transmission Electron Microscopy (TEM). The surface morphologies have been characterised by Scanning Electron Microscopy (SEM), and the bulk lattice perfection of the layers assessed using Double Crystal X-ray Diffraction (DCXRD).The surface morphology has been found to correlate with the growth conditions, with the type of defects grown-in to the layer (e.g. stacking faults, microtwins), and with the nature and density of dislocations in the interface.

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ELECTRON BEAM SOURCE MOLECULAR BEAM EPITAXY OF AlxGa1-xAs GRADED BAND GAP DEVICE STRUCTURES

Le Journal de Physique Colloques ◽

10.1051/jphyscol:19884127 ◽

1988 ◽

Vol 49 (C4) ◽

pp. C4-607-C4-614

Author(s):

R. J. MALIK ◽

A. F.J. LEVI ◽

B. F. LEVINE ◽

R. C. MILLER ◽

D. V. LANG ◽

...

Keyword(s):

Electron Beam ◽

Molecular Beam Epitaxy ◽

Band Gap ◽

Molecular Beam ◽

Beam Source ◽

Device Structures ◽

Graded Band Gap

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Electron tomography of microelectronic device interconnects

International Journal of Materials Research (formerly Zeitschrift fuer Metallkunde) ◽

10.3139/146.101315 ◽

2006 ◽

Vol 97 (7) ◽

pp. 880-884

Author(s):

Qing Yang ◽

John Mardinly ◽

Christian Kübel ◽

Chris Nelson ◽

Christian Kisielowski

Keyword(s):

Electron Tomography ◽

Microelectronic Device

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Automated Diagonal Slice and View Solution for 3D Device Structure Analysis

10.31399/asm.cp.istfa2018p0224 ◽

2018 ◽

Author(s):

Sang Hoon Lee ◽

Jeff Blackwood ◽

Stacey Stone ◽

Michael Schmidt ◽

Mark Williamson ◽

...

Keyword(s):

Cross Section ◽

Focused Ion Beam ◽

Ion Beam ◽

Image Data ◽

Planar Surface ◽

Device Structure ◽

Cross Sectional ◽

Device Structures ◽

The Cross ◽

Planar Analysis

Abstract The cross-sectional and planar analysis of current generation 3D device structures can be analyzed using a single Focused Ion Beam (FIB) mill. This is achieved using a diagonal milling technique that exposes a multilayer planar surface as well as the cross-section. this provides image data allowing for an efficient method to monitor the fabrication process and find device design errors. This process saves tremendous sample-to-data time, decreasing it from days to hours while still providing precise defect and structure data.

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Root Cause Analyses of Metal Bridging for Copper Damascene Process

ISTFA 2005: Conference Proceedings from the 31st International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2005p0283 ◽

2005 ◽

Author(s):

Z. G. Song ◽

S. P. Neo ◽

S. K. Loh ◽

C. K. Oh

Keyword(s):

Failure Mechanisms ◽

Copper Corrosion ◽

Microelectronic Device ◽

Root Cause ◽

Damascene Process ◽

New Process ◽

Copper Cmp

Abstract New process will introduce new failure mechanisms during microelectronic device manufacturing. Even if the same defect, its root causes can be different for different processes. For aluminum(Al)-tungsten(W) metallization, the root cause of metal bridging is quite simple and mostly it is blocked etch or under-etch. But, for copper damascene process, the root causes of metal bridging are complicated. This paper has discussed the various root causes of metal bridging for copper damascene process, such as those related to litho-etch issue, copper CMP issue, copper corrosion issue and so on.

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