Characterization of high mobility inverted coplanar Zinc Nitride Thin-film Transistors

In this work, high mobility TFTs based on zinc nitride (Zn3N2) sputtered at room temperature using spin-on glass (SOG) as gate dielectric are presented. The inverted coplanar structure is used for the Zn3N2 TFTs. The devices exhibit an on/off-current ratio of 106 and a subthreshold slope of 0.88 V/decade. The extracted field-effect mobility was 15.8 cm2/Vs which is among the highest reported for Zn3N2 TFTs. In addition, n-type MOS capacitors were fabricated and characterized by capacitance – voltage and capacitance – frequency measurements to evaluate the dielectric characteristics of the SOG film.

Download Full-text

Characterization of HfO2/Si Exposed to Water Vapor at Room Temperature

MRS Proceedings ◽

10.1557/proc-0917-e11-02 ◽

2006 ◽

Vol 917 ◽

Author(s):

Carlos Driemeier ◽

Elizandra Martinazzi ◽

Israel J. R. Baumvol ◽

Evgeni Gusev

Keyword(s):

Water Vapor ◽

Metal Oxide ◽

Room Temperature ◽

Gate Dielectric ◽

Metal Oxide Semiconductor ◽

Oxide Semiconductor ◽

Dielectric Films ◽

Nuclear Reaction Analysis ◽

Environmental Air

AbstractHfO2-based materials are the leading candidates to replace SiO2 as the gate dielectric in Si-based metal-oxide-semiconductor filed-effect transistors. The ubiquitous presence of water vapor in the environments to which the dielectric films are exposed (e.g. in environmental air) leads to questions about how water could affect the properties of the dielectric/Si structures. In order to investigate this topic, HfO2/SiO2/Si(001) thin film structures were exposed at room temperature to water vapor isotopically enriched in 2H and 18O followed by quantification and profiling of these nuclides by nuclear reaction analysis. We showed i) the formation of strongly bonded hydroxyls at the HfO2 surface; ii) room temperature migration of oxygen and water-derived oxygenous species through the HfO2 films, indicating that HfO2 is a weak diffusion barrier for these oxidizing species; iii) hydrogenous, water-derived species attachment to the SiO2 interlayer, resulting in detrimental hydrogenous defects therein. Consequences of these results to HfO2-based metal-oxide-semiconductor devices are discussed.

Download Full-text

Ultrasensitive negative capacitance phototransistors

Nature Communications ◽

10.1038/s41467-019-13769-z ◽

2020 ◽

Vol 11 (1) ◽

Cited By ~ 17

Author(s):

Luqi Tu ◽

Rongrong Cao ◽

Xudong Wang ◽

Yan Chen ◽

Shuaiqin Wu ◽

...

Keyword(s):

Room Temperature ◽

Gate Dielectric ◽

Negative Capacitance ◽

Subthreshold Slope ◽

Electrical And Optical Properties ◽

Promising Candidate ◽

Combined Action ◽

Zirconium Oxide Film ◽

Dark Currents ◽

Steep Subthreshold Slope

AbstractSensitive photodetection is crucial for modern optoelectronic technology. Two-dimensional molybdenum disulfide (MoS2) with unique crystal structure, and extraordinary electrical and optical properties is a promising candidate for ultrasensitive photodetection. Previously reported methods to improve the performance of MoS2 photodetectors have focused on complex hybrid systems in which leakage paths and dark currents inevitably increase, thereby reducing the photodetectivity. Here, we report an ultrasensitive negative capacitance (NC) MoS2 phototransistor with a layer of ferroelectric hafnium zirconium oxide film in the gate dielectric stack. The prototype photodetectors demonstrate a hysteresis-free ultra-steep subthreshold slope of 17.64 mV/dec and ultrahigh photodetectivity of 4.75 × 1014 cm Hz1/2 W−1 at room temperature. The enhanced performance benefits from the combined action of the strong photogating effect induced by ferroelectric local electrostatic field and the voltage amplification based on ferroelectric NC effect. These results address the key challenges for MoS2 photodetectors and offer inspiration for the development of other optoelectronic devices.

Download Full-text

Characterization of a Disordered above Room Temperature Skyrmion Material Co8Zn8Mn4

Materials ◽

10.3390/ma14164689 ◽

2021 ◽

Vol 14 (16) ◽

pp. 4689

Author(s):

Melissa E. Henderson ◽

James Beare ◽

Sudarshan Sharma ◽

Markus Bleuel ◽

Pat Clancy ◽

...

Keyword(s):

Magnetic Susceptibility ◽

Room Temperature ◽

Equilibrium Phase ◽

High Mobility ◽

Structural Disorder ◽

Bulk Sample ◽

Great Promise ◽

X Ray Diffraction ◽

Diffraction Patterns

Topologically nontrivial spin textures host great promise for future spintronic applications. Skyrmions in particular are of burgeoning interest owing to their nanometric size, topological protection, and high mobility via ultra-low current densities. It has been previously reported through magnetic susceptibility, microscopy, and scattering techniques that Co8Zn8Mn4 forms an above room temperature triangular skyrmion lattice. Here, we report the synthesis procedure and characterization of a polycrystalline Co8Zn8Mn4 disordered bulk sample. We employ powder X-ray diffraction and backscatter Laue diffraction as characterization tools of the crystallinity of the samples, while magnetic susceptibility and Small Angle Neutron Scattering (SANS) measurements are performed to study the skyrmion phase. Magnetic susceptibility measurements show a dip anomaly in the magnetization curves, which persists over a range of approximately 305 K–315 K. SANS measurements reveal a rotationally disordered polydomain skyrmion lattice. Applying a symmetry-breaking magnetic field sequence, we were able to orient and order the previously jammed state to yield the prototypical hexagonal diffraction patterns with secondary diffraction rings. This emergence of the skyrmion order serves as a unique demonstration of the fundamental interplay of structural disorder and anisotropy in stabilizing the thermal equilibrium phase.

Download Full-text

Characterization of SiC Implanted with B or Al Using Thermal Admittance Spectroscopy

MRS Proceedings ◽

10.1557/proc-719-f8.16 ◽

2002 ◽

Vol 719 ◽

Cited By ~ 1

Author(s):

S.R. Smith ◽

M.A. Capano ◽

A.O. Evwaraye

Keyword(s):

Thermal Activation ◽

Room Temperature ◽

Schottky Diodes ◽

Low Frequency ◽

Energy Shift ◽

Shallow Donor ◽

Admittance Spectroscopy ◽

Capacitance Voltage ◽

Dopant Atoms

AbstractWe have measured the thermal activation energies of electrically active defects in 4H- and 6H-SiC implanted with either Al or B ions, using Thermal Admittance Spectroscopy. The net acceptor concentrations were monitored using room temperature low frequency Capacitance-Voltage measurements. The substrates were n/n+ epilayers. The implantations plus annealing produced p-type layers that were acceptable for characterization. The specimens were annealed in Ar at 1600 ° C, after which Ni Schottky diodes were fabricated on the specimens. Annealing times were 5, 15, 30, and 60 min. In some of the specimens, a shallow level was found that did not correspond to known levels. As the annealing progressed, energy shifts were noted for some of the detected levels. In some specimens, the implanted p-type impurity and the n-type residual dopants in the substrate were simultaneously detected. Measurements of electrically active ptype species were compared to “control” specimens implanted with Ar. From this comparison, we conclude that at least one shallow donor level is introduced into the bandgap by the implantation process, and is not annealed out. The defects associated with the implantation may affect actual device performance of diodes by destabilizing the lattice occupation of the implanted dopant atoms (energy shift with annealing), and act as lifetime killers.

Download Full-text

Characterization of LaxHfyO Gate Dielectrics in 4H-SiC MOS Capacitor

Materials Science Forum ◽

10.4028/www.scientific.net/msf.778-780.549 ◽

2014 ◽

Vol 778-780 ◽

pp. 549-552 ◽

Cited By ~ 2

Author(s):

Jing Hua Xia ◽

David M. Martin ◽

Sethu Saveda Suvanam ◽

Carl Mikael Zetterling ◽

Mikael Östling

Keyword(s):

Gate Dielectric ◽

Gate Dielectrics ◽

Atomic Layer ◽

Deposition Process ◽

Mos Capacitors ◽

Mos Capacitor ◽

Layer Deposition ◽

High K ◽

Film Characteristics

LaxHfyO nanolaminated thin film deposited using atomic layer deposition process has been studied as a high-K gate dielectric in 4H-SiC MOS capacitors. The electrical and nano-laminated film characteristics were studied with increasing post deposition annealing (PDA) in N2O ambient. The result shows that high quality LaxHfyO nano-laminated thin films with good interface and bulk qualities are fabricated using high PDA temperature.

Download Full-text

Analysis of C-Face 4H-SiC MOS Capacitors with ZrO2 Gate Dielectric

Materials Science Forum ◽

10.4028/www.scientific.net/msf.778-780.635 ◽

2014 ◽

Vol 778-780 ◽

pp. 635-638 ◽

Cited By ~ 4

Author(s):

Le Shan Chan ◽

Yu Hao Chang ◽

Kung Yen Lee

Keyword(s):

High Frequency ◽

Room Temperature ◽

Gate Dielectric ◽

Dielectric Breakdown ◽

Annealing Process ◽

Rapid Thermal Annealing Process ◽

Leakage Currents ◽

Mos Capacitors ◽

Thermal Annealing Process ◽

The Difference

ZrO2 films were deposited on C-face 4H-SiC substrates by using an RF sputter at a temperature of 200°C. Then, ZrO2 films were treated with RTA (rapid thermal annealing) process in Argon (Ar) ambient at 600°C, 700°C and 800°C for 4 minutes, respectively. The samples with RTA process show the lower leakage currents. As the measure temperature increases from room temperature (RT) to 150°C, the dielectric breakdown voltage reduces from 3 V to 1 V. The difference between quasi C-V characteristics and high frequency C-V characteristics at 1 MHz becomes larger with increasing RTA temperature. The C-V curves also shift to the left side as the measure temperature increases from RT to 150°C. It also shows the ledge on the C-V curves of samples with RTA at elevated measure temperature.

Download Full-text

Electrical and Optical Characterization of InSb Grown on GaAs by MBE

MRS Proceedings ◽

10.1557/proc-160-685 ◽

1989 ◽

Vol 160 ◽

Author(s):

Phillip E. Thompson ◽

James Waterman ◽

D. Kurtgaskill ◽

Robert Stahlbush ◽

Daniel Gammon ◽

...

Keyword(s):

Room Temperature ◽

Lattice Mismatch ◽

Optical Characterization ◽

Layer Growth ◽

Temperature Dependent ◽

Carrier Lifetimes ◽

Capacitance Voltage ◽

Ir Transmission ◽

Mis Capacitors

AbstractInSb has been grown on semi-insulating GaAs substrates by molecular beam epitaxy. By growing an InSb buffer layer at 300 C prior to the main InSb layer growth at 420 C, the effect of the 14% lattice mismatch between GaAs and InSb was minimized. A typical 5 µrn InSb film had a room temperature carrier concentration and electron Hall mobility of 2 × 1016/cm3 and 6×104 cm2/Vs, respectively. At 77 K these values became 2 × 1015/cm3 and 1.1 ×105 cm2/Vs. Temperature dependent Hall measurements revealed a peak in the mobility at 85 K and 70 K for the 5 and 10 µm samples. Capacitance-voltage measurements using MIS capacitors produced 77 K carrier concentrations in agreement with the low fieldHall measurements. Carrier lifetimes were determined by photoconductive response measurements. Lifetimes of 20 ns and 50 ns were determined for the 5 and 10 µm films. For comparison, the carrier lifetime in bulk n-type InSb was found to be 200 ns. Optical characterization by room temperature IR transmission spectroscopy showed a broad absorption edge, with an absorption coefficient of 1.4 × 103/cm at a wavelength of 6 µm. Epilayer thickness was determined from observed interference fringes. Raman spectroscopy showed that each epitaxial layer had a spectrum equivalent to that of bulk InSb.

Download Full-text

Electrical characterization of MOS capacitors with SiO/sub 2/-TiO/sub 2/ dielectric stack made by room temperature plasma oxidation

Proceedings of the Fifth IEEE International Caracas Conference on Devices, Circuits and Systems, 2004. ◽

10.1109/iccdcs.2004.1393377 ◽

2005 ◽

Author(s):

H. Baez ◽

M. Estrada ◽

J.C. Tinoco

Keyword(s):

Room Temperature ◽

Electrical Characterization ◽

Plasma Oxidation ◽

Temperature Plasma ◽

Mos Capacitors

Download Full-text

Formation and Characterization of Hybrid Nanodots Floating Gate for Optoelectronic Application

MRS Proceedings ◽

10.1557/opl.2013.272 ◽

2013 ◽

Vol 1510 ◽

Author(s):

Seiichi Miyazaki

Keyword(s):

Room Temperature ◽

Drain Current ◽

Electron Injection ◽

Floating Gate ◽

Back Side ◽

Mos Capacitors ◽

Optoelectronic Application ◽

And Storage ◽

Si Quantum Dots

ABSTRACTWe have fabricated a hybrid nanodots floating gate (FG) in which Si quantum dots (QDs) and silicide nanodots (NDs) are stacked with a very thin SiO2 interlayer in order to satisfy both multiple valued capability and charge storage capacity for a sufficient memory window and to open up novel functionality for optoelectronic application. In electron charging and discharging characteristics measured with application of pulsed gate biases to MOS capacitors with a hybrid NDs FG, stepwise changes in the rates for electron injection and emission were revealed with increasing pulse width at room temperature. Also, nMOSFETs with a hybrid NDs FG show unique hysteresis with stepwise changes in the drain current - gate voltage characteristics. The observed characteristics can be interpreted in terms that the electron injection and storage into silicide-NDs proceed through the discrete charged states of Si-QDs. For MOS capacitors with a triple-stacked hybrid NDs FG fabricated by adding another Si-QDs, by subgap light irradiation from the back side of the Si substrate, a distinct infrared optical response in C-V characteristics was detected at room temperature. The result is attributable to the shift of charge centroid in the hybrid NDs FG as a result of transfer of photoexcited electrons from silicide NDs to Si-QDs.

Download Full-text