Advanced Laser Probe Techniques Applied to FA of RF Integrated Circuits - A Case Study

2012 ◽  
Author(s):  
Mark Kimball ◽  
Christopher Nemirow
Keyword(s):  
Integrated Circuits ◽  
Measurement Technique ◽  
Capacitive Coupling ◽  
Challenging Problem ◽  
Rf Integrated Circuits ◽  
Laser Probe ◽  
Voltage Imaging ◽  
Alternative Measurement ◽  
Capacitive Loading

Abstract Failure analysis of RFIC’s can be a challenging problem, particularly as frequencies ascend into the medium to high GHz region. As frequency goes up, active probes become less and less accurate due to capacitive loading of circuit nodes, and capacitive coupling of stray signals into the probe from nearby circuit traces. We have found that Laser Voltage Imaging (LVi) offers an alternative measurement technique that can avoid these problems. But our work also showed that there are unusual failure signatures which appear as signal frequencies go up. A combination of LVI and RF-SDL was found to yield the best result.

A new methodology for optimal RF DFT sensor design

2012 ◽  
Vol 4 (5) ◽  
pp. 515-521 ◽  
Author(s):  
Conrado K. Mesadri ◽  
Aziz Doukkali ◽  
Philippe Descamps ◽  
Christophe Kelma
Keyword(s):  
Integrated Circuits ◽  
Dispersion Analysis ◽  
Design Flow ◽  
Design For Test ◽  
Rf Integrated Circuits ◽  
Test Technique ◽  
Copula Theory ◽  
Parametric Statistics ◽  
Process Dispersion

In this paper, a new methodology to compare the robustness of sensor structures employed in radiofrequency design for test (RF DFT) architectures for RF integrated circuits (ICs) is proposed. First, the yield loss and defect level of the test technique is evaluated using a statistical model of the Circuit under Test (obtained through non-parametric statistics and copula theory). Then, by carrying out the dispersion analysis of the sensor architecture, a figure of merit is established. This methodology reduces the number of iterations in the design flow of RF DFT sensors and makes it possible to evaluate process dispersion. The case study is a SiGe:C BiCMOS LNA tested by a single-probe measurement.

scholarly journals A Novel Design and Optimization Approach for Low Noise Amplifiers (LNA) Based on MOST Scattering Parameters and the gm/ID Ratio

Electronics ◽  
2020 ◽  
Vol 9 (5) ◽  
pp. 785
Author(s):  
Juan L. Castagnola ◽  
Fortunato C. Dualibe ◽  
Agustín M. Laprovitta ◽  
Hugo García-Vázquez
Keyword(s):  
Integrated Circuits ◽  
Noise Figure ◽  
Low Noise ◽  
Low Noise Amplifiers ◽  
Optimization Approach ◽  
Scattering Parameters ◽  
Rf Integrated Circuits ◽  
Design And Optimization ◽  
Noise Amplifier

This work presents a new design methodology for radio frequency (RF) integrated circuits based on a unified analysis of the scattering parameters of the circuit and the gm/ID ratio of the involved transistors. Since the scattering parameters of the circuits are parameterized by means of the physical characteristics of transistors, designers can optimize transistor size and biasing to comply with the circuit specifications given in terms of S-parameters. A complete design of a cascode low noise amplifier (LNA) in MOS 65 nm technology is taken as a case study in order to validate the approach. In addition, this methodology permits the identification of the best trade-off between the minimum noise figure and the maximum gain for the LNA in a very simple way.

Thermal Frequency Imaging: A New Application of Laser Voltage Imaging Applied on 40nm Technology

2011 ◽  
Author(s):  
Guillaume Celi ◽  
Sylvain Dudit ◽  
Thierry Parrassin ◽  
Philippe Perdu ◽  
Antoine Reverdy ◽  
...  
Keyword(s):  
Charge Carrier ◽  
Laser Beam ◽  
Integrated Circuit ◽  
Carrier Density ◽  
Deep Submicron ◽  
Charge Carrier Density ◽  
Voltage Imaging ◽  
A New Technique ◽  
Scan Chain

Abstract For Very Deep submicron Technologies, techniques based on the analysis of reflected laser beam properties are widely used. The Laser Voltage Imaging (LVI) technique, introduced in 2009, allows mapping frequencies through the backside of integrated circuit. In this paper, we propose a new technique based on the LVI technique to debug a scan chain related issue. We describe the method to use LVI, usually dedicated to frequency mapping of digital active parts, in a way that enables localization of resistive leakage. Origin of this signal is investigated on a 40nm case study. This signal can be properly understood when two different effects, charge carrier density variations (LVI) and thermo reflectance effect (Thermal Frequency Imaging, TFI), are taken into account.

Laser Voltage Imaging: A New Perspective of Laser Voltage Probing

2010 ◽  
Author(s):  
Yin S. Ng ◽  
Ted Lundquist ◽  
Dmitry Skvortsov ◽  
Joy Liao ◽  
Steven Kasapi ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Functional Failure ◽  
Voltage Imaging ◽  
Laser Probing ◽  
New Perspective

Abstract Laser Voltage Imaging (LVI) is a new application developed from Laser Voltage Probing (LVP). Most LVP applications have focused on design debug or design characterization, and are seldom used for global functional failure analysis. LVI enables the failure analysis engineer to utilize laser probing techniques in the failure analysis realm. In this paper, we present LVI as an emerging FA technique. We will discuss setting up an LVI acquisition and present its current challenges. Finally, we will present an LVI application in the form of a case study.

Electrical Probing and Surface Imaging of Deep Sub-Micron Integrated Circuits

1999 ◽  
Author(s):  
Kenneth Krieg ◽  
Richard Qi ◽  
Douglas Thomson ◽  
Greg Bridges
Keyword(s):  
High Resolution ◽  
Integrated Circuits ◽  
Real Time ◽  
High Speed ◽  
Time Signal ◽  
Surface Imaging ◽  
Atomic Force ◽  
Submicron Structures ◽  
High Resolution Images ◽  
Capacitive Loading

Abstract A contact probing system for surface imaging and real-time signal measurement of deep sub-micron integrated circuits is discussed. The probe fits on a standard probe-station and utilizes a conductive atomic force microscope tip to rapidly measure the surface topography and acquire real-time highfrequency signals from features as small as 0.18 micron. The micromachined probe structure minimizes parasitic coupling and the probe achieves a bandwidth greater than 3 GHz, with a capacitive loading of less than 120 fF. High-resolution images of submicron structures and waveforms acquired from high-speed devices are presented.

Magnetic Current Imaging Techniques: Comparative Case Studies

2004 ◽  
Author(s):  
Olivier Crépel ◽  
Philippe Descamps ◽  
Patrick Poirier ◽  
Romain Desplats ◽  
Philippe Perdu ◽  
...  
Keyword(s):  
Magnetic Field ◽  
Integrated Circuits ◽  
Case Studies ◽  
Flip Chip ◽  
Imaging Techniques ◽  
Optimal Domain ◽  
Magnetic Current ◽  
Comparative Case Studies ◽  
Current Flows

Abstract Magnetic field based techniques have shown great capabilities for investigation of current flows in integrated circuits (ICs). After reviewing the performances of SQUID, GMR (hard disk head technologies) and MTJ existing sensors, we will present results obtained on various case studies. This comparison will show the benefit of each approach according to each case study (packaged devices, flip-chip circuits, …). Finally we will discuss on the obtained results to classify current techniques, optimal domain of applications and advantages.

Schmitt Trigger-Based Key Provisioning for Locking Analog/RF Integrated Circuits

2020 ◽  
Author(s):  
A. Sanabria-Borbon ◽  
N. G. Jayasankaran ◽  
S. Lee ◽  
E. Sanchez-Sinencio ◽  
J. Hu ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Schmitt Trigger ◽  
Rf Integrated Circuits

Smart RF Integrated Circuits: A Millimeter-Wave Gigabit Transceiver with Digitally-Enabled Built-In Self-Healing and Auto-Switching Functions

2019 ◽  
Vol 20 (1) ◽  
pp. 28-37 ◽  
Author(s):  
Jenny Yi-Chun Liu ◽  
Ian Huang ◽  
Yen-Hung Kuo ◽  
Wei-Tsung Li ◽  
Wei-Heng Lin ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Millimeter Wave ◽  
Self Healing ◽  
Rf Integrated Circuits ◽  
Switching Functions
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