Nanoprobing of Advanced Silicon-On-Insulator Transistors

2019 ◽  
Author(s):  
Stefano Larentis ◽  
Kent Erington ◽  
Jose Z. Garcia ◽  
Khiem Ly ◽  
Kris Dickson ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Case Studies ◽  
Electrical Characterization ◽  
Silicon On Insulator ◽  
New Device ◽  
Device Structures ◽  
Well Leakage ◽  
Soi Technology

Abstract As advanced silicon-on-insulator (SOI) technology becomes a more widespread technology offering, failure analysis approaches should be adapted to new device structures. We review two nanoprobing case studies of advanced SOI technology, detailing the electrical characterization of a compound gate-to-drain defect as well as the characterization of unexpected SOI source-to-well leakage.

Case Studies in Atomic Force Probe Analysis

2006 ◽  
Author(s):  
Randal Mulder ◽  
Sam Subramanian ◽  
Tony Chrastecky
Keyword(s):  
Failure Analysis ◽  
Case Studies ◽  
Light Emission ◽  
Electrical Characterization ◽  
Logic Circuits ◽  
Contrast Imaging ◽  
Atomic Force ◽  
Measuring Surface ◽  
Analysis Environment

Abstract The use of atomic force probe (AFP) analysis in the analysis of semiconductor devices is expanding from its initial purpose of solely characterizing CMOS transistors at the contact level with a parametric analyzer. Other uses found for the AFP include the full electrical characterization of failing SRAM bit cells, current contrast imaging of SOI transistors, measuring surface roughness, the probing of metallization layers to measure leakages, and use with other tools, such as light emission, to quickly localize and identify defects in logic circuits. This paper presents several case studies in regards to these activities and their results. These case studies demonstrate the versatility of the AFP. The needs and demands of the failure analysis environment have quickly expanded its use. These expanded capabilities make the AFP more valuable for the failure analysis community.

Scanning Capacitance Microscopy for Failure Analysis of SOI-Based Advanced Microprocessors

2010 ◽  
Author(s):  
Lim Soon Huat ◽  
Lwin Hnin-Ei ◽  
Vinod Narang ◽  
J.M. Chin
Keyword(s):  
Failure Analysis ◽  
Electrical Characterization ◽  
Silicon On Insulator ◽  
Large Area ◽  
Scanning Capacitance Microscopy ◽  
Electrical Failure ◽  
Silicon Transistors ◽  
Soi Substrates ◽  
Electrical Data

Abstract Scanning capacitance microscopy (SCM) has been used in electrical failure analysis (EFA) to isolate failing silicon transistors on silicon-on-insulator (SOI) substrates. With the shrinking device geometry and increasing layout complexity, the defects in transistors are often non-visual and require detailed electrical analysis to pinpoint the defect signature. This paper demonstrates the use of SCM technique for EFA on SOI device substrates, as well as using this technique to isolate defective contacts in a relatively large-area scan of 25µm x 25µm. We also performed dC/dV electrical characterization of defective transistors, and correlated the data from SCM technique and electrical data from nano-probing to locate failing transistors.

Ultrathin Low Energy Simox for Low Cost, High Density Applications

1993 ◽  
Vol 316 ◽  
Author(s):  
Fereydoon Namavar ◽  
N.M. Kalkhoran ◽  
A. Cremins
Keyword(s):  
Low Cost ◽  
Electrical Characterization ◽  
Low Energy ◽  
Silicon On Insulator ◽  
Great Promise ◽  
Fully Depleted ◽  
Device Structures ◽  
Radiation Hard ◽  
Standard Energy

ABSTRACTSilicon-on-insulator (SOI) materials made by standard energy (150 to 200 keV) separation by implantation of oxygen (SIMOX) processes have shown great promise for meeting the needs of radiation-hard microelectronics. Since much smaller doses are required, low energy SIMOX (LES) reduces cost, improves radiation hardness, and increases the throughput of any ion implanter. The process can also produce high quality thin SIMOX structures that are of particular interest for fully depleted and submicron device structures. In this paper, we address the formation as well as the material and electrical characterization of LES wafers and compare them with standard SIMOX wafers.

Application of FIB Circuit Edit in Analysis of Memory Failure of SOI Devices

2006 ◽  
Author(s):  
Z. G. Song ◽  
S. K. Loh ◽  
X. H. Zheng ◽  
S.P. Neo ◽  
C. K. Oh
Keyword(s):  
Focused Ion Beam ◽  
Ion Beam ◽  
Electrical Characterization ◽  
Silicon On Insulator ◽  
First Case ◽  
Edx Analyses ◽  
Memory Failure ◽  
Soi Devices ◽  
Voltage Contrast ◽  
Soi Technology

Abstract This article presents two cases to demonstrate the application of focused ion beam (FIB) circuit edit in analysis of memory failure of silicon on insulator (SOI) devices using XTEM and EDX analyses. The first case was a single bit failure of SRAM units manufactured with 90 nm technology in SOI wafer. The second case was the whole column failure with a single bit pass for a SRAM unit. From the results, it was concluded that FIB circuit edit and electrical characterization is a good methodology for further narrowing down the defective location of memory failure, especially for SOI technology, where contact-level passive voltage contrast is not suitable.

Application of AFP in Resolving Systematic Issue in Wafer Fabrication

2013 ◽  
Author(s):  
Hui Peng Ng ◽  
Ghim Boon Ang ◽  
Chang Qing Chen ◽  
Alfred Quah ◽  
Angela Teo ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Case Studies ◽  
Failure Mechanisms ◽  
Critical Role ◽  
Electrical Characterization ◽  
Process Technology ◽  
Atomic Force ◽  
Defect Localization ◽  
Non Volatile Memory ◽  
Visual Failure

Abstract With the evolution of advanced process technology, failure analysis is becoming much more challenging and difficult particularly with an increase in more erratic defect types arising from non-visual failure mechanisms. Conventional FA techniques work well in failure analysis on defectively related issue. However, for soft defect localization such as S/D leakage or short due to design related, it may not be simple to identify it. AFP and its applications have been successfully engaged to overcome such shortcoming, In this paper, two case studies on systematic issues due to soft failures were discussed to illustrate the AFP critical role in current failure analysis field on these areas. In other words, these two case studies will demonstrate how Atomic Force Probing combined with Scanning Capacitance Microscopy were used to characterize failing transistors in non-volatile memory, identify possible failure mechanisms and enable device/ process engineers to make adjustment on process based on the electrical characterization result. [1]

scholarly journals A 3.5 kV Thyristor in 4H-SiC with a JTE Periphery

2005 ◽  
Vol 483-485 ◽  
pp. 1005-1008
Author(s):  
Pierre Brosselard ◽  
Thierry Bouchet ◽  
Dominique Planson ◽  
Sigo Scharnholz ◽  
Gontran Pâques ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
High Voltage ◽  
Electrical Characterization ◽  
Electrical Strength ◽  
Oxide Charge ◽  
Blocking Voltage ◽  
Simulation Based ◽  
Device Structures ◽  
Silicon Silicon

Overcoming the physical limits of silicon, silicon carbide shows a high potential for making high voltage thyristors. After a simulation based optimization of the main thyristor parameters, including JTE protection and a SiO2 layer passivation, 4H-SiC GTO thyristors were realized and characterized. Designed for a theoretical blocking capability of nearly 6 kV, the electrical characterization of all device structures revealed a maximum blocking voltage of 3.5 kV. Comparing simulation and measurement suggests that a negative oxide charge density of ~ 2×1012 cm-2 causes the decrease in electrical strength.

Electrical Characterization of Nano-Floating Gated Silicon-on-Insulator Memory with In2O3 Nano-Particles Embedded in Polyimide Insulator

2008 ◽  
Vol E91-C (5) ◽  
pp. 747-750
Author(s):  
D. U. LEE ◽  
S. P. KIM ◽  
T. H. LEE ◽  
E. K. KIM ◽  
H.-M. KOO ◽  
...  
Keyword(s):  
Electrical Characterization ◽  
Silicon On Insulator ◽  
Nano Particles

Advanced Electrical Characterization of 90 nm Soft Bit Failure by Nano Probing Technique

2005 ◽  
Author(s):  
Christelle Giret ◽  
Damien Faure
Keyword(s):  
Failure Analysis ◽  
Electrical Characterization ◽  
Physical Analysis ◽  
Electrical Measurements ◽  
Device Failure ◽  
Sram Cell ◽  
Visual Defects ◽  
Difficult Challenge ◽  
Type Of Failure

Abstract The Soft Bit failure (Single Bit Failure sensitive to voltage) of a 90nm SRAM cell presented a difficult challenge for the Failure Analysis (FA) group. Physical analysis of these Soft SRAM failures did not show any visual defects; therefore the FA required an accurate electrical characterization. The transistor characteristics of the failing SRAM transistors are needed in order to speculate on the possible failure mechanism. The Nano-Probing technique performed at Nice Device Failure Analysis of Laboratory (NDAL) allowed us to identify anomalies of I/V characteristics like Vt imbalance, low Gain, asymmetrical Vt, ID (Drive current) and Ron. Case studies of an asymmetry phenomenon reported here lead to a correlation between the failure mode and the electrical measurements. This paper demonstrates a suitable electrical methodology and characterization by Nano-Probing in order to successfully manage a FA approach on this type of failure.

Sign in / Sign up

Export Citation Format

Share Document