scholarly journals A New Simulated Inductor with Reduced Series Resistor Using a Single VCII±

Electronics ◽  
2021 ◽  
Vol 10 (14) ◽  
pp. 1693
Author(s):  
Erkan Yuce ◽  
Leila Safari ◽  
Shahram Minaei ◽  
Giuseppe Ferri ◽  
Gianluca Barile ◽  
...  
Keyword(s):  
Integrated Circuit ◽  
Supply Voltage ◽  
Low Frequency ◽  
Matching Condition ◽  
Cmos Technology ◽  
Passive Component ◽  
Component Matching ◽  
Series Resistor ◽  
Cmos Implementation ◽  
Fifth Order

This paper presents a new realization of a grounded simulated inductor using a single dual output second-generation voltage conveyor (VCII±) as an active building block, two resistors and one grounded capacitor. The main characteristic of the proposed circuit is that the value of the series resistor can be significantly reduced. Thus, it has the property of improved low-frequency performance. Another feature is the use of a grounded capacitor that makes the proposed circuit attractive for integrated circuit (IC) realization. A simple CMOS implementation of the required VCII± is used. However, a single passive component-matching condition is required for the proposed structure. As an application example, a standard fifth-order high-pass ladder filter is also given. SPICE simulations using 0.18 μm CMOS technology parameters and a supply voltage of ±0.9 V as well as experimental verifications, are carried out to support the theory.

Commercially Available Active Device Based Grounded Inductor Simulator and Universal Filter with Improved Low Frequency Performances

2016 ◽  
Vol 26 (04) ◽  
pp. 1750052 ◽  
Author(s):  
Erkan Yuce ◽  
Shahram Minaei
Keyword(s):  
Low Frequency ◽  
Matching Condition ◽  
Passive Component ◽  
Universal Filter ◽  
Active Device ◽  
Current Feedback ◽  
Active Devices ◽  
Single Output ◽  
Current Feedback Operational Amplifiers ◽  
Component Matching

In this paper, a new grounded inductor simulator employing two current feedback operational amplifiers (CFOAs), three resistors and one grounded capacitor which is suitable for IC fabrication is proposed. Also, a new voltage-mode (VM) universal filter with three input and single output is given as application example of the grounded inductor simulator. The universal filter with low output impedance can be easily cascaded with other VM circuits. Both of the proposed circuits have the feature of improved low frequency performances, and can be easily constructed by two commercially available active devices such as AD844s. However, both inductor simulator and universal filter need a single passive component matching condition. Simulation and experimental test results are given to demonstrate the performance and workability of the proposed grounded inductor simulator and filter structure.

scholarly journals Ladder-Based Synthesis and Design of Low-Frequency Buffer-Based CMOS Filters

Electronics ◽  
2021 ◽  
Vol 10 (23) ◽  
pp. 2931
Author(s):  
Waldemar Jendernalik ◽  
Jacek Jakusz ◽  
Grzegorz Blakiewicz
Keyword(s):  
Dynamic Range ◽  
Low Voltage ◽  
Supply Voltage ◽  
Low Frequency ◽  
Cmos Technology ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Biomedical Sensors ◽  
Filter Synthesis ◽  
Cascade Method

Buffer-based CMOS filters are maximally simplified circuits containing as few transistors as possible. Their applications, among others, include nano to micro watt biomedical sensors that process physiological signals of frequencies from 0.01 Hz to about 3 kHz. The order of a buffer-based filter is not greater than two. Hence, to obtain higher-order filters, a cascade of second-order filters is constructed. In this paper, a more general method for buffer-based filter synthesis is developed and presented. The method uses RLC ladder prototypes to obtain filters of arbitrary orders. In addition, a set of novel circuit solutions with ultra-low voltage and power are proposed. The introduced circuits were synthesized and simulated using 180-nm CMOS technology of X-FAB. One of the designed circuits is a fourth-order, low-pass filter that features: 100-Hz passband, 0.4-V supply voltage, power consumption of less than 5 nW, and dynamic range above 60 dB. Moreover, the total capacitance of the proposed filter (31 pF) is 25% lower compared to the structure synthesized using a conventional cascade method (40 pF).

scholarly journals Low Power AVLS-TSPC based 2/3 Pre-Scaler

2019 ◽  
Vol 9 (1) ◽  
pp. 6687-6693
Keyword(s):  
Low Power ◽  
High Efficiency ◽  
Supply Voltage ◽  
Low Frequency ◽  
Cmos Technology ◽  
Frequency Signal ◽  
High Frequency Signal ◽  
Power Requirement ◽  
Fast Pace ◽  
Integer Division

The technology has grown at an ultra-fast pace along with the world. Small devices with less power and high efficiency are in demand. As the circuit size gets smaller, the power requirement increases due to a greater number of transistors. A pre-scaler is a circuit which reduces the high frequency signal to a low frequency signal by integer division. A new approach to low power pre-scaler is proposed in this paper, which is an add-on to the conventional pre-scaler circuit. A true single-phase clock (TSPC) circuit reduces the skew problems in the clock and is used to realize latches and flip-flops. The objective of low power is fulfilled by incorporating the Adaptive Voltage Level Source (AVLS) to TSPC based circuit. The proposed AVLS-TSPC based pre-scaler was analyzed for a frequency of 10 MHz with a supply voltage of 1.8 V for both divide by 2 and 3 modes. The proposed pre-scaler consumes considerably lesser power when compared to that of the existing pre-scaler circuit. The circuits are implemented in 180 nm CMOS technology using Cadence Virtuoso and simulated using Cadence Spectre.

scholarly journals Floating Active Inductor Based Trans-Impedance Amplifier in 0.18 μm CMOS Technology for Optical Applications

Electronics ◽  
2019 ◽  
Vol 8 (12) ◽  
pp. 1547
Author(s):  
Xiangyu Chen ◽  
Yasuhiro Takahashi
Keyword(s):  
Power Dissipation ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Chip Area ◽  
Active Inductors ◽  
Low Pass ◽  
Optical Applications ◽  
Fifth Order

In this paper, a transimpedance amplifier (TIA) based on floating active inductors (FAI) is presented. Compared with conventional TIAs, the proposed TIA has the advantages of a wider bandwidth, lower power dissipation, and smaller chip area. The schematics and characteristics of the FAI circuit are explained. Moreover, the proposed TIA employs the combination of capacitive degeneration, the broadband matching network, and the regulated cascode input stage to enhance the bandwidth and gain. This turns the TIA design into a fifth-order low pass filter with Butterworth response. The TIA is implemented using 0.18 μ m Rohm CMOS technology and consumes only 10.7 mW with a supply voltage of 1.8 V. When used with a 150 fF photodiode capacitance, it exhibits the following characteristics: gain of 41 dB Ω and −3 dB frequency of 10 GHz. This TIA occupies an area of 180 μ m × 118 μ m.

A LOW POWER CRYOGENIC CMOS ROIC DESIGN FOR 512 × 512 IRFPA

2013 ◽  
Vol 22 (10) ◽  
pp. 1340033 ◽  
Author(s):  
HONGLIANG ZHAO ◽  
YIQIANG ZHAO ◽  
YIWEI SONG ◽  
JUN LIAO ◽  
JUNFENG GENG
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Integrated Circuit ◽  
High Performance ◽  
Supply Voltage ◽  
Cmos Technology ◽  
High Gain ◽  
Readout Integrated Circuit ◽  
Chip Area ◽  
Operating Modes

A low power readout integrated circuit (ROIC) for 512 × 512 cooled infrared focal plane array (IRFPA) is presented. A capacitive trans-impedance amplifier (CTIA) with high gain cascode amplifier and inherent correlated double sampling (CDS) configuration is employed to achieve a high performance readout interface for the IRFPA with a pixel size of 30 × 30 μm2. By optimizing column readout timing and using two operating modes in column amplifiers, the power consumption is significantly reduced. The readout chip is implemented in a standard 0.35 μm 2P4M CMOS technology. The measurement results show the proposed ROIC achieves a readout rate of 10 MHz with 70 mW power consumption under 3.3 V supply voltage from 77 K to 150 K operating temperature. And it occupies a chip area of 18.4 × 17.5 mm2.

scholarly journals Grounded Impedance Simulator Topologies Employing Minimum Passive Elements

2018 ◽  
Vol 7 (2.28) ◽  
pp. 1 ◽  
Author(s):  
Mohammad Faseehuddin ◽  
Jahariah Sampe ◽  
Sawal Hamid Md Ali
Keyword(s):  
Current Mode ◽  
Cmos Technology ◽  
Passive Component ◽  
Passive Components ◽  
Theoretical Predictions ◽  
Low Pass ◽  
Multifunction Filter ◽  
Component Matching ◽  
Order Butterworth Filter ◽  
Matching Constraints

In this research three new grounded inductance simulators (GIS) are proposed. In addition, frequency dependent negative resistor (FDNR) and grounded capacitor (GC) simulators are also developed. The voltage differencing current conveyor (VDCC) is utilized in the design. All the developed simulator circuits need a single active block and only two grounded passive components. All the designed simulator circuits are perfectly tunable and did not suffer from passive component matching constraints. To demonstrate the performance of the inductor, FDNR and GC circuits they are employed in designing  current mode parallel RLC multifunction filter, low pass third order Butterworth filter and RLC resonance circuits. The VDCC is designed in 0.18μm CMOS technology parameters from TSMC and simulated in P-Spice software to prove the theoretical predictions. 

scholarly journals Three-Input Single-Output Voltage-Mode Multifunction Filter with Electronic Controllability Based on Single Commercially Available IC

2017 ◽  
Vol 2017 ◽  
pp. 1-10 ◽  
Author(s):  
Supachai Klungtong ◽  
Dusit Thanapatay ◽  
Winai Jaikla
Keyword(s):  
Output Voltage ◽  
Matching Condition ◽  
Passive Component ◽  
Voltage Mode ◽  
Single Output ◽  
Rlc Circuit ◽  
Low Pass ◽  
Multifunction Filter ◽  
Component Matching ◽  
Technology Corporation

This paper presents a second-order voltage-mode filter with three inputs and single-output voltage using single commercially available IC, one resistor, and two capacitors. The used commercially available IC, called LT1228, is manufactured by Linear Technology Corporation. The proposed filter is based on parallel RLC circuit. The filter provides five output filter responses, namely, band-pass (BP), band-reject (BR), low-pass (LP), high-pass (HP), and all-pass (AP) functions. The selection of each filter response can be done without the requirement of active and passive component matching condition. Furthermore, the natural frequency and quality factor are electronically controlled. Besides, the nonideal case is also investigated. The output voltage node exhibits low impedance. The experimental results can validate the theoretical analyses.

CMOS implementation of an analogue median filter for image processing in real time

2013 ◽  
Vol 61 (3) ◽  
pp. 725-730
Author(s):  
W. Jendernalik ◽  
J. Jakusz ◽  
G. Blakiewicz ◽  
S. Szczepański
Keyword(s):  
Image Processing ◽  
Integrated Circuit ◽  
High Speed ◽  
Median Filter ◽  
Cmos Technology ◽  
Vision Chip ◽  
Interface Circuits ◽  
Photo Sensor ◽  
Power Operation ◽  
Cmos Implementation

Abstract An analogue median filter, realised in a 0.35 μm CMOS technology, is presented in this paper. The key advantages of the filter are: high speed of image processing (50 frames per second), low-power operation (below 1.25 mW under 3.3 V supply) and relatively high accuracy of signal processing. The presented filter is a part of an integrated circuit for image processing (a vision chip), containing: a photo-sensor matrix, a set of analogue pre-processors, and interface circuits. The analysis of the main parameters of the considered median filter is presented. The discussion of important limitations in the operation of the filter due to the restrictions imposed by CMOS technology is also presented.

scholarly journals Novel VDBA based universal filter topologies with minimum passive components

2021 ◽  
Vol 9 (3B) ◽  
Author(s):  
Musa Ali Albrni ◽  
◽  
Mohammad Faseehuddin ◽  
Jahariah Sampe ◽  
Sawal Hamid Md Ali ◽  
...  
Keyword(s):  
Process Variations ◽  
Matching Condition ◽  
Passive Component ◽  
Passive Components ◽  
Parasitic Extraction ◽  
Single Output ◽  
Mode Of Operation ◽  
Theoretical Predictions ◽  
Minimum Number ◽  
Component Matching

In this research, voltage differencing buffered amplifier (VDBA) is utilized in designing three novel multi-input single output (MISO) topologies of universal filters. The designed filters employ minimum number of passive components and did not require any passive component matching condition. Two of the designed filters can work in dual mode of operation simultaneously. The designed filters have inbuilt tunability property. The nonideal gain analysis and sensitivity analysis of the filters are also carried out to study the effect of process variations and process spread on the filter responses. The complete layout of the VDBA is designed using 0.18μm Silterra Malaysia process design kit (PDK) in Cadence design software. The parasitic extraction is done using Mentor graphics Calibre tool. The postlayout simulations bear close resemblance with the theoretical predictions.

CMOS FIRST-ORDER CURRENT-MODE ALL-PASS FILTER WITH ELECTRONIC TUNING CAPABILITY AND ITS APPLICATIONS

2013 ◽  
Vol 22 (03) ◽  
pp. 1350007 ◽  
Author(s):  
LEILA SAFARI ◽  
SHAHRAM MINAEI ◽  
ERKAN YUCE
Keyword(s):  
Integrated Circuit ◽  
Low Voltage ◽  
Current Mode ◽  
Passive Component ◽  
Pass Filter ◽  
First Order ◽  
Sinusoidal Oscillator ◽  
Minimum Number ◽  
Component Matching ◽  
Electronically Tunable

In this paper, a novel first-order current-mode (CM) electronically tunable all-pass filter including one grounded capacitor and two dual-output current followers (DO-CFs) is presented. The used DO-CFs are implemented using only 10 MOS transistors granting the proposed CM all-pass filter extremely simple structure. The proposed filter is suitable for integrated circuit (IC) fabrication because it employs only a grounded capacitor and is free from passive component matching conditions. Interestingly the introduced configuration uses minimum number of components compared to other works. It also offers other interesting advantages such as, alleviating all disadvantages associated with the use of resistors, easy cascadability and satisfies all technology requirements such as small sizing, simple realization, low voltage and low power operation. Additionally, the circuit parameters can be easily set by adjusting control voltages. Most favorably, the proposed CM all-pass filter can be simply used as a voltage-mode (VM) all-pass filter with outstanding properties of adjustable gain and tunability. To further show the versatility of the proposed structure a sinusoidal oscillator is also derived from presented CM all-pass filter. Nonideal gain and parasitic impedance effects on developed CM filter are discussed. Finally, simulation results with SPICE program are included to confirm the theory.

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