scholarly journals A High-Gain CNTFET-Based LNA Developed Using a Compact Design-Oriented Device Model

Electronics ◽  
2021 ◽  
Vol 10 (22) ◽  
pp. 2835
Author(s):  
Paolo Crippa ◽  
Giorgio Biagetti ◽  
Claudio Turchetti ◽  
Laura Falaschetti ◽  
Davide Mencarelli ◽  
...  
Keyword(s):  
Power Dissipation ◽  
Field Effect Transistors ◽  
Electronic Devices ◽  
High Gain ◽  
Superior Performance ◽  
Device Model ◽  
Higher Power ◽  
Rf Devices ◽  
Compact Design

Recently, carbon nanotube field-effect transistors (CNTFETs) have attracted wide attention as promising candidates for components in the next generation of electronic devices. In particular CNTFET-based RF devices and circuits show superior performance to those built with silicon FETs since they are able to obtain higher power-gain and cut-off frequency at lower power dissipation. The aim of this paper is to present a compact, design-oriented model of CNTFETs that is able to ease the development of a complete amplifier. As a case study, the detailed design of a high-gain CNTFET-based broadband inductorless LNA is presented.

Micron-Level Actuators for Thermal Management of Microelectronic Devices

2007 ◽  
Author(s):  
Nurhak Erbas ◽  
Oktay Baysal
Keyword(s):  
Thermal Management ◽  
Power Dissipation ◽  
Transfer Rate ◽  
Operating Temperature ◽  
Electronic Devices ◽  
Synthetic Jet ◽  
Two Dimensional ◽  
Microelectronic Devices ◽  
Higher Power ◽  
Membrane Oscillations

Failure rates of electronic equipment depend on the operating temperature. Although demand for more effective cooling of electronic devices has increased in the last decades because of the microminiaturization in device sizes accompanied by higher power dissipation levels, there is still a challenge for engineers to attain improved reliability of thermal management for intermediate and low-heat-flux systems. In the present study, an innovative alternative method is proposed and a computational parametric study has been conducted. A single microchip is placed in a two-dimensional channel. Different synthetic jet configurations are designed as actuators in order to investigate their effectiveness for thermal management. The effect is that the actuator enhances mixing by imparting momentum to the channel flow thus manipulating the temperature field in a positive manner. The best control is achieved when the actuator is placed midway of the chip length and increasing the throat height. Also, using nozzle-like throat geometry increases the heat transfer rate from the microchip surface. Doubling the number of the actuators, optimally placing them, and phasing their membrane oscillations all improve the cooling.

scholarly journals Power Dissipation in Spintronic Devices: A General Perspective

2007 ◽  
Vol 7 (1) ◽  
pp. 168-180 ◽  
Author(s):  
Supriyo Bandyopadhyay
Keyword(s):  
Power Dissipation ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Electronic Devices ◽  
Bipolar Junction Transistors ◽  
Switching Speed ◽  
Spintronic Device ◽  
Spintronic Devices ◽  
Single Spin ◽  
Spin Switch

Champions of "spintronics" often claim that spin based signal processing devices will vastly increase speed and/or reduce power dissipation compared to traditional 'charge based' electronic devices. Yet, not a single spintronic device exists today that can lend credence to this claim. Here, I show that no spintronic device that clones conventional electronic devices, such as field effect transistors and bipolar junction transistors, is likely to reduce power dissipation significantly. For that to happen, spin-based devices must forsake the transistor paradigm of switching states by physical movement of charges, and instead, switch states by flipping spins of stationary charges. An embodiment of this approach is the "single spin logic" idea proposed more than 10 years ago. Here, I revisit that idea and present estimates of the switching speed and power dissipation. I show that the Single Spin Switch is far superior to the Spin Field Effect Transistor (or any of its clones) in terms of power dissipation. I also introduce the notion of "matrix element engineering" which will allow one to switch devices without raising and lowering energy barriers between logic states, thereby circumventing the kTln2 limit on energy dissipation. Finally, I briefly discuss single spin implementations of classical reversible (adiabatic) logic.

Failure Analysis of CDM-ESD Damage in a GaAs RFIC

2000 ◽  
Author(s):  
Amy Poe ◽  
Steve Brockett ◽  
Tony Rubalcava
Keyword(s):  
Radio Frequency ◽  
Failure Analysis ◽  
Integrated Circuit ◽  
Production Test ◽  
Analysis Techniques ◽  
Device Model ◽  
Charged Device ◽  
Subsequent Failure

Abstract The intent of this work is to demonstrate the importance of charged device model (CDM) ESD testing and characterization by presenting a case study of a situation in which CDM testing proved invaluable in establishing the reliability of a GaAs radio frequency integrated circuit (RFIC). The problem originated when a sample of passing devices was retested to the final production test. Nine of the 200 sampled devices failed the retest, thus placing the reliability of all of the devices in question. The subsequent failure analysis indicated that the devices failed due to a short on one of two capacitors, bringing into question the reliability of the dielectric. Previous ESD characterization of the part had shown that a certain resistor was likely to fail at thresholds well below the level at which any capacitors were damaged. This paper will discuss the failure analysis techniques which were used and the testing performed to verify the failures were actually due to ESD, and not caused by weak capacitors.

scholarly journals Convenient fabrication of conjugated polymer semiconductor nanotubes and their application in organic electronics

2018 ◽  
Vol 5 (8) ◽  
pp. 180868
Author(s):  
Lanchao Ma ◽  
Shuixing Dai ◽  
Xiaowei Zhan ◽  
Xinyang Liu ◽  
Yu Li
Keyword(s):  
Organic Solar Cells ◽  
Field Effect Transistors ◽  
Electronic Devices ◽  
Solution Concentration ◽  
Core Shell ◽  
Organic Electronic Devices ◽  
Organic Electronic ◽  
Light Emitting ◽  
Preparation Conditions ◽  
Polymer Semiconductor

Organic heterojunction is indispensable in organic electronic devices, such as organic solar cells, organic light-emitting diodes and so on. Fabrication of core–shell nanostructure provides a feasible and novel way to prepare organic heterojunction, which is beneficial for miniaturization and integration of organic electronic devices. Fabrication of nanotubes which constitute the core–shell structure in large quantity is the key for the realization of application. In this work, a simple and convenient method to prepare nanotubes using conjugated copolymer of perylene diimide and dithienothiophene (P(PDI-DTT)) was demonstrated. The relationship between preparation conditions (solvent atmosphere, solution concentration and pore diameter of templates) and morphology of nanostructure was studied systematically. P(PDI-DTT) nanotubes could be fabricated in regular shape and large quantity by preparing the solution with appropriate concentration and placing anodic aluminium oxide template with nanopore diameter of 200 nm in the solvent atmosphere. The tubular structure was confirmed by scanning electron microscopy. P(PDI-DTT) nanotubes exhibited electron mobility of 0.02 cm 2 V –1 s –1 in field-effect transistors under ambient condition. Light-emitting nanostructures were successfully fabricated by incorporating tetraphenylethylene into polymer nanotubes.

Characteristics of thin calcium fluoride barrier layers for field-effect transistors and functional electronic devices

2010 ◽  
Vol 36 (5) ◽  
pp. 404-407 ◽  
Author(s):  
Yu. Yu. Illarionov ◽  
M. I. Vexler ◽  
S. M. Suturin ◽  
V. V. Fedorov ◽  
N. S. Sokolov
Keyword(s):  
Calcium Fluoride ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Electronic Devices ◽  
Barrier Layers

scholarly journals A Flux Controlled Memristor using 90nm Technology

2021 ◽  
pp. 1-6
Author(s):  
B.T. Krishna ◽  
◽  
Shaik. mohaseena Salma ◽  
Keyword(s):  
Power Supply ◽  
Power Dissipation ◽  
Power Efficiency ◽  
Current Mode ◽  
Cmos Technology ◽  
Theoretical Simulation ◽  
Transconductance Amplifier ◽  
Higher Power ◽  
Static Power ◽  
A Current

A flux-controlled memristor using complementary metal–oxide–(CMOS) structure is presented in this study. The proposed circuit provides higher power efficiency, less static power dissipation, lesser area, and can also reduce the power supply by using CMOS 90nm technology. The circuit is implemented based on the use of a second-generation current conveyor circuit (CCII) and operational transconductance amplifier (OTA) with few passive elements. The proposed circuit uses a current-mode approach which improves the high frequency performance. The reduction of a power supply is a crucial aspect to decrease the power consumption in VLSI. An offered emulator in this proposed circuit is made to operate incremental and decremental configurations well up to 26.3 MHZ in cadence virtuoso platform gpdk using 90nm CMOS technology. proposed memristor circuit has very little static power dissipation when operating with ±1V supply. Transient analysis, memductance analysis, and dc analysis simulations are verified practically with the Experimental demonstration by using ideal memristor made up of ICs AD844AN and CA3080, using multisim which exhibits theoretical simulation are verified and discussed.

scholarly journals The Effects of Preschoolers’ Media Usage Habits on Their Daily Life and Sustainability

2019 ◽  
Vol 10 (2) ◽  
pp. 112-128
Author(s):  
Begum Canaslan Akyar ◽  
Özkan Sapsaglam
Keyword(s):  
Home Environment ◽  
Negative Impact ◽  
Electronic Devices ◽  
Media Usage ◽  
Case Study Design ◽  
Digital World ◽  
Digital Contents ◽  
Reported Study ◽  
Different Levels

Abstract Today’s children are born into a digital world and are exposed to various electronic devices and digital contents both in the home environment and other environments since the first years of life. Children, who are a natural recipient of the environment in which they live, are exposed to the effects of the digital world at different levels and reflect these effects in different ways. The purpose of the reported study is to investigate if preschoolers’ daily media usage habits affects their drawings. This study is planned according to the case study design of qualitative research methods. The study was conducted with 15 preschoolers and their parents. There were nine boys and six girls in the study. The preschoolers’ drawings and their parents’ interview data were analyzed by using the descriptive analyzing method. The study result shows that there are differences between boys and girls media usage habits. Boys spend more time with media tools than girls. Additionally, boys are exposed to more inappropriate content because of their preferences. The analysis of their drawings revealed that boys are more affected than girls from media contents since boys’ drawings include more characters from media than girls. It can thus be suggested that media tools might be harmful when they are used in a developmentally inappropriate way, and excessive media tool usage has negative impact on children. Therefore, the reported study recommends that parents and caregivers take some precautions to limit preschoolers from spending time with media tools and to control content of children’s activity.

Analysis of High-Speed Electrical Generators for Utility Applications

2013 ◽  
Author(s):  
Miroslav P. Petrov
Keyword(s):  
Electricity Generation ◽  
High Speed ◽  
Renewable Energy Sources ◽  
Scale Up ◽  
Energy Utilization ◽  
Superior Performance ◽  
Electricity Production ◽  
Small Scale ◽  
Technical Challenges ◽  
Compact Design

High-speed alternators are believed to be well developed nowadays, following the improvement in performance and decrease of costs for electronic power converters and permanent magnet materials. Their compact design and their ability to vary the rotational speed in off-design conditions promise superior performance when compared to conventional generators. High-speed alternators are only available in limited sizes for small-scale applications, whereas improvements in efficiency and optimized part-load behavior are particularly important especially for small-scale electricity generation. Enhanced energy utilization for electricity production by small utility plants or by distributed units located at private homes or commercial buildings, based on thermodynamic cycles powered by natural gas or various renewable energy sources, is possible to be achieved through a wider application of grid-integrated high-speed technology. This study presents a critical review of previous research and demonstration work on high-speed electrical machines and a summary of the technical challenges limiting their performance and their expansion into larger sizes. Conclusions are drawn for finding appropriate solutions for practical high-speed electricity generation units and their readiness for a much wider deployment. Closer analysis is attempted on the thermal and mechanical integrity of high-speed alternators and the technical challenges that slow down their scale-up to MW-size units for utility applications. The necessary research and development work that needs to be done in the near future is outlined and discussed herein.

CNTFET Circuit-Based Wide Fan-In Domino Logic for Low Power Applications

2021 ◽  
pp. 2250036
Author(s):  
Vijay Kumar Sharma
Keyword(s):  
Power Dissipation ◽  
Field Effect ◽  
Performance Metrics ◽  
Field Effect Transistors ◽  
High Current Density ◽  
Cylindrical Tube ◽  
Leakage Power ◽  
Oxide Semiconductor ◽  
Domino Logic ◽  
Leakage Power Dissipation

Carbon nanotube field effect transistors (CNTFETs) are the best alternative option for the metal oxide semiconductor field effect transistor (MOSFET) in the ultra-deep submicron (ultra-DSM) regime. CNTFET has numerous benefits such as lower off-state current, high current density, low bias potential and better transport property as compared to MOSFET. A rolled graphene sheet-based cylindrical tube is constructed in the channel region of the CNTFET structure. In this paper, an improved domino logic (IDL) configuration is proposed for domino logic circuits to improve the different performance metrics. An extensive comparative simulation analysis is provided for the different performance metrics for different circuits to verify the novelty of the proposed IDL approach. The IDL approach saves the leakage power dissipation by 95.61% and enhances the speed by 87.10% for the 4-bit full adder circuit as compared to the best reported available domino method. The effects of the number of carbon nanotubes (CNTs), temperature, and power supply voltage variations are estimated for leakage power dissipation for the 16-input OR (OR16) gate. The reliability of different performance metrics for different circuit is calculated in terms of uncertainty by running the Monte Carlo simulations for 500 samples. Stanford University’s 32[Formula: see text]nm CNTFET model is applied for circuit simulations.

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