scholarly journals Demonstration of AlGaN/GaN MISHEMT on Si with Low-Temperature Epitaxy Grown AlN Dielectric Gate

Electronics ◽  
2020 ◽  
Vol 9 (11) ◽  
pp. 1858
Author(s):  
Matthew Whiteside ◽  
Subramaniam Arulkumaran ◽  
Yilmaz Dikme ◽  
Abhinay Sandupatla ◽  
Geok Ing Ng
Keyword(s):  
Low Temperature ◽  
Gate Dielectric ◽  
Drain Current ◽  
High Electron Mobility Transistors ◽  
Interface State ◽  
State Density ◽  
High Electron ◽  
Gate Leakage ◽  
Annealing Effects ◽  
Low Temperature Epitaxy

AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MISHEMT) with a low-temperature epitaxy (LTE)-grown single crystalline AlN gate dielectric were demonstrated for the first time and the post-gate annealing effects at 400 °C were studied. The as-deposited LTE-AlN MISHEMT showed a maximum drain current (IDmax) of 708 mA/mm at a gate bias of 4 V and a maximum extrinsic transconductance (gmmax) of 129 mS/mm. The 400 °C annealed MISHEMT exhibited an increase of 15% in gmmax, an order of magnitude reduction in reverse gate leakage and about a 3% suppression of drain current (ID) collapse. The increase of gmmax by post-gate annealing is consistent with the increase of 2DEG mobility. The suppression of ID collapse and the reduction of gate leakage current is attributed to the reduction of interface state density (5.0 × 1011 cm−2eV−1) between the AlN/GaN interface after post-gate annealing at 400 °C. This study demonstrates that LTE grown AlN is a promising alternate material as gate dielectric for GaN-based MISHEMT application.

scholarly journals Fully Ion Implanted Normally-Off GaN DMOSFETs with ALD-Al2O3 Gate Dielectrics

Materials ◽  
2019 ◽  
Vol 12 (5) ◽  
pp. 689 ◽  
Author(s):  
Michitaka Yoshino ◽  
Yuto Ando ◽  
Manato Deki ◽  
Toru Toyabe ◽  
Kazuo Kuriyama ◽  
...  
Keyword(s):  
Gate Dielectric ◽  
Drain Current ◽  
Atomic Layer ◽  
Surface Concentration ◽  
Interface State ◽  
State Density ◽  
Free Standing ◽  
Al2o3 Gate Dielectric ◽  
P Type ◽  
Ion Implanted

A normally-off GaN double-implanted vertical MOSFET (DMOSFET) with an atomic layer deposition (ALD)-Al2O3 gate dielectric film on a free-standing GaN substrate fabricated by triple ion implantation is presented. The DMOSFET was formed with Si ion implanted source regions in a Mg ion implanted p-type base with N ion implanted termination regions. A maximum drain current of 115 mA/mm, maximum transconductance of 19 mS/mm at a drain voltage of 15 V, and a threshold voltage of 3.6 V were obtained for the fabricated DMOSFET with a gate length of 0.4 μm with an estimated p-type base Mg surface concentration of 5 × 1018 cm−3. The difference between calculated and measured Vths could be due to the activation ratio of ion-implanted Mg as well as Fermi level pinning and the interface state density. On-resistance of 9.3 mΩ·cm2 estimated from the linear region was also attained. Blocking voltage at off-state was 213 V. The fully ion implanted GaN DMOSFET is a promising candidate for future high-voltage and high-power applications.

Advances in GaAs Mosfet's Using Ga2O3(Gd2O3) as Gate Oxide

1999 ◽  
Vol 573 ◽  
Author(s):  
Y. C. Wang ◽  
M. Hong ◽  
J. M. Kuo ◽  
J. P. Mannaerts ◽  
J. Kwo ◽  
...  
Keyword(s):  
Gate Dielectric ◽  
Drain Current ◽  
Interface State ◽  
State Density ◽  
Inversion Mode ◽  
Order Of Magnitude ◽  
Novel Processing ◽  
Reported Data ◽  
Processing Techniques ◽  
Current Drift

ABSTRACTIn this article, we review the recent progress on GaAs MOSFET's using in-situ MBE-grown Ga2O3(Gd2O3) as the gate dielectric. Both depletion-mode (D-mode) and inversion-mode (I-mode) GaAs MOSFET's with negligible drain current drift and hysteresis are demostrated. The absence of drain current drift and hysteresis indicates that the excellent stability of the oxide and low oxide/GaAs interface state density have been achieved. The drain current density and transconductance are about one order of magnitude higher than the best previous reported data in the literature for an inversion-mode GaAs MOSFET. Excellent high frequency and power performances were also measured from the depletion-mode devices. These improvements are attributed to the excellent Ga2O3(Ga2O3) oxide properties and novel processing techniques.

Study of the impact of interface traps associated with SiNX passivation on AlGaN/GaN MIS-HEMTs

2022 ◽  
Author(s):  
Rijo Baby ◽  
Anirudh Venugopalrao ◽  
Hareesh Chandrasekar ◽  
Srinivasan Raghavan ◽  
Muralidharan Rangrajan ◽  
...  
Keyword(s):  
High Temperature ◽  
Gate Dielectric ◽  
Drain Current ◽  
Interface State ◽  
Interface States ◽  
State Density ◽  
Temperature Dependent ◽  
The Impact ◽  
Surface Conduction ◽  
Magnitude Improvement

Abstract In this work, we show that a bilayer SiNx passivation scheme which includes a high-temperature annealed SiNx as gate dielectric, significantly improves both ON and OFF state performance of AlGaN/GaN MISHEMTs. From devices with different SiNx passivation schemes, surface and bulk leakage paths were determined. Temperature-dependent MESA leakage studies showed that the surface conduction could be explained using a 2-D variable range hopping mechanism along with the mid-gap interface states at the GaN(cap)/ SiNx interface generated due to the Ga-Ga metal like bonding states. It was found that the high temperature annealed SiNx gate dielectric exhibited the lowest interface state density and a two-step C-V indicative of a superior quality SiNx/GaN interface as confirmed from conductance and capacitance measurements. High-temperature annealing helps in the formation of Ga-N bonding states, thus reducing the shallow metal-like interface states. MISHEMT measurements showed a significant reduction in gate leakage and a 4-orders of magnitude improvement in the ON/OFF ratio while increasing the saturation drain current (IDS) by a factor of 2. Besides, MISHEMTs with 2-step SiNx passivation exhibited a relatively flat transconductance profile, indicative of lower interface states density. The dynamic Ron with gate and drain stressing measurements also showed about 3x improvements in devices with bilayer SiNx passivation.

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