scholarly journals Closed-Form Formulas for Automated Design of SiC-Based Phase-Shifted Full Bridge Converters in Charger Applications

Energies ◽  
2021 ◽  
Vol 14 (17) ◽  
pp. 5380
Author(s):  
Kornel Wolski ◽  
Piotr Grzejszczak ◽  
Marek Szymczak ◽  
Roman Barlik

Phase-Shifted Full Bridge (PSFB) topology in its four-diode variant is the choice with the lowest part count in applications that demand high power, high voltage, and galvanic isolation, such as in Electric Vehicle (EV) chargers. Even though the topology is prevalent in power electronics applications, no single, unified analytical model has been proposed for the design process of four-diode PSFB converters. As a result, engineers must rely on simulations and empirical results obtained from previously built converters when selecting components to properly match the DC source voltage level with the DC load voltage requirements. In this work, the authors provide a design-oriented analysis approach for obtaining the output voltage and semiconductor current values, ready for implementation in a spreadsheet- or MATLAB-type software to automate design optimization. The proposed formulas account for all the first-order nonlinear dependencies by considering the impact of each of the following eight design parameters: DC-link voltage, load resistance, phase-shift ratio, switching frequency, transformer turns ratio, magnetizing inductance, series inductance, and output inductance. The results are verified through experiments at the power level of 10 kW and the DC-link voltage level of 800 V by using a grid simulator and a SiC-based two-level Active Front End (AFE) with a DC–DC stage based on the PSFB topology. The accuracy of the output voltage formula is determined to be around 99.6% in experiments and 100.0% in simulations. Based on this exact model, an automated design procedure for high-power high-voltage SiC-based PSFB converters is developed. By providing the desired DC-link voltage, output voltage, output power, output current ripple factor, maximum temperatures, and semiconductor and heatsink databases, the algorithm calculates a set of feasible designs and points to the one with the lowest semiconductor losses, dimensions, or cost.

2021 ◽  
Vol 17 (1) ◽  
pp. 1-13
Author(s):  
Adala Abdali ◽  
Ali Abdulabbas ◽  
Habeeb Nekad

The multilevel inverter is attracting the specialist in medium and high voltage applications, among its types, the cascade H bridge Multi-Level Inverter (MLI), commonly used for high power and high voltage applications. The main advantage of the conventional cascade (MLI) is generated a large number of output voltage levels but it demands a large number of components that produce complexity in the control circuit, and high cost. Along these lines, this paper presents a brief about the non-conventional cascade multilevel topologies that can produce a high number of output voltage levels with the least components. The non-conventional cascade (MLI) in this paper was built to reduce the number of switches, simplify the circuit configuration, uncomplicated control, and minimize the system cost. Besides, it reduces THD and increases efficiency. Two topologies of non-conventional cascade MLI three phase, the Nine level and Seventeen level are presented. The PWM technique is used to control the switches. The simulation results show a better performance for both topologies. THD, the power loss and the efficiency of the two topologies are calculated and drawn to the different values of the Modulation index (ma).


Energies ◽  
2019 ◽  
Vol 12 (6) ◽  
pp. 1131 ◽  
Author(s):  
Mauricio Dalla Vecchia ◽  
Giel Van den Broeck ◽  
Simon Ravyts ◽  
Johan Driesen

This paper explores and presents the application of the Inductor–Diode and Inductor-Capacitor-Diode structures in a DC–DC step-down configuration for systems that require voltage adjustments. DC micro/picogrids are becoming more popular nowadays and the study of power electronics converters to supply the load demand in different voltage levels is required. Multiple strategies to step-down voltages are proposed based on different approaches, e.g., high-frequency transformer and voltage multiplier/divider cells. The key question that motivates the research is the investigation of the aforementioned Inductor–Diode and Inductor–Capacitor–Diode, current multiplier/divider cells, in a step-down application. The two-stage buck converter is used as a study case to achieve the output voltage required. To extend the intermediate voltage level flexibility in the two-stage buck converter, a second switch was implemented replacing a diode, which gives an extra degree-of-freedom for the topology. Based on this modification, three regions of operation are theoretically defined, depending on the operational duty cycles δ2 and δ1 of switches S2 and S1. The intermediate and output voltage levels are defined based on the choice of the region of operation and are mapped herein, summarizing the possible voltage levels achieved by each configuration. The paper presents the theoretical analysis, simulation, implementation and experimental validation of a converter with the following specifications; 48 V/12 V input-to-output voltage, different intermediate voltage levels, 100 W power rating, and switching frequency of 300 kHz. Comparisons between mathematical, simulation, and experimental results are made with the objective of validating the statements herein introduced.


Electronics ◽  
2019 ◽  
Vol 8 (12) ◽  
pp. 1379 ◽  
Author(s):  
Umberto Abronzini ◽  
Ciro Attaianese ◽  
Matilde D’Arpino ◽  
Mauro Di Monaco ◽  
Giuseppe Tomasso

Neutral Point Clamped (NPC) converters with n levels are traditionally controlled in such a way that the DC-link capacitors operate at 1/( n - 1) of the total DC-link voltage level. The voltage level across the DC-link capacitors has to be properly regulated by the capacitor unbalance control to contain the harmonic distortion of the converter output voltages. State-of-the-art modulation techniques address the problem of the DC-link voltage regulation for NPC inverters. However, they highly show reduced performance when unbalanced DC-link voltages are considered. In this paper, a novel Space Vector Modulation (SVM) is proposed for NPC converters with an unbalanced DC-link. At every modulation interval, the technique defines the optimal switching pattern by considering the actual unbalanced DC-link conditions. The proposed modulation allows improving the harmonic content of the NPC converter output voltage with respect to a traditional ML-SVM, when the same operating conditions are considered. As an extension, the proposed modulation technique will guarantee the same output voltage quality of a traditional ML-SVM with unbalanced DC-link, while improving the conversion efficiency thanks to a reduction of switching frequency.


2020 ◽  
Vol 1004 ◽  
pp. 464-471
Author(s):  
Sarah Rugen ◽  
Siddarth Sundaresan ◽  
Ranbir Singh ◽  
Nando Kaminski

Bipolar silicon carbide devices are attractive for high power applications offering high voltage devices with low on-state voltages due to plasma flooding. Unfortunately, these devices suffer from bipolar degradation, which causes a significant degradation of the on-state voltage. To explore the generation of stacking faults, which cause the degradation, the impact of the current density and temperature on bipolar degradation is investigated in this work. The analysis is done by stressing the base-collector diode of 1.2 kV bipolar junction transistors (BJTs) as well as the BJTs in common-emitter mode operation with different current densities at different temperatures.


2011 ◽  
Vol 383-390 ◽  
pp. 1077-1083
Author(s):  
Run Hua Liu ◽  
Gang Wang

The paper presents the inverter method which based on cascade multilevel inverter and MOSFET-assisted soft-switching of IGBT and modulation strategy against the double requirement of high-power inverter and high frequency. The method can effectively improve the output voltage, reduce harmonic distortion and switching losses, improve the switching frequency and meet the double requirement of the high-power inverter and high frequency. The method proved to be feasible by simulation and experiment.


2013 ◽  
Vol 5 (1) ◽  
pp. 29-34
Author(s):  
Yul Antonisfia ◽  
Era Madona

Buck converter is one of DC chopper which has the function of stabilizing the voltage to lower voltage where the output voltage is lower than the input voltage without having to remove power is relatively large. By using a buck converter is a high voltage can be reduced to lower as you wish without losing power is relatively large. The voltage output of the buck converter is able to charge the battery. The magnitude of the output voltage depends dutycyle switching generated by the microcontroller. This tool is also equipped with a flow sensor is used to detect the charging current into the battery. If the charging current is reduced, the buzzer will sound. The tool is based microcontrollers using BASCOM ATMEGA8535, which can generate a PWM with dutycyle specified. Dutycyle determined the size of the input voltage and the desired output.


Author(s):  
Pritish Kumar Ghosh ◽  
Alok Kumar Shrivastav ◽  
Pradip Kumar Sadhu ◽  
Amarnath Sanyal

The paper deals with the design methodology of high voltage high power alternators driven by steam turbines. These alternators run at a high speed of 3000 rpm in most part of the world (at 3600 rpm in USA) and are of cylindrical pole construction. The design procedure suggested in the text-books of design does not well-suit for large alternators of modern time. Modern high power alternators are designed with a low value of SCR to reduce the size, inertia and cost of the rotor. The diameter is limited by the consideration of centrifugal stresses. The no.of stator slots are determined by the no. of turns. The ventilating circuit has to be designed for hydrogen as coolant and in addition with water flowing through hollow conductors, if required. The data for the design variables and the design constraints are quite different from those for small power ratings. The materials to be chosen must be of very high quality. The computer programme has been chalked out and the case-study has been conducted keeping all these points in view.


2018 ◽  
Vol 57 (2) ◽  
pp. 164-174
Author(s):  
Yuvaraja T ◽  
KA Ramesh Kumar

H-bridge multilevel converter is the most challenging topology from nominal to high power applications. However, when the energy is exchanged between AC side and DC side or vice versa, the fluctuation in the capacitor used in deputize unit is unavoidable. The fluctuation in the deputize unit is due to the increase in the total harmonic distortion by the capacitor in the output voltages. This total harmonic distortion is evaded by exploring the deputize unit capacitor voltage mathematically. This paper proposes the enhanced frequency shift carrier modulation in H-bridge multilevel converter to suppress the influence of fluctuation in deputize unit capacitor voltages. Enhanced frequency shift carrier modulation is considered for nonlinear compensation. The principal results of using this enhanced frequency shift carrier modulation improvise the total harmonic distortion in the output voltage of H-bridge multilevel converter. Simulation and experimental results are done using MATLAB/SIMULINK to verify the effectiveness of the proposed control scheme.


2020 ◽  
Vol 29 (12) ◽  
pp. 2050193 ◽  
Author(s):  
K. T. Ajmal ◽  
K. Muhammedali Shafeeque ◽  
B. Jayanand

A novel Four Switch Infinite Level Inverter (FSILI) is proposed in this paper. In conventional multilevel inverters, as the number of levels increases the output voltage becomes more sinusoidal. Unlike conventional multilevel topologies, the output voltage level in the proposed topology depends upon the switching frequency. Since the switching frequency is very high, the output voltage level approaches infinity, thus the name Infinite Level Inverter. Proposed topology requires only one inductor and capacitor reducing the size, weight and thus cost of the overall system. Inherent buck operation is happening in the proposed topology with a sine varying duty ratio PWM control. Steady-state analysis and design of the inverter are carried out. The proposed topology is simulated using Matlab/Simulink to evaluate the theoretical analysis and operation. A hardware prototype is also developed to validate the operation of proposed FSILI.


Sign in / Sign up

Export Citation Format

Share Document