scholarly journals Readout Integrated Circuit for Small-Sized and Low-Power Gas Sensor Based on HEMT Device

Sensors ◽  
2021 ◽  
Vol 21 (16) ◽  
pp. 5637
Author(s):  
Seungjun Lee ◽  
Joohwan Jin ◽  
Jihyun Baek ◽  
Juyong Lee ◽  
Hyungil Chae
Keyword(s):  
Low Power ◽  
Gas Sensor ◽  
Integrated Circuit ◽  
Hydrogen Gas ◽  
Oxide Semiconductor ◽  
Sensor System ◽  
Cmos Process ◽  
High Electron ◽  
Readout Integrated Circuit ◽  
Detection Unit

This paper presents a small-sized, low-power gas sensor system combining a high-electron-mobility transistor (HEMT) device and readout integrated circuit (ROIC). Using a semiconductor-based HEMT as a gas-sensing device, it is possible to secure high sensitivity, reduced complexity, low power, and small size of the ROIC sensor system. Unlike existing gas sensors comprising only HEMT elements, the proposed sensor system has both an ROIC and a digital controller and can control sensor operation through a simple calibration process with digital signal processing while maintaining constant performance despite variations. The ROIC mainly consists of a transimpedance amplifier (TIA), a negative-voltage generator, and an analog-to-digital converter (ADC) and is designed to match a minimum target detection unit of 1 ppm for hydrogen. The prototype ROIC for the HEMT presented herein was implemented in a 0.18 µm complementary metal–oxide–semiconductor (CMOS) process. The total measured power consumption and detection unit of the proposed ROIC for hydrogen gas were 3.1 mW and 2.6 ppm, respectively.

scholarly journals Fully Differential Chopper-Stabilized Multipath Current-Feedback Instrumentation Amplifier with R-2R DAC Offset Adjustment for Resistive Bridge Sensors

2019 ◽  
Vol 10 (1) ◽  
pp. 63 ◽  
Author(s):  
Yongsu Kwon ◽  
Hyungseup Kim ◽  
Jaesung Kim ◽  
Kwonsang Han ◽  
Donggeun You ◽  
...  
Keyword(s):  
Integrated Circuit ◽  
Complementary Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Instrumentation Amplifier ◽  
Cmos Process ◽  
Current Feedback ◽  
Readout Integrated Circuit ◽  
Fully Differential ◽  
Chopper Stabilization ◽  
Rejection Ratio

A fully differential multipath current-feedback instrumentation amplifier (CFIA) for a resistive bridge sensor readout integrated circuit (IC) is proposed. To reduce the CFIA’s own offset and 1/f noise, a chopper stabilization technique is implemented. To attenuate the output ripple caused by chopper up-modulation, a ripple reduction loop (RRL) is employed. A multipath architecture is implemented to compensate for the notch in the chopping frequency band of the transfer function. To prevent performance degradation resulting from external offset, a 12-bit R-2R digital-to-analog converter (DAC) is employed. The proposed CFIA has an adjustable gain of 16–44 dB with 5-bit programmable resistors. The proposed resistive sensor readout IC is implemented in a 0.18 μm complementary metal-oxide-semiconductor (CMOS) process. The CFIA draws 169 μA currents from a 3.3 V supply. The simulated input-referred noise and noise efficiency factor (NEF) are 28.3 nV/√Hz and 14.2, respectively. The simulated common-mode rejection ratio (CMRR) is 162 dB, and the power supply rejection ratio (PSRR) is 112 dB.

A LOW POWER HIGH RESOLUTION ROIC DESIGN WITH 14-BIT COLUMN-LEVEL ADC FOR 384 × 288 IRFPA

2013 ◽  
Vol 22 (09) ◽  
pp. 1340015 ◽  
Author(s):  
YAJING ZHANG ◽  
WENGAO LU ◽  
GUANNAN WANG ◽  
ZHONGJIAN CHEN ◽  
YACONG ZHANG
Keyword(s):  
High Resolution ◽  
Low Power ◽  
Integrated Circuit ◽  
High Speed ◽  
High Performance ◽  
Low Noise ◽  
Cmos Process ◽  
Readout Integrated Circuit ◽  
Analog To Digital Conversion ◽  
Amplifier Design

A readout integrated circuit (ROIC) of infrared focal plane array (IRFPA) with low power and low noise is presented in this paper. It consists of a 384 × 288 pixel array and column-level A/D conversion circuits. The proposed system has high resolution because of the odd–even Analog to Digital Conversion (ADC) structure, containing correlated switches design, multi-Vth amplifier design and high speed high resolution comparator design including latch-stage. Designed and simulated in 0.35-μm CMOS process, this high performance ROIC achieves 81.24 dB SNR at 8.64 KS/s consuming 98 mW under 5 V voltage supply, resulting in an ENOB of 13.2-bit.

A portable low-power hydrogen gas sensor system for wide range H/sub 2/ detection

2002 ◽  
Author(s):  
D.L. Hetherington ◽  
R.W. Grant ◽  
K.L. Hughes ◽  
W.T. Corbett ◽  
R.C. Hughes ◽  
...  
Keyword(s):  
Low Power ◽  
Gas Sensor ◽  
Hydrogen Gas ◽  
Sensor System ◽  
Wide Range

scholarly journals A Radiation-Hardened Instrumentation Amplifier for Sensor Readout Integrated Circuits in Nuclear Fusion Applications

Electronics ◽  
2018 ◽  
Vol 7 (12) ◽  
pp. 429 ◽  
Author(s):  
Kyungsoo Jeong ◽  
Duckhoon Ro ◽  
Gwanho Lee ◽  
Myounggon Kang ◽  
Hyung-Min Lee
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Radiation Effects ◽  
Nuclear Fusion ◽  
Oxide Semiconductor ◽  
Instrumentation Amplifier ◽  
Cmos Process ◽  
Readout Integrated Circuit ◽  
Nuclear Fusion Reactor ◽  
Radiation Hardened

A nuclear fusion reactor requires a radiation-hardened sensor readout integrated circuit (IC), whose operation should be tolerant against harsh radiation effects up to MGy or higher. This paper proposes radiation-hardening circuit design techniques for an instrumentation amplifier (IA), which is one of the most sensitive circuits in the sensor readout IC. The paper studied design considerations for choosing the IA topology for radiation environments and proposes a radiation-hardened IA structure with total-ionizing-dose (TID) effect monitoring and adaptive reference control functions. The radiation-hardened performance of the proposed IA was verified through model-based circuit simulations by using compact transistor models that reflected the TID effects into complementary metal–oxide–semiconductor (CMOS) parameters. The proposed IA was designed with the 65 nm standard CMOS process and provides adjustable voltage gain between 3 and 15, bandwidth up to 400 kHz, and power consumption of 34.6 μW, while maintaining a stable performance over TID effects up to 1 MGy.

Extended High-Temperature Operation of Silicon Carbide CMOS Circuits for Venus Surface Application

2016 ◽  
Vol 13 (4) ◽  
pp. 143-154 ◽  
Author(s):  
Jim Holmes ◽  
A. Matthew Francis ◽  
Ian Getreu ◽  
Matthew Barlow ◽  
Affan Abbasi ◽  
...  
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Integrated Circuit ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Logic Synthesis ◽  
Oxide Semiconductor ◽  
Cmos Process ◽  
Timing Models ◽  
High Temperature Operation

In the last decade, significant effort has been expended toward the development of reliable, high-temperature integrated circuits. Designs based on a variety of active semiconductor devices including junction field-effect transistors and metal-oxide-semiconductor (MOS) field-effect transistors have been pursued and demonstrated. More recently, advances in low-power complementary MOS (CMOS) devices have enabled the development of highly integrated digital, analog, and mixed-signal integrated circuits. The results of elevated temperature testing (as high as 500°C) of several building block circuits for extended periods (up to 100 h) are presented. These designs, created using the Raytheon UK's HiTSiC® CMOS process, present the densest, lowest-power integrated circuit technology capable of operating at extreme temperatures for any period. Based on these results, Venus nominal temperature (470°C) transistor models and gate-level timing models were created using parasitic extracted simulations. The complete CMOS digital gate library is suitable for logic synthesis and lays the foundation for complex integrated circuits, such as a microcontroller. A 16-bit microcontroller, based on the OpenMSP 16-bit core, is demonstrated through physical design and simulation in SiC-CMOS, with an eye for Venus as well as terrestrial applications.

scholarly journals A 24.88 nV/√Hz Wheatstone Bridge Readout Integrated Circuit with Chopper-Stabilized Multipath Operational Amplifier

2020 ◽  
Vol 10 (1) ◽  
pp. 399 ◽  
Author(s):  
Kwonsang Han ◽  
Hyungseup Kim ◽  
Jaesung Kim ◽  
Donggeun You ◽  
Hyunwoo Heo ◽  
...  
Keyword(s):  
Integrated Circuit ◽  
Operational Amplifier ◽  
Wheatstone Bridge ◽  
Input Resistance ◽  
Cmos Technology ◽  
Low Noise ◽  
Oxide Semiconductor ◽  
Instrumentation Amplifier ◽  
Readout Integrated Circuit ◽  
Chopper Stabilization

This paper proposes a low noise readout integrated circuit (IC) with a chopper-stabilized multipath operational amplifier suitable for a Wheatstone bridge sensor. The input voltage of the readout IC changes due to a change in input resistance, and is efficiently amplified using a three-operational amplifier instrumentation amplifier (IA) structure with high input impedance and adjustable gain. Furthermore, a chopper-stabilized multipath structure is applied to the operational amplifier, and a ripple reduction loop (RRL) in the low frequency path (LFP) is employed to attenuate the ripple generated by the chopper stabilization technique. A 12-bit successive approximation register (SAR) analog-to-digital converter (ADC) is employed to convert the output voltage of the three-operational amplifier IA into digital code. The Wheatstone bridge readout IC is manufactured using a standard 0.18 µm complementary metal-oxide-semiconductor (CMOS) technology, drawing 833 µA current from a 1.8 V supply. The input range and the input referred noise are ±20 mV and 24.88 nV/√Hz, respectively.

A LOW POWER CRYOGENIC CMOS ROIC DESIGN FOR 512 × 512 IRFPA

2013 ◽  
Vol 22 (10) ◽  
pp. 1340033 ◽  
Author(s):  
HONGLIANG ZHAO ◽  
YIQIANG ZHAO ◽  
YIWEI SONG ◽  
JUN LIAO ◽  
JUNFENG GENG
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Integrated Circuit ◽  
High Performance ◽  
Supply Voltage ◽  
Cmos Technology ◽  
High Gain ◽  
Readout Integrated Circuit ◽  
Chip Area ◽  
Operating Modes

A low power readout integrated circuit (ROIC) for 512 × 512 cooled infrared focal plane array (IRFPA) is presented. A capacitive trans-impedance amplifier (CTIA) with high gain cascode amplifier and inherent correlated double sampling (CDS) configuration is employed to achieve a high performance readout interface for the IRFPA with a pixel size of 30 × 30 μm2. By optimizing column readout timing and using two operating modes in column amplifiers, the power consumption is significantly reduced. The readout chip is implemented in a standard 0.35 μm 2P4M CMOS technology. The measurement results show the proposed ROIC achieves a readout rate of 10 MHz with 70 mW power consumption under 3.3 V supply voltage from 77 K to 150 K operating temperature. And it occupies a chip area of 18.4 × 17.5 mm2.

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