Impact of Cell Geometry on Zero-Energy Turn-Off of SiC Power MOSFETs

2018 ◽  
Vol 924 ◽  
pp. 756-760 ◽  
Author(s):  
Xue Qing Liu ◽  
Sauvik Chowdhury ◽  
Collin W. Hitchcock ◽  
T. Paul Chow

1200V SiC power MOSFETs of various cell geometries are modeled in Synopsis Inc. Sentaurus TCAD. The impact of cell geometry on switching loss is studied by comparing the turn-on and turn-off losses using refined calculation methods. Under optimum circuit conditions, two different novel unit cell designs each achieve lower switching losses than conventional designs. For all the designs, lossless turn-on is impossible but lossless turn-off is achievable under circuit and biasing conditions that produce sufficiently rapid gate slew.

2019 ◽  
Vol 963 ◽  
pp. 797-800 ◽  
Author(s):  
Ajit Kanale ◽  
Ki Jeong Han ◽  
B. Jayant Baliga ◽  
Subhashish Bhattacharya

The high-temperature switching performance of a 1.2kV SiC JBSFET is compared with a 1.2kV SiC MOSFET using a clamped inductive load switching circuit representing typical H-bridge inverters. The switching losses of the SiC MOSFET are also evaluated with a SiC JBS Diode connected antiparallel to it. Measurements are made with different high-side and low-side device options across a range of case temperatures. The JBSFET is observed to display a reduction in peak turn-on current – up to 18.9% at 150°C and a significantly lesser turn-on switching loss – up to 46.6% at 150°C, compared to the SiC MOSFET.


2019 ◽  
Vol 963 ◽  
pp. 625-628
Author(s):  
Ajit Kanale ◽  
B. Jayant Baliga ◽  
Ki Jeong Han ◽  
Subhashish Bhattacharya

The high-temperature switching performance of a 1.2kV SiC JBSFET is compared with a 1.2kV SiC MOSFET using a clamped inductive load switching circuit representing typical H-bridge inverters. The switching losses of the SiC MOSFET are also evaluated with a SiC JBS Diode connected antiparallel to it. Measurements are made with different high-side and low-side device options across a range of case temperatures. The JBSFET is observed to display a reduction in peak turn-on current – up to 18.9% at 150°C and a significantly lesser turn-on switching loss – up to 46.6% at 150°C, compared to the SiC MOSFET.


2016 ◽  
Vol 858 ◽  
pp. 885-888 ◽  
Author(s):  
Yuichiro Nanen ◽  
Masatoshi Aketa ◽  
Yuki Nakano ◽  
Hirokazu Asahara ◽  
Takashi Nakamura

Dynamic and static characteristics of SiC power MOSFETs at high temperature up to 380°C were investigated. Investigated devices have exhibited a behavior as a normally-off MOSFET even at such high temperature as 380°C. Temperature dependence of the MOSFET characteristics are reported in this paper, such as threshold voltage (VTH), on-resistance, internal gate resistance, and turn-on and turn-off losses (EON, EOFF). EON decreases and EOFF increases with increased temperature. Temperature dependence of switching losses is affected by transfer time of VDS, which was mainly determined from VTH.


2008 ◽  
Vol 2008 ◽  
pp. 1-9 ◽  
Author(s):  
Sibylle Dieckerhoff ◽  
Thies Wernicke ◽  
Christine Kallmayer ◽  
Stephan Guttowski ◽  
Herbert Reichl

The impact of a reduced package stray inductance on the switching performance of fast power MOSFETs is discussed applying advanced 3D packaging technologies. Starting from an overview over new packaging approaches, a solder bump technology using a flexible PI substrate is exemplarily chosen for the evaluation. Measurement techniques to determine the stray inductance are discussed and compared with a numerical solution based on the PEEC method. Experimental results show the improvement of the voltage utilization while there is only a slight impact on total switching losses.


2004 ◽  
Vol 14 (03) ◽  
pp. 879-883 ◽  
Author(s):  
SEI-HYUNG RYU ◽  
SUMI KRISHNASWAMI ◽  
MRINAL DAS ◽  
JAMES RICHMOND ◽  
ANANT ANANT AGARWAL ◽  
...  

Due to the high critical field in 4 H - SiC , the drain charge and switching loss densities in a SiC power device are approximately 10X higher than that of a silicon device. However, for the same voltage and resistance ratings, the device area is much smaller for the 4 H - SiC device. Therefore, the total drain charge and switching losses are much lower for the 4 H - SiC power device. A 2.3 kV, 13.5 mΩ-cm2 4 H - SiC power DMOSFET with a device area of 2.1 mm × 2.1 mm has been demonstrated. The device showed a stable avalanche at a drain bias of 2.3 kV, and an on-current of 5 A with a VGS of 20 V and a VDS of 2.6 V. Approximately an order of magnitude lower parasitic capacitance values, as compared to those of commercially available silicon power MOSFETs, were measured for the 4 H - SiC power DMOSFET. This suggests that the 4 H - SiC DMOSFET can provide an order of magnitude improvement in switching performance in high speed switching applications.


2005 ◽  
Vol 483-485 ◽  
pp. 797-800 ◽  
Author(s):  
Sei Hyung Ryu ◽  
Sumi Krishnaswami ◽  
Mrinal K. Das ◽  
Jim Richmond ◽  
Anant K. Agarwal ◽  
...  

Due to the high critical field in 4H-SiC, the drain charge and switching loss densities in a SiC power device are approximately 10X higher than that of a silicon device. However, for the same voltage and resistance ratings, the device area is much smaller for the 4H-SiC device. Therefore, the total drain charge and switching losses are much lower for the 4H-SiC power device. A 2.3 kV, 13.5 mW-cm2 4H-SiC power DMOSFET with a device area of 2.1 mm x 2.1 mm has been demonstrated. The device showed a stable avalanche at a drain bias of 2.3 kV, and an on-current of 5 A with a VGS of 20 V and a VDS of 2.6 V. Approximately an order of magnitude lower parasitic capacitance values, as compared to those of commercially available silicon power MOSFETs, were measured for the 4H-SiC power DMOSFET. This suggests that the 4H-SiC DMOSFET can provide an order of magnitude improvement in switching performance in high speed switching applications.


2018 ◽  
Vol 924 ◽  
pp. 774-777 ◽  
Author(s):  
Bart van Zeghbroeck ◽  
Hamid Fardi

A comprehensive comparison of 3C-SiC and 4H-SiC power MOSFETs was performed, aimed at quantifying and comparing the devices’ on-resistance and switching loss. To this end, the relevant material parameters were collected using experimental data where available, or those obtained by simulation. This includes the bulk mobility as a function of doping density, the breakdown field as a function of doping and the MOSFET channel mobility. A device model was constructed and then used to calculate the on-resistance and breakdown voltage of a properly scaled device as a function of the doping density of the blocking layer. A SPICE model was constructed to explore the switching transients and switching losses. The simulations indicate that, for the chosen material parameters, a 600 V 3C-SiC MOSFET has an on-resistance, which is less than half that of a 4H-SiC MOSFET as are the switching losses in the device.


1998 ◽  
Vol 305 (3-4) ◽  
pp. 209-212 ◽  
Author(s):  
Ulf Jaenicke-Rössler ◽  
Gernot Zahn ◽  
Peter Paufler ◽  
Holger Bitterlich ◽  
Günter Behr

2014 ◽  
Vol 1648 ◽  
Author(s):  
Michael Culler ◽  
Keri A. Ledford ◽  
Jason H. Nadler

ABSTRACTRemora fish are capable of fast, reversible and reliable adhesion to a wide variety of both natural and artificial marine hosts through a uniquely evolved dorsal pad. This adhesion is partially attributed to suction, which requires a robust seal between the pad interior and the ambient environment. Understanding the behavior of remora adhesion based on measurable surface parameters and material properties is a critical step when creating artificial, bio-inspired devices. In this work, structural and fluid finite element models (FEM) based on a simplified “unit cell” geometry were developed to predict the behavior of the seal with respect to host/remora surface topology and tissue material properties.


Sign in / Sign up

Export Citation Format

Share Document