KEMET SMD Film Capacitors for High Temperature Applications

2013 ◽  
Vol 2013 (HITEN) ◽  
pp. 000013-000024 ◽  
Author(s):  
Luca Caliari ◽  
Paola Bettacchi ◽  
Evangelista Boni ◽  
Davide Montanari ◽  
Arrigo Gamberini ◽  
...  
Keyword(s):  
High Temperature ◽  
High Reliability ◽  
Ac Loss ◽  
Shock Acceleration ◽  
Hole Drilling ◽  
Harsh Environment ◽  
Mechanical Shock ◽  
Component Level ◽  
Film Capacitor ◽  
Low Leakage

Trends of several applications like down-hole drilling, commercial aviation (e.g. jet engines), heavy industrial and automotive are challenging the capabilities of capacitors and other electronic components. The growing harsh-environment conditions for these applications are: high temperature, high voltage and high current. At the capacitor component level, required features are: very high reliability under mechanical shock, rapid changes in temperature, low leakage current (high insulation resistance), small dimensions, good stability with time and humidity, and high peak withstanding voltage. Capacitors for power-conversion circuitry must maintain a low AC loss and DC leakage at high temperatures. KEMET has recently designed film capacitor series using PEN to address the needs of the above mentioned circuits, in particular regarding the working temperature, voltage and current. This paper will cover technological advances in film capacitor technology to address harsh environment conditions needs, providing test results on temperature, voltage and thermal shock acceleration factor.

POL and LDO for Harsh Environment Applications

2013 ◽  
Vol 2013 (HITEN) ◽  
pp. 000075-000081
Author(s):  
Ramesh Khanna ◽  
Srinivasan Venkataraman
Keyword(s):  
High Temperature ◽  
Oil And Gas ◽  
High Reliability ◽  
Oil And Gas Industry ◽  
Building Blocks ◽  
Low Noise ◽  
Harsh Environment ◽  
Buck Converters ◽  
Gas Industry ◽  
Component Selection

Harsh Environment approved components/ designs require high reliability as well as availability of power to meet their system needs. The paper will explore the various design constrains imposed on the high temperature designs. Down hole oil and gas industry requires high reliability components that can withstand high temperature. Discrete component selection, packaging and constrains imposed by various specification requirements to meet harsh environment approval are critical aspect of high-temp designs. High temperature PCB material, PCB layout techniques, trace characteristics are an important aspect of high-temperature PCB design and will be explored in the article. Buck Converters are the basic building blocks, but in order to meet system requirements to power FPGA's where low output voltage and high currents are required. Converter must be able to provide wider step down ratios with high transient response so buck converters are used. The paper with explore the various features of a buck-based POL converter design. Low noise forces the need for Low-dropout (LDO) Regulators that can operate at high Temperatures up to 210°C. This paper will address the power requirements to meet system needs.

Process and Evaluation of High Reliability Reworkable Edge Bond Adhesives for Large Area BGA Applications

2016 ◽  
Vol 2016 (DPC) ◽  
pp. 002018-002053
Author(s):  
Swapan Bhattacharya ◽  
Fei Xie ◽  
Daniel F. Baldwin ◽  
Han Wu ◽  
Kelley Hodge ◽  
...  
Keyword(s):  
High Performance ◽  
Printed Circuit Boards ◽  
Process Development ◽  
High Reliability ◽  
Optimum Process ◽  
Process Conditions ◽  
Harsh Environment ◽  
Mechanical Shock ◽  
Large Area ◽  
Reliability Performance

Reworkable underfills and edge bond adhesives are finding increasing utility in high reliability and harsh environment applications. The ASICs and FPGAs often used in these systems typically require designs incorporating large BGAs and ceramic BGAs. For these high reliability and harsh environment applications, these packages typically require underfill or edge bond materials to achieve the needed thermal cycle, mechanical shock and vibration reliability. Moreover, these applications often incorporate high dollar value printed circuit boards (on the order of thousands or tens of thousands of dollars per PCB) hence the need to rework these assemblies and maintain the integrity of the PCB and high dollar value BGAs. This further complicates the underfill requirements with a reworkability component. Reworkable underfills introduce a number of process issues that can result in significant variability in reliability performance. In contrast, edge bond adhesives provide a high reliability solution with substantial benefits over underfills. One interesting question for the large area BGA applications of reworkable underfills and edge bond materials is the comparison of their reliability performance. This paper presents a study of reliability comparison between two robust selected reworkable underfill and edge bond adhesive in a test vehicle including 11mm, 13mm, and 27mm large area BGAs. Process development for those large area BGA applications was also conducted on the underfill process and edge bond process to determine optimum process conditions. For underfill processing, establishing an underfill process that minimizing/eliminates underfill voids is critical. For edge bond processing, establishing an edge bond that maximizes bond area without encapsulating the solder balls is key to achieving high reliability. In addition, this paper also presents a study of new high performance reworkable edge bond materials designed to improve the reliability of large area BGAs and ceramic BGAs assemblies while maintaining good reworkablity. Four edge bond materials (commercially available) were studied and compared for a test vehicles with 12mm BGAs. The reliability testing protocol included board level thermal cycling (−40 to 125°C), mechanical drop testing (2900 G), and random vibration testing (3 G, 10 – 1000 Hz).

Pb-free v/s Tin-Lead Reliability Comparison for Telecom/High Reliability Applications

2010 ◽  
Vol 2010 (1) ◽  
pp. 000284-000293
Author(s):  
Ganesh Iyer ◽  
Gnyaneshwar Ramakrishna ◽  
Lavanya Gopalakrishnan ◽  
Kuo-Chuan Liu
Keyword(s):  
Service Providers ◽  
High Reliability ◽  
Consumer Electronics ◽  
Circuit Board ◽  
Evaluation Methodology ◽  
Mechanical Shock ◽  
Printed Circuit Board Assembly ◽  
Component Level ◽  
Cross Sectional ◽  
Free Solder

With the European Union's (EU's) RoHS directives coming into force in July 2006 for consumer electronics products, the transition to lead-free (Pb-free) solder has occurred at a rapid pace. This push has driven many OEM suppliers/manufacturers to adopt Pb-free solder and End of Life many of their conventional Tin-Lead (Sn-Pb) components. This has forced telecom or high reliability applications to adopt Pb-free solder compositions with many reliability anomalies unanswered. While there have been many studies published on long term reliability of Pb-free solder joints at the component level, there have been few studies focused on the time zero reliability of the joints at the printed circuit board assembly (PCBA) level. The goal of this study is to help the OEM suppliers and their customers (like service providers) to come up with a common PCBA test methodology that will help identify and weed out early, marginal manufacturing and design defects that would crop up due to transition to the Pb-free solder. A normalized reliability data comparison and impact of the test on Pb-free and Tin-Lead solder alloys using test vehicles is presented in this study. The sequential PCBA level evaluation methodology involves a series of tests that include Thermal Aging, Mechanical Shock, Vibration, Functional test over elevated temperature and Destructive Analysis (Dye & Pry and Cross-sectional analysis) . The solder joint reliability comparisons for different components are presented against this methodology using different PCBA constructions (test vehicles).

Low Temperature Tantalum Pentoxide Thin Films

1992 ◽  
Vol 284 ◽  
Author(s):  
Kee-Won Kwon ◽  
Chang-Seok Kang ◽  
Tai-su Park ◽  
Yong-Bin Sun ◽  
Neal Sandler ◽  
...  
Keyword(s):  
High Temperature ◽  
Low Temperature ◽  
Leakage Current ◽  
Single Phase ◽  
High Reliability ◽  
Current Source ◽  
Low Leakage ◽  
Low Leakage Current ◽  
Temperature Deposition ◽  
Post Deposition

ABSTRACTTa2O5 films of high reliability and low leakage current density were obtained by low temperature deposition and subsequent high temperature oxygen anneal. At higher temperatures than 410°C, growth was governed by the formation of radicals in gas phase and oxidation on the surface, while at lower temperatures by the dissociation of reactant on the surface of substrates. As a result, the films deposited at lower temperatures had undensified structures, and contained more carbon that might be a leakage current source in Ta2O5 film. During post-deposition heat treatment in 800°C oxidating ambient, carbon was removed away and silicon was diffused from the substrate into the Ta2O5 film efficiently for its as-grown porous structure. After oxygen anneal, low temperature films get denser and are crystallized to mixed phase of orthorhombic and hexagonal Ta2O5, while high temperature films crystallized to orthorhombic single phase. Ta2O5 capacitor with low temperature films showed superior leakage characteristics applicable to sub-half micron memory devices.

C0G and X7R Ceramic Capacitors for High Temperature Applications

2016 ◽  
Vol 2016 (HiTEC) ◽  
pp. 000290-000298
Author(s):  
Abhijit Gurav ◽  
Jim Magee ◽  
Reggie Phillips ◽  
Scott Carson
Keyword(s):  
High Temperature ◽  
High Reliability ◽  
Extreme Temperature ◽  
Class Ii ◽  
Class I ◽  
Hole Drilling ◽  
Ceramic Capacitors ◽  
Temperature Application ◽  
Reliability Performance ◽  
Robust Reliability

Abstract For applications such as electronics for down-hole drilling and exploration, geothermal energy generation and power electronics, there is a growing need for capacitors that have robust reliability at temperatures of 150°C or above. Conventional X7R and X8R type ceramic capacitors are designed for applications up to 125°C and 150°C, respectively. At temperatures above 150°C, these types of capacitors typically suffer from degradation of reliability performance and severe reduction in capacitance, especially under DC bias conditions. A Class-I C0G dielectric has been developed using Nickel electrodes for high temperature application up to 200°C and beyond. Due to its linear dielectric nature, this material exhibits highly stable capacitance as a function of temperature and voltage. Multi-layer ceramic capacitors (MLCC) made from this material can be qualified as X9G with robust reliability. These C0G capacitors are showing robust reliability at extreme temperature of 260°C (500 degrees Fahrenheit). We have also developed a modified-X7R dielectric composition with nickel internal electrodes showing high reliability in this Class-II dielectric at 175°C. This paper will report electrical properties and reliability test data on these Class-I C0G and Class-II ceramic capacitors at high temperatures of 150–200°C and above.

Low-Temperature Post-Oxidation Annealing Using Atomic Hydrogen Radicals Generated by High-Temperature Catalyzer for Improvement in Reliability of Thermal Oxides on 4H-SiC

2006 ◽  
Vol 527-529 ◽  
pp. 999-1002
Author(s):  
Junji Senzaki ◽  
Atsushi Shimozato ◽  
Kenji Fukuda
Keyword(s):  
High Temperature ◽  
Low Temperature ◽  
Atomic Hydrogen ◽  
High Reliability ◽  
Hydrogen Atmosphere ◽  
Exposed Sample ◽  
New Apparatus ◽  
Hydrogen Radical ◽  
Hydrogen Radicals ◽  
Sic Wafer

Low-temperature post-oxidation annealing (POA) process of high-reliability thermal oxides grown on 4H-SiC using new apparatus that generates atomic hydrogen radicals by high-temperature catalyzer has been investigated. Atomic hydrogen radicals were generated by thermal decomposition of H2 gas at the catalyzer surface heated at high temperature of 1800°C, and then exposed to the sample at 500°C in reactor pressure of 20 Pa. The mode and maximum values of field-to-breakdown are 11.0 and 11.2 MV/cm, respectively, for the atomic hydrogen radical exposed sample. In addition, the charge-to-breakdown at 63% cumulative failure of the thermal oxides for atomic hydrogen radical exposed sample was 0.51 C/cm2, which was higher than that annealed at 800°C in hydrogen atmosphere (0.39 C/cm2). Consequently, the atomic hydrogen radical exposure at 500°C has remarkably improved the reliability of thermal oxides on 4H-SiC wafer, and is the same effect with high-temperature hydrogen POA at 800°C.

Experimental Characterization and Finite Element Modeling of Film Capacitors for Automotive Applications

2016 ◽  
Author(s):  
D. Croccolo ◽  
T. M. Brugo ◽  
M. De Agostinis ◽  
S. Fini ◽  
G. Olmi
Keyword(s):  
Finite Element ◽  
Mechanical Response ◽  
High Reliability ◽  
Three Dimensional ◽  
Strain Analysis ◽  
Life Time ◽  
Element Model ◽  
Image Correlation ◽  
Thermal Loads ◽  
Mechanical Shock

As electronics keeps on its trend towards miniaturization, increased functionality and connectivity, the need for improved reliability capacitors is growing rapidly in several industrial compartments, such as automotive, medical, aerospace and military. Particularly, recent developments of the automotive compartment, mostly due to changes in standards and regulations, are challenging the capabilities of capacitors in general, and especially film capacitors. Among the required features for a modern capacitor are the following: (i) high reliability under mechanical shock, (ii) wide working temperature range, (iii) high insulation resistance, (iv) small dimensions, (v) long expected life time and (vi) high peak withstanding voltage. This work aims at analyzing the key features that characterize the mechanical response of the capacitor towards temperature changes. Firstly, all the key components of the capacitor have been characterized, in terms of strength and stiffness, as a function of temperature. These objectives have been accomplished by means of several strain analysis methods, such as strain gauges, digital image correlation (DIC) or dynamic mechanical analysis (DMA). All the materials used to manufacture the capacitor, have been characterized, at least, with respect to their Young’s modulus and Poisson’s ratio. Then, a three-dimensional finite element model of the whole capacitor has been set up using the ANSYS code. Based on all the previously collected rehological data, the numerical model allowed to simulate the response in terms of stress and strain of each of the capacitor components when a steady state thermal load is applied. Due to noticeable differences between the thermal expansion coefficients of the capacitor components, stresses and strains build up, especially at the interface between different components, when thermal loads are applied to the assembly. Therefore, the final aim of these numerical analyses is to allow the design engineer to define structural optimization strategies, aimed at reducing the mechanical stresses on the capacitor components when thermal loads are applied.

scholarly journals Langasite Based Surface Acoustic Wave Sensors for High Temperature Chemical Detection in Harsh Environment

2009 ◽  
Vol 1 (1) ◽  
pp. 963-966 ◽  
Author(s):  
G. Tortissier ◽  
L. Blanc ◽  
A. Tetelin ◽  
J-L. Lachaud ◽  
M. Benoit ◽  
...  
Keyword(s):  
High Temperature ◽  
Acoustic Wave ◽  
Surface Acoustic Wave ◽  
Harsh Environment ◽  
Chemical Detection ◽  
Acoustic Wave Sensors ◽  
Wave Sensors

Characterization of Low Temperature Polysilicon TFTs with Self-Aligned Graded LDD Structure

2001 ◽  
Vol 685 ◽  
Author(s):  
Ching-Wei Lin ◽  
Li-Jing Cheng ◽  
Yin-Lung Lu ◽  
Huang-Chung Cheng
Keyword(s):  
Low Temperature ◽  
Leakage Current ◽  
High Speed ◽  
High Reliability ◽  
Activation Process ◽  
Active Matrix ◽  
Dopant Activation ◽  
Low Leakage ◽  
Low Leakage Current ◽  
Excimer Laser Irradiation

AbstractA simple process sequence for fabrication of low temperature polysilicon (LTPS) TFTs with self-aligned graded LDD structure was demonstrated. The graded LDD structure was self-aligned by side-etch of Al under the photo-resist followed by excimer laser irradiation for dopant activation and laterally diffusion. The graded LDD polysilicon TFTs were suitable for high-speed operation and active matrix switches applications because they possessed low-leakage-current characteristic without sacrificing driving capability significantly and increasing overlap capacitance. The leakage current of graded LDD polysilicon TFTs at Vd = 5V and Vg = −10V could attain to below 1pA/μm without any hygrogenation process, when proper LDD length and laser activation process were applied. The on/off current ratios of these devices were also above 108. Furthermore, due to graded dopant distribution in LDD regions, the drain electric field could be reduced further, and as a result, graded LDD polysilicon TFTs provided high reliability for high voltage operation.

scholarly journals Impact of temperature on Bacillus cereus spore germination in ultra-high temperature chocolate milk

Food Research ◽  
2019 ◽  
pp. 808-813
Author(s):  
Ubong A. ◽  
C.Y. New ◽  
L.C. Chai ◽  
Nur Fatihah A. ◽  
Nur Hasria K. ◽  
...  
Keyword(s):  
High Temperature ◽  
Bacillus Cereus ◽  
Incubation Time ◽  
Spore Germination ◽  
Infection Risk ◽  
Effect Of Temperature ◽  
Harsh Environment ◽  
Chocolate Milk ◽  
Data Gap ◽  
Germination And Growth

Bacillus cereus spores are capable of surviving the harsh environment and more often, they cause great concern to the dairy industry. The current research was conducted to study the effect of temperature on germination and growth of B. cereus spores in UHT chocolate milk; the study was carried out at 8°C, 25°C and 35°C over a span of seven days. The results showed that no growth was observed at 8°C. At 25°C, a rapid increase in growth was observed as early as Day 1, from an initial count of ten spores to 4.01 log10 CFU/mL. Meanwhile, at 35°C, the growth on Day 1 was more rapid in which the count promptly increased to 8.07 log10 CFU/mL. Analysis of graph trend showed that the number of vegetative cells decreased while the number of spores increased with incubation time due to nutrients exhaustion. This study fills up the data gap towards understanding the possible issues that might arise in the actual scenario and at the same time, suggests a suitable approach to minimize infection risk caused by B. cereus spores.

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