Electrical Performance of a 32-I/O HTCC Alumina Package for High-Temperature Microelectronics

2017 ◽  
Vol 14 (1) ◽  
pp. 11-16 ◽  
Author(s):  
Liang-Yu Chen ◽  
Philip G. Neudeck ◽  
David J. Spry ◽  
Glenn M. Beheim ◽  
Gary W. Hunter
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Parasitic Capacitance ◽  
Circuit Board ◽  
Electrical Performance ◽  
Packaging System ◽  
Dielectric Performance ◽  
Temperature Ranges ◽  
Parallel Conductance ◽  
Potential Use

A high-temperature cofired ceramic (HTCC) alumina material was previously electrically tested at temperatures up to 550°C and demonstrated improved dielectric performance at high temperatures compared with the 96% alumina substrate that we used before, suggesting its potential use for high-temperature packaging applications. This article introduces a prototype 32-input/output (I/O) HTCC alumina package with platinum conductor for 500°C low-power SiC-integrated circuits. The design and electrical performance of this package, including parasitic capacitance and parallel conductance of neighboring I/Os from 100 Hz to 1 MHz in a temperature range from room temperature to 550°C, are discussed in detail. The parasitic capacitance and parallel conductance of neighboring I/Os of this package in the entire frequency and temperature ranges measured do not exceed 1.5 pF and 0.05 μS, respectively. SiC-integrated circuits using this package and a compatible alumina circuit board have been successfully tested at 500°C for more than 3,736 h continuously, and at 700°C for more than 140 h. Some test examples of SiC-integrated circuits with this packaging system are presented.

scholarly journals Electrical Performance of a High Temperature 32-I/O HTCC Alumina Package

2016 ◽  
Vol 2016 (HiTEC) ◽  
pp. 000066-000072 ◽  
Author(s):  
Liang-Yu Chen ◽  
Philip G. Neudeck ◽  
David J. Spry ◽  
Glenn M. Beheim ◽  
Gary W. Hunter
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Printed Circuit Board ◽  
Parasitic Capacitance ◽  
Circuit Board ◽  
Electrical Performance ◽  
Operational Testing ◽  
Dielectric Performance ◽  
Temperature Ranges ◽  
Parallel Conductance

Abstract A high temperature co-fired ceramic (HTCC) alumina material was previously electrically tested at temperatures up to 550 °C, and demonstrated improved dielectric performance at high temperatures compared with the 96% alumina substrate that we used before, suggesting its potential use for high temperature packaging applications. This paper introduces a prototype 32-I/O (input/output) HTCC alumina package with platinum conductor for 500 °C low-power silicon carbide (SiC) integrated circuits. The design and electrical performance of this package including parasitic capacitance and parallel conductance of neighboring I/Os from 100 Hz to 1 MHz in a temperature range from room temperature to 550 °C are discussed in detail. The parasitic capacitance and parallel conductance of this package in the entire frequency and temperature ranges measured does not exceed 1.5 pF and 0.05 μS, respectively. SiC integrated circuits using this package and compatible printed circuit board have been successfully tested at 500 °C for over 3736 hours continuously, and at 700 °C for over 140 hours. Some test examples of SiC integrated circuits with this packaging system are presented. This package is the key to prolonged T ≥ 500 °C operational testing of the new generation of SiC high temperature integrated circuits and other devices currently under development at NASA Glenn Research Center.

Electrical Performance of Cofired Alumina Substrates at High Temperatures

2013 ◽  
Vol 10 (3) ◽  
pp. 89-94 ◽  
Author(s):  
Liang-Yu Chen
Keyword(s):  
Dielectric Constant ◽  
High Temperature ◽  
Ac Conductivity ◽  
Large Scale ◽  
Dissipation Factor ◽  
Electrical Performance ◽  
Prototype System ◽  
Polycrystalline Aluminum ◽  
Polycrystalline Alumina ◽  
Dielectric Performance

A 96% polycrystalline alumina (Al2O3) based prototype packaging system with Au thick-film metallization successfully facilitated long term testing of high temperature SiC electronic devices for over 10,000 h at 500°C previously. However, the 96% Al2O3 chip-level packages of this prototype system were not fabricated via a commercial cofire process, which would be more suitable for large scale commercial production. The cofired alumina materials adopted by the packaging industry today usually contain several percent of glass constituents to allow cofiring processes at temperatures usually lower than the regular sintering temperature for alumina. In order to answer the question of whether cofired alumina substrates can provide a reasonable high temperature electrical performance comparable to regular 96% alumina sintered at 1700°C, this paper reports on the dielectric performance of a selected high temperature cofired ceramic (HTCC) alumina substrate and a low temperature cofired ceramic (LTCC) alumina (polycrystalline aluminum oxides with glass constituents) substrate from room temperature to 550°C at frequencies of 120 Hz, 1 KHz, 10 KHz, 100 KHz, and 1 MHz. Parallel-plate capacitive devices with dielectrics of these cofired alumina and precious metal electrodes were used for measurement of the dielectric properties of the cofired alumina materials in the temperature and frequency ranges. The capacitance and AC parallel conductance of these capacitive devices were directly measured by an AC impedance meter, and the dielectric constant and parallel AC conductivity of the dielectric were calculated from the capacitance and conductance measurement results. The temperature and frequency dependent dielectric constant, AC conductivity, and dissipation factor of selected LTCC and HTCC cofired alumina substrates are presented and compared with those of 96% alumina. Metallization schemes for cofired alumina for high temperature applications are discussed to address the packaging needs for low-power 500°C SiC electronics.

A Novel Discrete Passives Integration on Organic Substrate

2005 ◽  
Author(s):  
Vasudivan Sunappan ◽  
Chee Wai Lu ◽  
Lai Lai Wai ◽  
Wei Fan ◽  
Boon Keng Lok
Keyword(s):  
Integrated Circuits ◽  
Printed Circuit Board ◽  
Organic Substrate ◽  
Temperature Cycling ◽  
Circuit Board ◽  
Electrical Performance ◽  
Core Material ◽  
Bottom Surface ◽  
Passive Components ◽  
Printed Circuit

A novel process has been developed to embed discrete (surface mountable) passive components like capacitors, resistors and inductors using printed circuit board fabrication technology. The process comprises of mounting passive components on top surface of a core PCB (printed circuit board) material using surface mount technology. The passive components mounting were designed in multiple clusters within the PCB. Dielectric sheets are sandwiched between top surface of core PCB and second PCB material for lamination process. A direct interconnection of the passive components to one or more integrated circuits (IC) is further accomplished by mounting the ICs on the bottom surface of the core material in an area directly under the passive components. The close proximity of the embedded passive components such as capacitors to an IC improved electrical performance by providing impedance reduction and resonance suppression at high frequency range. The reliability of solder joints was evaluatedd by temperature cycling test.

scholarly journals Sixty Earth-Day Test of a Prototype Pt/HTCC Alumina Package in a Simulated Venus Environment

2019 ◽  
Vol 16 (2) ◽  
pp. 78-83 ◽  
Author(s):  
Liangyu Chen ◽  
Philip G. Neudeck ◽  
Roger D. Meredith ◽  
Dorothy Lukco ◽  
David J. Spry ◽  
...  
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Extreme Environment ◽  
Electrical Performance ◽  
Harsh Environment ◽  
Three Phase ◽  
Testing Environments ◽  
Earth Day ◽  
The Stability ◽  
Surface Environment

Abstract This article presents experimental results of a prototype high-temperature cofired ceramic (HTCC) package with Au/Pt metallization in a three-phase harsh environment test that culminated with a 60-d demonstration in a simulated Venus surface environment consisting of a 465°C corrosive atmosphere at 90 bar pressure. The prototype package is based on a previously developed and reported HTCC package successfully tested with multiple analog and digital silicon carbide high-temperature semiconductor integrated circuits in 500°C Earth air ambient for more than 10,000 hours, and short-term tested at temperatures above 800°C. The three-phase harsh environment test started with 48 h in 465°C Earth air, followed by 48 h in 465°C nitrogen at 90 bar pressure and 1,400 h in a simulated Venus surface environment of 465°C corrosive atmosphere at 90 bar. In addition to in situ electrical tests in a three-phase harsh environment and posttest electrical diagnosis, initial posttest analysis of the package materials and surfaces was performed to assess the stability of the packaging materials in the testing environments, as well as the surface conditions after the test. The test in the simulated Venus environment was implemented in the NASA Glenn Extreme Environment Rig. The results of this study suggest that an effective encapsulation of areas of surface metallization and vicinities may help improve the long-term electrical performance of an HTCC alumina packaging system in a Venus environment.

Electrical Performance of Co-Fired Alumina Substrates at High Temperatures

2012 ◽  
Vol 2012 (HITEC) ◽  
pp. 000173-000178 ◽  
Author(s):  
Liang-Yu Chen
Keyword(s):  
Dielectric Constant ◽  
High Temperature ◽  
Ac Conductivity ◽  
Large Scale ◽  
Electrical Performance ◽  
Firing Process ◽  
Prototype System ◽  
Polycrystalline Aluminum ◽  
Polycrystalline Alumina ◽  
Dielectric Performance

A 96% polycrystalline alumina (Al2O3) based prototype packaging system with Au thick-film metallization successfully facilitated long term testing of high temperature SiC electronic devices for over 10,000 hours at 500°C previously. However, the 96% Al2O3 chip-level packages of this prototype system were not fabricated via a commercial co-fire process which is more suitable for large scale commercial production. The co-fired alumina materials adopted by the packaging industry today usually contain several percent of glass constituents to provide better adhesion and sealing at interfaces formed during a co-firing process at temperatures usually lower than the regular sintering temperature for alumina. In order to answer the question if co-fired alumina substrates can provide reasonable high temperature electrical performance comparable to those of regular 96% alumina sintered at 1700°C, this paper reports on the dielectric performance of a selected high temperature co-fired ceramic (HTCC) alumina substrate and a low temperature co-fired ceramic (LTCC) alumina (polycrystalline aluminum oxides with glass constituents) substrate from room temperature to 550°C at frequencies of 120 Hz, 1 KHz, 10 KHz, 100 KHz, and 1 MHz. Parallel-plate capacitive devices with dielectrics of these co-fired alumina and precious metal electrodes were used for measurement of the dielectric properties of the co-fired alumina materials in the temperature and frequency ranges. The capacitance and AC parallel conductance of these capacitive devices were directly measured by an AC impedance meter, and the dielectric constant and parallel AC conductivity of the dielectric were calculated from the capacitance and conductance measurement results. The temperature and frequency dependent dielectric constant, AC conductivity, and dissipation factor of selected LTCC and HTCC co-fired alumina substrates are presented and compared to those of 96% alumina. Metallization schemes for co-fired alumina for high temperature applications are discussed to address packaging needs for low power 500°C SiC electronics.

scholarly journals A Novel Multi-Pattern Solder Joint Simultaneous Segmentation Algorithm for PCB Selective Packaging Systems

2019 ◽  
Vol 33 (13) ◽  
pp. 2058005
Author(s):  
Lei Huang ◽  
Shibin Shen ◽  
Fei Xie ◽  
Jing Zhao ◽  
Jianing Han ◽  
...  
Keyword(s):  
Solder Joint ◽  
Integrated Circuits ◽  
Integrated Circuit ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Extraction Methods ◽  
Segmentation Algorithm ◽  
Circuit Board ◽  
Packaging System ◽  
Low Efficiency

To prevent any negative electromagnetic influence of high-density integrated circuits, an insulation package needs to be specially designed to shield it. Aiming at the low efficiency and material waste in traditional packaging methods, a printed circuit board (PCB) selective packaging system based on a multi-pattern solder joint simultaneous segmentation algorithm and three-dimensional printing technology is introduced in this paper. Firstly, the structure of PCB selective packaging system is designed. Secondly, to solve the existing problems, such as multi-pattern solder joints which are located densely in small welding areas and are hard to be extracted in the small-area integrated circuit board, a multi-pattern solder joint simultaneous segmentation algorithm is developed based on (geometrical) neighborhood features to extract and locate the optimal PCB solder joint areas. Finally, tests using three actual PCB are carried out to compare the proposed method with traditional multi-threshold solder joint extraction methods. Test results indicate that the proposed algorithm is simple and effective. Diverse solder joints can be optimally located and simultaneously extracted from the collected PCB image, which greatly improves the filling rate of the solder joint areas and filters out false pixels. Thus, this method provides a reliable location-finding tool to help place solder points in PCB selective packaging systems.

scholarly journals Sixty Earth-Days Test of a Prototype Pt/HTCC Alumina Package in Simulated Venus Environment

2018 ◽  
Vol 2018 (HiTEC) ◽  
pp. 000015-000021
Author(s):  
Liangyu Chen ◽  
Philip G. Neudeck ◽  
Roger D. Meredith ◽  
Dorothy Lukco ◽  
David J. Spry ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Extreme Environment ◽  
Electrical Performance ◽  
Harsh Environment ◽  
Short Term ◽  
Packaging System ◽  
Three Phase ◽  
The Stability ◽  
Package Materials ◽  
Surface Environment

Abstract This paper presents experimental results of a prototype high temperature co-fired ceramic (HTCC) package with Au/Pt metallization in a three-phase harsh environment test that culminated with 60-day demonstration in simulated Venus surface environment of 465 °C with corrosive atmosphere at 90 bar pressure. The prototype package is based on previously developed and reported HTCC package successfully tested with multiple analog and digital silicon carbide (SiC) high temperatures semiconductor integrated circuits (ICs) at NASA Glenn Research Center in 500 °C Earth air ambient for over ten thousands hours, and short-term tested at temperatures above 800 °C. The three-phase harsh environment test started with 48 hours in 465 °C Earth air, followed by 48 hours in 465 °C nitrogen at 90 bar pressure and 1400 hours in simulated Venus surface environment of 465 °C with corrosive atmosphere at 90 bar. Initial analytical results of the package materials and surfaces after exposure to Venus environment are discussed to assess the stability of the packaging materials in the tested environments. The test in simulated Venus environment was implemented in the NASA Glenn Extreme Environment Rig (GEER). The results of this study suggest that an effective encapsulation of areas of surface metallization and vicinities may help to improve electrical performance of a HTCC alumina packaging system in Venus environment.

High Temperature Silicon Carbide CMOS Integrated Circuits

2011 ◽  
Vol 2011 (HITEN) ◽  
pp. 000115-000119 ◽  
Author(s):  
R.F. Thompson ◽  
D.T. Clark ◽  
A.E. Murphy ◽  
E.P Ramsay ◽  
D.A Smith ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
High Temperature ◽  
Integrated Circuits ◽  
Gate Dielectric ◽  
Wide Band ◽  
Cmos Technology ◽  
Ring Oscillators ◽  
Power Switching ◽  
Dielectric Performance ◽  
Floating Capacitor

The wide band-gap of Silicon Carbide makes it a material suitable for IC's [1] operating up to 450°C. The maximum operating temperature achieved will depend on the transistor technology selected, interconnect metallisation and device packaging. This paper describes transistor and circuit results achieved in SiC CMOS technology, where the major issue addressed is the gate dielectric performance. N and p-channel MOSFET structures have been demonstrated operating at temperatures up to 400°C Test circuits including simple logic cells, ring oscillators, operational amplifiers and gate drive circuits have been fabricated and the characteristics of ring oscillators are presented here. Floating capacitor structures have also been fabricated for use in future analogue and mixed signal circuits. This technology will be initially applied in applications including signal conditioning for sensors and control of SiC based power switching devices, where the high temperature capability will match that of the SiC power devices which are now becoming commercially available.

A 96% Alumina based Packaging System for 500°C Test of SiC Integrated Circuits

2021 ◽  
Vol 2021 (HiTEC) ◽  
pp. 000069-000075
Author(s):  
Liangyu Chen ◽  
Philip G. Neudeck ◽  
David J. Spry ◽  
Glenn M. Beheim ◽  
Gary W. Hunter
Keyword(s):  
Integrated Circuits ◽  
Printed Circuit Board ◽  
Electronic Devices ◽  
Circuit Board ◽  
Packaging System ◽  
Ceramic Substrates ◽  
Al2o3 Ceramic ◽  
Low Dielectric ◽  
Die Attach

Abstract Along with the development of silicon carbide (SiC) sensors and electronic devices for operation at 500°C, compatible packaging technologies are needed for long term high temperature test and deployment of these sensors and electronic devices. 96% Al2O3 ceramic is a good electrically insulating material with acceptable dielectric constant and low dielectric loss over wide temperature and frequency ranges. This paper presents a packaging system for low power integrated circuits including a prototype 8-I/O chip-level package and printed circuit board (PCB) based on 96% Al2O3 ceramic substrates and Au thick-film metallization for 500°C applications. The details related to designs of packages and PCBs, packaging materials, and specific packaging step recipes including wire - bonding and die-attach, are presented. Some test results of this prototype packaging approach applied to SiC integrated circuits at 500°C are reviewed.

Confirming the Signal Integrity in Transmission of Digital Signals on Microstrip Straight Circuits via the Eye Diagrams

2014 ◽  
Vol 5 (1) ◽  
pp. 737-741
Author(s):  
Alejandro Dueñas Jiménez ◽  
Francisco Jiménez Hernández
Keyword(s):  
Integrated Circuits ◽  
Printed Circuit Board ◽  
Signal Integrity ◽  
High Volume ◽  
Information Storage ◽  
Circuit Board ◽  
Electromagnetic Simulation ◽  
Electronic Systems ◽  
Digital Signals ◽  
Printed Circuit

Because of the high volume of processing, transmission, and information storage, electronic systems presently requires faster clock speeds tosynchronizethe integrated circuits. Presently the “speeds” on the connections of a printed circuit board (PCB) are in the order of the GHz. At these frequencies the behavior of the interconnects are more like that of a transmission line, and hence distortion, delay, and phase shift- effects caused by phenomena like cross talk, ringing and over shot are present and may be undesirable for the performance of a circuit or system.Some of these phrases were extracted from the chapter eight of book “2-D Electromagnetic Simulation of Passive Microstrip Circuits” from the corresponding author of this paper.

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