Power cycle reliability of SiC devices with metal-sinter die-attach and thermostable molding

2017 ◽  
Vol 2017 (1) ◽  
pp. 000008-000012 ◽  
Author(s):  
Shijo Nagao ◽  
Hirofumi Fujita ◽  
Akio Shimoyama ◽  
Shinya Seki ◽  
Hao Zhang ◽  
...  

Abstract Metal paste sintering die-attach is recently attracting much attention as an alternative to Pb containing high temperature solders, particularly required for power device packaging with post-Si wide band-gap semiconductors. For high voltage and high power devices, which are used in electric vehicles, railway trains, or power grid systems, SiC MSOFET/SBD devices are emerging replacing Si IGBT devices. These SiC devices have two prominent advantages to traditional Si based devices: fast switching and high maximum junction temperature TJ. The excellent characteristics serve for miniaturization of the device module; the former allows to use smaller capacitor and reactors because of the high frequency, and the latter excludes cooling system without affecting the device life time. However, the thermal reliability should be critically tested before used in industrial applications. We have hence conducted comprehensive reliability tests using several types of metal sintering die-attach including Ag and Cu. High temperature storage tests at 250°C certify that the device structure is truly thermostable, and thermal cycling between −50°C and 250°C indicates that the thermomechanical stress caused by device package design is the key for high reliability of power devices. Power cycling demonstrates the usefulness for effective acceleration tests to estimate the device life time. Our results conclude that present metal paste die-attach is ready for use in the product instead of high temperature solders.

2017 ◽  
Vol 2017 (HiTEN) ◽  
pp. 000193-000196
Author(s):  
Shijo Nagao ◽  
Hiroki Yoshikawa ◽  
Hirofumi Fujita ◽  
Akio Shimoyama ◽  
Shinya Seki ◽  
...  

Abstract Thermostable die-attach method alternative to soldering with Pb content is urgently required for utilizing wide-bandgap power semiconductors like SiC or GaN with a high maximum junction temperature TJ. Ag nano-or micro particle paste sintering attracts wide attention for this purpose, but Cu paste has also being developed mainly because of the cost pressure. Recently Cu sub-micron particle paste dispersed polyethylene Glycol solvent has demonstrated low temperature sintering at 250°C in N2 gas, resulting in high strength of die-attach. In the present study, the developed Cu paste die-attach has accepted to SiC Schottky barrier diode in TO-247 standard packaging with highly thermostable mold materials. The produced sample devices are subjected to high temperature storage tests at 250°C and thermal cycling tests between −50°C and 250°C. The device including the novel die-attach structure exhibited excellent thermal stability. Furthermore, power cycling tests has been conducted, and the results appear prospective for long life time and high reliability with high TJ exceeding 250°C. The presented study thus conclude that Cu submicron paste sintering is a promising candidate of power device die-attach usable for heavy industrial applications.


2015 ◽  
Vol 2015 (1) ◽  
pp. 000654-000660 ◽  
Author(s):  
Fang Yu ◽  
R. Wayne Johnson ◽  
Michael C. Hamilton

With an increasing demand for SiC and GaN high power devices that operate at high temperature, traditional solder materials are reaching their limitations in performance. In addition, there is a strong desire to eliminate high lead containing solders in Si power device packaging for use over conventional temperature range. Low temperature Ag sintering technology is a promising method for high performance lead-free die attachment. In a previous study, a pressureless sintering process and suitable metallization were demonstrated to provide high reliability die attach by using micro-size Ag sintering. The resulting die attach layer had approximately 30% porosity. In this work, a low temperature pressure-assisted fast sintering process was examined. The porosity was decreased from 30% to 15% with application of a low pressure (7.6MPa) during a one minute sintering process. The shear strength for a 3 mm × 3 mm die was 70 MPa and the 8 mm × 8 mm die could not be sheared off due to a 100 kg shear module force limit. Both the Ag and Au metallization (die and substrate) were studied. Furthermore, a new substrate metallization combination was found that allows the use of Au thick film metallized substrates. High temperature (300 °C) storage tests for up to 2000 hours aging were conducted and results are presented.


2018 ◽  
Vol 2018 (1) ◽  
pp. 000084-000087
Author(s):  
Dongjin Kim ◽  
Shijo Nagao ◽  
Naoki Wakasugi ◽  
Yasuyuki Yamamoto ◽  
Aiji Suetake ◽  
...  

Abstract Next generation power semiconductors, e.g. SiC and GaN, are emerging for the further minimization and high current/voltage of power devices with high reliability covering wider operating environments than those based on Si. To implement high reliability operation, the key technology is the control of the temperature distribution in the module, and thermal stress caused by the heat generated by power loss. In the present study, we have developed SiC micro-heater chip with temperature probe to evaluate thermal characteristics of an assembled system of Ag sinter die-attach on metalized ceramic substrate (Cu/Si3N4/Cu) during the repetitive power cycling. The test specimens were fixed on a water cooling system, and steady-state heat resistance of the system was measured during the power cycling. For comparison, Pb-Sn, Sn-Cu-Ni-P, Sn-Ag-Sb-Cu solders were used as die-attach material bonded on the same metalized ceramic substrates. The maximum applied power exceeds 200 W with cycles of 2 seconds of heating and 5 seconds of cooling, and the test cycles was over 5000 cycles. The power cycle number dependence on the temperature swing and thermal resistance characteristics would be discussed, in connected with the power cycle testing for real power devices.


2011 ◽  
Vol 324 ◽  
pp. 437-440
Author(s):  
Raed Amro

There is a demand for higher junction temperatures in power devices, but the existing packaging technology is limiting the power cycling capability if the junction temperature is increased. Limiting factors are solder interconnections and bond wires. With Replacing the chip-substrate soldering by low temperature joining technique, the power cycling capability of power modules can be increased widely. Replacing also the bond wires and using a double-sided low temperature joining technique, a further significant increase in the life-time of power devices is achieved.


2017 ◽  
Vol 2017 (HiTEN) ◽  
pp. 000099-000102
Author(s):  
Bernard Leavitt ◽  
Andy C. Mackie

Abstract The need for high-temperature solders is growing as RF and power semiconductor devices continue to get smaller, with power density increasing both as a consequence of the shrink and as a result of increased power ratings. AuSn20 eutectic solder (Indalloy®182) has been the workhorse for high-temperature, high-reliability, small die-attach applications for many years; however, as junction temperatures (Tj) increase, the gold-tin eutectic is beginning to reach its limit of utility. Higher temperatures cause increased thermal fatigue, and even delamination is seen at the solder joints. The next option for RF and power semiconductor manufacturers needing these higher temperatures is either AuGe12 (Indalloy®183) or AuSi3.2 (Indalloy®184) eutectic alloy (see Table I).Table 1.Key properties of Au-based eutectic alloys. Over the years, many customers have tried AuGe12 and the feedback has been that the alloy has poor solderability, which manifests as large voids in the bond. Voids are poor conductors of heat, which create hot spots, and are the primary cause of premature failures.


2018 ◽  
Vol 2018 (1) ◽  
pp. 000317-000325
Author(s):  
Sayan Seal ◽  
Brandon Passmore ◽  
Brice McPherson

Abstract The performance of SiC power devices has demonstrated superior characteristics as compared to conventional Silicon (Si) devices. Some of the advantages of SiC power devices over Si include higher voltage blocking capability, low specific on-resistance, high switching frequency, high temperature operation, and high power density. Thus, SiC modules are capable of processing significant levels of power within much smaller volumes compared with its Si counterparts. These high thermal loads present a formidable challenge in integrating SiC devices in power modules. For example, known-good materials and processes for silicon power modules are not rated at the aggressive operating conditions associated with SiC devices. Two of the most critical interfaces in a power electronics module are the die-attach and substrate- attach. A degradation in these interfaces often results in potentially catastrophic electrical and thermal failure. Therefore, it is very important to thoroughly evaluate die-attach materials before implementing them in SiC power modules. This paper presents the methodology for the evaluation of die attach materials for SiC power modules. Preforms of a lead-free high-temperature attach material were used to perform a die and substrate attach process on a conventional power module platform. The initial attach quality was inspected using non- destructive methods consisting of acoustic microscopy and x-ray scanning. Die attach and substrate attach voiding of < 5% was obtained indicating a very good attach quality. Cross-sectioning techniques were used to validate the inspection methods. The initial attach strength was measured using pull tests and shear tests. The measurements were repeated at the rated temperature of the module to ensure that the properties did not degrade excessively at the service temperature. At the rated module temperature of 175 °C, the die bonding strength was found to be ~ 75 kg. This was only 25% lower than the strength at room temperature. In addition, the contact pull strength was measured to be > 90 kg at 175 °C, which was 25% lower than the value measured at room temperature. The effect of power cycling and thermal cycling on the quality and strength of the die and substrate attach layers was also investigated.


2016 ◽  
Vol 13 (1) ◽  
pp. 6-16 ◽  
Author(s):  
Paul Croteau ◽  
Sayan Seal ◽  
Ryan Witherell ◽  
Michael Glover ◽  
Shashank Krishnamurthy ◽  
...  

The emergence of wide band gap devices has pushed the boundaries of power converter operations and high power density applications. It is desirable to operate a power inverter at high switching frequencies to reduce passive filter weight and at high temperature to reduce the cooling system requirement. Therefore, materials and components that are reliable at temperatures ranging from −55°C to 200°C, or higher, are needed. Sintered silver is receiving significant attention in the power electronic industry. The porous nature of sintered nanosilver paste with a reduced elastic modulus has the potential to provide strain relief between the die component and substrate while maintaining its relatively high melting point after sintering. The test results presented herein include tensile testing to rupture of sintered silver film to characterize stress-strain behavior, as well as die shear and thermal cyclic tests of sintered silver-bonded silicon die specimens to copper substrates to determine shear strength and reliability.


Crystals ◽  
2020 ◽  
Vol 10 (12) ◽  
pp. 1083
Author(s):  
F. Jose Arques-Orobon ◽  
Manuel Vazquez ◽  
Neftali Nuñez

The lifetime of ultraviolet high-power light-emitting diodes (UV HP-LEDs) is an open issue due to their high current density, high temperature, and UV radiation. This work presents a reliability study and failure analysis of three high-temperature accelerated life tests (ALTs) for 13,500 h with 3 W commercial UV LEDs of 365 nm at a nominal current in two working conditions: continuous mode and cycled mode (30 s on/30 s off). Arrhenius–Weibull parameters were evaluated, and an equation to evaluate the lifetime (B50) at any junction temperature and other relevant lifetime functions is presented. The Arrhenius activation energy was 0.13 eV for the continuous mode and 0.20 eV for the cycled mode. The lifetime at 50% survival and 30% loss of optical power as a failure definition, working at Ta = 40 °C with a multi-fin heat sink in natural convection, was over 4480 h for the continuous mode and 19,814 h for the cycled mode. The need to add forced convection for HP-LED arrays to achieve these high-reliability values is evidenced. The main source of degradation is the semiconductor device, and the second is the encapsulation silicone break.


2007 ◽  
Vol 556-557 ◽  
pp. 687-692 ◽  
Author(s):  
Anant K. Agarwal

The last three years have seen a rapid growth of 600 V and 1200 V SiC Schottky diodes primarily in the Power Factor Correction (PFC) circuits. The next logical step is introduction of a SiC MOSFET to not only further improve the power density and efficiency of the PFC circuits but also to enable the entry of all SiC power modules in Pulse Width Modulated (PWM) based power converters such as motor control in 600-1200 V range. The combination of SiC MOSFET and Schottky diodes will offer 60-80% lower losses in most low voltage applications at normal operating temperatures (< 200°C) where no significant improvements in packaging are required. This will cover most commercial applications with the exception of those having to function under extreme environment (>200°C) such as applications in automotive, aerospace and oil/gas exploration. For these high temperature applications, a case can be made for 600 - 2000 V Bipolar Junction Transistors (BJTs) and PiN diodes provided we do our homework on high temperature packaging. A number of interesting device related problems persist in bipolar devices such as forward voltage increase in PiN diodes and current gain degradation in BJTs. For very high voltage (>10 kV) applications such as those found in utilities (Transmission and Distribution), Large Drives and Traction, a case can be made for >10 kV PiN diodes, IGBTs, Thyristors and GTOs. While IGBTs will be restricted to <200°C junction temperature, the PiN diodes, Thyristors and GTOs may be operated at >250°C junction temperature provided that the high temperature, high voltage packaging issues are also addressed. Significant progress has been made in the development of the p-channel IGBTs and GTOs. The main issues seem to be the VF degradation due to stacking fault formation and improvement of minority carrier life-time.


Sign in / Sign up

Export Citation Format

Share Document