Dependence of relationship between chemical gradient and line width roughness of zirconia nanoparticle resist on pattern duty, acid generator, and developer

2019 ◽  
Vol 58 (3) ◽  
pp. 036501
Author(s):  
Takahiro Kozawa ◽  
Ayako Nakajima ◽  
Teppei Yamada ◽  
Yusa Muroya ◽  
Julius Joseph Santillan ◽  
...  
1976 ◽  
Vol 32 ◽  
pp. 49-55 ◽  
Author(s):  
F.A. Catalano ◽  
G. Strazzulla

SummaryFrom the analysis of the observational data of about 100 Ap stars, the radii have been computed under the assumption that Ap are main sequence stars. Radii range from 1.4 to 4.9 solar units. These values are all compatible with the Deutsch's period versus line-width relation.


Author(s):  
James B. Pawley

Past: In 1960 Thornley published the first description of SEM studies carried out at low beam voltage (LVSEM, 1-5 kV). The aim was to reduce charging on insulators but increased contrast and difficulties with low beam current and frozen biological specimens were also noted. These disadvantages prevented widespread use of LVSEM except by a few enthusiasts such as Boyde. An exception was its use in connection with studies in which biological specimens were dissected in the SEM as this process destroyed the conducting films and produced charging unless LVSEM was used.In the 1980’s field emission (FE) SEM’s came into more common use. The high brightness and smaller energy spread characteristic of the FE-SEM’s greatly reduced the practical resolution penalty associated with LVSEM and the number of investigators taking advantage of the technique rapidly expanded; led by those studying semiconductors. In semiconductor research, the SEM is used to measure the line-width of the deposited metal conductors and of the features of the photo-resist used to form them. In addition, the SEM is used to measure the surface potentials of operating circuits with sub-micrometer resolution and on pico-second time scales. Because high beam voltages destroy semiconductors by injecting fixed charges into silicon oxide insulators, these studies must be performed using LVSEM where the beam does not penetrate so far.


1977 ◽  
Vol 38 (C1) ◽  
pp. C1-267-C1-269 ◽  
Author(s):  
C. M. SRIVASTAVA ◽  
M. J. PATNI ◽  
N. G. NANADIKAR
Keyword(s):  

2002 ◽  
Vol 722 ◽  
Author(s):  
T. S. Sriram ◽  
B. Strauss ◽  
S. Pappas ◽  
A. Baliga ◽  
A. Jean ◽  
...  

AbstractThis paper describes the results of extensive performance and reliability characterization of a silicon-based surface micro-machined tunable optical filter. The device comprises a high-finesse Fabry-Perot etalon with one flat and one curved dielectric mirror. The curved mirror is mounted on an electrostatically actuated silicon nitride membrane tethered to the substrate using silicon nitride posts. A voltage applied to the membrane allows the device to be tuned by adjusting the length of the cavity. The device is coupled optically to an input and an output single mode fiber inside a hermetic package. Extensive performance characterization (over operating temperature range) was performed on the packaged device. Parameters characterized included tuning characteristics, insertion loss, filter line-width and side mode suppression ratio. Reliability testing was performed by subjecting the MEMS structure to a very large number of actuations at an elevated temperature both inside the package and on a test board. The MEMS structure was found to be extremely robust, running trillions of actuations without failures. Package level reliability testing conforming to Telcordia standards indicated that key device parameters including insertion loss, filter line-width and tuning characteristics did not change measurably over the duration of the test.


2003 ◽  
Vol 766 ◽  
Author(s):  
J. Gambino ◽  
T. Stamper ◽  
H. Trombley ◽  
S. Luce ◽  
F. Allen ◽  
...  

AbstractA trench-first dual damascene process has been developed for fat wires (1.26 μm pitch, 1.1 μm thickness) in a 0.18 μm CMOS process with copper/fluorosilicate glass (FSG) interconnect technology. The process window for the patterning of vias in such deep trenches depends on the trench depth and on the line width of the trench, with the worse case being an intermediate line width (lines that are 3X the via diameter). Compared to a single damascene process, the dual damascene process has comparable yield and reliability, with lower via resistance and lower cost.


2003 ◽  
Vol 766 ◽  
Author(s):  
Vineet Sharma ◽  
Arief B. Suriadi ◽  
Frank Berauer ◽  
Laurie S. Mittelstadt

AbstractNormal photolithography tools have focal depth limitations and are unable to meet the expectations of high resolution photolithography on highly topographic structures. This paper shows a cost effective and promising technique of combining two different approaches to achieve critical dimensions of traces on slope pattern continuity on highly topographic structures. Electrophoretically deposited photoresist is used on 3-D structured wafers. This photoresist coating technique is fairly known in the MEMS industries to achieve uniform and conformal photoresist films on 3D surfaces. Multi step exposures are used to expose electrophoretically deposited photoresist. AlCu (Cu-0.5%), 0.47-0.53 μm thick metal film is deposited on 3D structured silicon substrate to plate photoresist. By combining these two novel methods, metal (AlCu) traces of 75 μm line width and 150 μm pitch (from top flat to down the slope) have been demonstrated on isotropically etched 350 μm deep trenches with 5-10% line width loss.


Author(s):  
Chunyu Zhang ◽  
Lakshmi Vedula ◽  
Shekhar Khandekar

Abstract Latch-up induced during High Temperature Operating Life (HTOL) test of a mixed signal device fabricated with 1.0 μm CMOS, double poly, double metal process caused failures due to an open in aluminum metal line. Metal lines revealed wedge voids of about 50% of the line width. Triggering of latch up mechanism during the HTOL test resulted in a several fold increase of current flowing through the ground metal line. This increase in current resulted in the growth of the wedge voids leading to failures due to open metal lines.


2020 ◽  
Vol 12 ◽  
Author(s):  
Pampa Debnath ◽  
Ujjwal Mondal ◽  
Arpan Deyasi

Aim:: Computation of loss factors for one-bit RF MEMS switch over Ku, K and Ka-band for two different insulating substrates. Objective:: Numerical investigation of return loss, insertion loss, isolation loss are computed under both actuated and unactuated states for two different insulating substrates of the 1-bit RF MEMS switch, and corresponding up and down-capacitances are obtained. Methods:: The unique characteristics of a 1-bit RF MEMS switch of providing higher return loss under both actuated and unactuated states and also of isolation loss with negligible insertion loss makes it as a prime candidate for phase shifter application. This is presented in this manuscript with a keen focus on improvement capability by changing transmission line width, and also of overlap area; where dielectric constant of the substrate also plays a vital role. Results:: The present work exhibits very low down-capacitance over the spectrum whereas considerable amount of up-capacitance. Also when overall performance in terms of all loss parameters are considered, switch provides very low insertion loss, good return loss under actuated state and standard isolation loss. Conclusion:: Reduction of transmission line width of about 33% improved the performance of the switch by increasing isolation loss. Isolation loss of -40 dB is obtained at actuated condition in higher microwave spectra for SiO 2 at higher overlap area. Down capacitance of ~ 1dB is obtained which is novel as compared with other published literature. Moreover, a better combination of both return loss, isolation loss and insertion loss are reported in this present work compared with all other published data so far.


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