Structure of the Si-GaAs Interface: Polar on Nonpolar Epitaxy

1985 ◽  
Vol 43 ◽  
pp. 366-367
Author(s):  
J.H. Mazur ◽  
J. Washburn ◽  
T. Henderson ◽  
J. Klem ◽  
W.T. Masselink ◽  
...  
Keyword(s):  
Cross Sections ◽  
Low Cost ◽  
Electronic Devices ◽  
Compound Semiconductors ◽  
View Point ◽  
Si Substrate ◽  
Antiphase Boundaries ◽  
Cross Sectional ◽  
Mbe Growth ◽  
Si Substrates

Possibility of growth of epitaxial lll-V (GaAs, InP, GaP, etc.) compound semiconductors on nonpolar substrates (Ge,Si) is of considerable interest from the view point of monolithic integration of lll-V optoelectronic and Si electronic devices. The growth of GaAs and AIGaAs layers on Si substrates is additionally attractive because of good mechanical strength and low cost of Si substrates. However, a principal difficulty in growing polar semiconductors on nonpolar substrates is that there are no preferential bonding sites for cations and anions in the first layer of growth, which can result in antiphase boundaries (APB’s) in addition to defects due to misfit (∼4% for GaAs on Si).In this work GaAs layers were grown on (100) Si substrates using procedures described elsewhere. The MBE growth started from a first deposition of As as a prelayer on the Si substrate followed by GaAs growth at 580°C. Cross-sectional TEM specimens were prepared using the same procedures as reported earlier for the case of Si-SiO2 cross-sections.

Growth and processing of heteroepitaxial 3C-SiC films for electronic devices applications

2012 ◽  
Vol 1433 ◽  
Author(s):  
A. Severino ◽  
M. Mauceri ◽  
R. Anzalone ◽  
A. Canino ◽  
N. Piluso ◽  
...  
Keyword(s):  
Growth Parameters ◽  
Low Cost ◽  
Electronic Devices ◽  
Young Modulus ◽  
Interesting Property ◽  
Large Area ◽  
Si Substrates ◽  
Application Fields ◽  
Sic Films

ABSTRACT3C-SiC is very attractive due the chance to be grown on large-area, low-cost Si substrates. Moreover, 3C-SiC has higher channel electron mobility with respect to 4H-SiC, interesting property in MOSFET applications. Other application fields where 3C-SiC can play a significant role are solar cells and MEMS-based sensors. In this work, we present a general overview of 3C-SiC growth on Si substrate. The influence of growth parameters, such as the growth rate, on the crystal quality of 3C-SiC films is discussed. The main issue for 3C-SiC development is the reduction of the stacking fault density, which shows an exponential decreasing trend with the film thickness tending to a saturation value of about 1000 cm-1. Some aspect of processing will be also faced with the realization of cantilever for Young modulus calculations and the implantation of Al ions for the study of damaging and recovery of the 3C-SiC crystal.

Experimental investigation on the thermal performance of Si micro-heat pipe with different cross-sections

2017 ◽  
Vol 31 (30) ◽  
pp. 1750279 ◽  
Author(s):  
Mohammad Hamidnia ◽  
Yi Luo ◽  
Xiaodong Wang ◽  
Congming Li
Keyword(s):  
Thermal Management ◽  
Thermal Performance ◽  
Cross Sections ◽  
Integrated Circuit ◽  
Thermal Characteristics ◽  
Cost Savings ◽  
Working Fluid ◽  
Cross Sectional ◽  
Si Substrates ◽  
Silicon Based

Increasing component densities of the integrated circuit (IC) and packaging levels has led to thermal management problems. Si substrates with embedded micro-heat pipes (MHPs) couple good thermal characteristics and cost savings associated with IC batch processing. The thermal performance of MHP is intimately related to the cross-sectional geometry. Different cross-sections are designed in order to enhance the backflow of working fluid. In this experimental study, three different Si MHPs with same hydraulic diameter and various cross-sections are fabricated by micro-fabrication methods and tested under different conditions of fluid charge ratios. The results show that the trapezoidal MHP associated with rectangular artery which is charged with 40% of vapor chamber’s volume has the best thermal performance. This silicon-based MHP is a passive approach for thermal management, which could widen applications in the commercial electronics industry and LED lightings.

High Breakdown Voltage GaN Power HEMT on Si Substrate

2013 ◽  
Vol 805-806 ◽  
pp. 948-953
Author(s):  
Cen Kong ◽  
Jian Jun Zhou ◽  
Jin Yu Ni ◽  
Yue Chan Kong ◽  
Tang Sheng Chen
Keyword(s):  
Breakdown Voltage ◽  
Low Cost ◽  
Electronic Devices ◽  
Power Electronic ◽  
Si Substrate ◽  
Field Plate ◽  
Maximum Current Density ◽  
Gan Hemt ◽  
Maximum Current ◽  
State Resistance

GaN high electronic mobility transistor (HEMT) was fabricated on silicon substrate. A breakdown voltage of 800V was obtained without using field plate technology. The fabrication processes were compatible with the conventional GaN HEMTs fabrication processes. The length between drain and gate (Lgd) has a greater impact on breakdown voltage of the device. A breakdown voltage of 800V with maximum current density of 536 mA/mm was obtained while Lgd was 15μm and the Wg was 100μm. The specific on-state resistance of this devices was 1.75 mΩ·cm2, which was 85 times lower than that of silicon MOSFET with same breakdown voltage. The results establish the foundation of low cost GaN HEMT power electronic devices.

Epitaxial growth and characterization of BP on Si(100) substrate for use in c-GaN study

2005 ◽  
Vol 891 ◽  
Author(s):  
Tomohiko Takeuchi ◽  
Suzuka Nishimura ◽  
Tomoyuki Sakuma ◽  
Satoru Matumoto ◽  
Kazutaka Terashima
Keyword(s):  
Epitaxial Layer ◽  
Careful Analysis ◽  
X Ray Diffraction ◽  
Si Substrate ◽  
Cross Sectional ◽  
X Ray ◽  
Si Substrates ◽  
Impurity Doping ◽  
Hall Effect Measurements

ABSTRACTBoronmonophosphide(BP) is one of the suitable materials for a buffer layer between the c-GaN(100) and Si(100) substrates. The growth of BP layer was carried out by MOCVD on Si(100) substrate of 2 inch in diameter. The growth rate was over 2 μm/h without any troubles such as the bowing or cracking. In addition, the thickness of BP epitaxial layer was uniform over a wide area. A careful analysis of x-ray diffraction suggested that the growth of BP epitaxial layer inherited the crystal orientation from Si(100) substrate. Cross-sectional TEM images showed some defects like dislocations near the interface between BP layer and Si substrate. The Hall effect measurements indicated that the conduction type of BP films grown on the both n-Si and p-Si substrates was n-type without impurity doping, and that the mobility and carrier concentrations were typically 357cm2/Vs and 1.5×1020cm−3(on n-Si) and 63cm2/Vs and 1.9×1019cm−3(on p-Si), respectively. In addition, c-GaN was grown on the substrate of BP/Si(100) by RF-MBE.

MBE Growth of Epitaxial Calcium Fluoride on Silicon

1985 ◽  
Vol 54 ◽  
Author(s):  
L. J. Schowalter ◽  
R. W. Fathauer
Keyword(s):  
Epitaxial Growth ◽  
Detrimental Effect ◽  
Lattice Structure ◽  
Substrate Surface ◽  
Breakdown Field ◽  
Si Substrate ◽  
Semiconductor Interface ◽  
Mbe Growth ◽  
Si Substrates ◽  
Breakdown Field Strength

ABSTRACTThe growth of an epitaxial insulator such as CaF2. on Si substrates and ita subsequent overgrowth with epitaxial sen iconduct ors have a number of important applications in the electronics industry. In addition, it presents a unique opportunity to study an insulator/semiconductor interface under controlled conditions. We have studied the growth of epitaxial CaF. on Si substrates and their subsequent overgrowth with Si or Ge under various conditions. While epitaxial growth of CaF2, (which has an fee lattice structure as does Si) can be obtained on (100), (110) and (111) oriented Si substrates, the best quality crystal growth and surface morphology is obtained on (111) substrates as the CaF. (111) surface has the lowest free energy. Atomic steps on the original Si substrate surface are shown to have a detrimental effect on the epitaxial growth of CaF2. I-V measurements on the epitaxial (111) films show that the intrinsic breakdown field strength exceeds 2 MV/cm, however, high-field induced ionization can cause thermal breakdown at lower voltages. C-V measurements typically show ∼1012 states/cm in the Si band gap as grown. However, it is possible to reduce this number to less than 10 by annealing procedures after growth.

MBE Growth of GaAs on Si (100)

1987 ◽  
Vol 91 ◽  
Author(s):  
J. S. Ahearn ◽  
P. Uppal
Keyword(s):  
Secondary Ion Mass Spectrometry ◽  
Tem Analysis ◽  
Cross Sectional ◽  
Mbe Growth ◽  
Si Substrates ◽  
Gaas On Si ◽  
Linear Defects ◽  
Transmission Electron ◽  
Dislocation Densities ◽  
Dislocation Annihilation

ABSTRACTMolecular beam epitaxy (MBE) growth of GaAs on Si was investigated for three Si substrate orientations: exact (100), 4° off (100) towards (011), and 4° off towards (010). Cross-sectional transmission electron microscopy (X-TEM) analysis indicated a high dislocation density at the GaAs-Si interface that decreased away from the interface. Changing the orientation significantly affected the dislocation arrangement in the films.In the exact (100) case, dislocations from different glide systems formed pyramids, and dislocation annihilation resulted in linear defects propagating to the bottom of pits on the GaAs surface. On Si substrates oriented 4° off of (100), dislocation pyramids were not observed which we attribute to the different stresses acting on different glide systems. Planar TEM sections indicated that the dislocation densities at th surfaces of the 2-μm-thick films were 8 × 108 /cm2 for exact (100), 3.4 × 108/cm2 for 4° off (100) towards (010), and 1.6 × 108/cm2 for 4° off towards (011) orientations. When etching was used to evaluate anti-phase domain (APD) density, the exact (100) and off (100) orientations toward (010) showed APD's in some areas; off (100) toward (011) orientations were apparently APD-free. Results of photoluminescence (PL) spectroscopy of each of the wafers showed marked differences in peak intensities for the different orientations. Secondary ion mass spectrometry (SIMS) showed that roughly 1/4 of a monolayer of Si was incorporated in the GaAs, mostly concentrated in the first 250 nm near the GaAs-Si interface.

CHANNELING ANALYSIS OF Ge EPITAXIAL LAYER ON Si SUBSTRATE AND DOPED Ga ATOMS BY USING RBS AND PIXE METHODS

1992 ◽  
Vol 02 (02) ◽  
pp. 137-149
Author(s):  
KOKI TANAKA ◽  
EIICHI YAGI ◽  
KAZUTO KAWAKAMI ◽  
AKIHIRO ONO
Keyword(s):  
Growth Temperature ◽  
Layer Growth ◽  
Intermediate Annealing ◽  
Si Substrate ◽  
Cross Sectional ◽  
Lattice Disorder ◽  
Si Substrates ◽  
Step Procedure ◽  
20 Nm

On the crystalline quality of Ge layers heteroepitaxially grown on Si substrates by the MBE two-step procedure without the intermediate annealing process, the effect of growth temperature and thickness of the first layer was investigated between 135 and 600 °C, and for 20 and 200 nm, respectively, by means of RBS-channeling and cross-sectional TEM methods. The second layer growth temperature was fixed at 600 °C. It was found that, in reducing the total amount of lattice disorder, the two-step procedure has an advantage over the direct deposition, and 200 nm is more favorable than 20 nm as the first layer thickness. The Ge layer of the best quality was obtained when the first layer of 200nm was grown at 400–500 °C, and subsequently the second layer was grown at 600 °C. The PIXE-channeling method was effectively applied to locate Ga atoms doped in the Ge layer grown by the two-step procedure at 300 and 550 °C. Approximately 40% of Ga atoms were located at substitutional sites and the rest at random sites, probably in the form of precipitates.

scholarly journals Design and Fabrication of Nanoscale IDTs Using Electron Beam Technology for High-Frequency SAW Devices

2014 ◽  
Vol 2014 ◽  
pp. 1-10 ◽  
Author(s):  
Wei-Che Shih ◽  
Ying-Chung Chen ◽  
Wei-Tsai Chang ◽  
Chien-Chuan Cheng ◽  
Pei-Chun Liao ◽  
...  
Keyword(s):  
Thin Films ◽  
Electron Beam ◽  
High Frequency ◽  
Low Cost ◽  
Rf Magnetron Sputtering ◽  
Mobile Telecommunications ◽  
Cross Sectional ◽  
Si Substrates ◽  
Saw Devices ◽  
Rayleigh Mode

High-frequency Rayleigh-mode surface acoustic wave (SAW) devices were fabricated for 4G mobile telecommunications. The RF magnetron sputtering method was adopted to grow piezoelectric aluminum nitride (AlN) thin films on the Si3N4/Si substrates. The influence of sputtering parameters on the crystalline characteristics of AlN thin films was investigated. The interdigital transducer electrodes (IDTs) of aluminum (Al) were then fabricated onto the AlN surfaces by using the electron beam (e-beam) direct write lithography method to form the Al/AlN/Si3N4/Si structured SAW devices. The Al electrodes were adopted owing to its low resistivity, low cost, and low density of the material. For 4G applications in mobile telecommunications, the line widths of 937 nm, 750 nm, 562 nm, and 375 nm of IDTs were designed. Preferred orientation and crystalline properties of AlN thin films were determined by X-ray diffraction using a Siemens XRD-8 with CuKαradiation. Additionally, the cross-sectional images of AlN thin films were obtained by scanning electron microscope. Finally, the frequency responses of high-frequency SAW devices were measured using the E5071C network analyzer. The center frequencies of the high-frequency Rayleigh-mode SAW devices of 1.36 GHz, 1.81 GHz, 2.37 GHz, and 3.74 GHz are obtained. This study demonstrates that the proposed processing method significantly contributes to high-frequency SAW devices for wireless communications.

Horizontal Defects Parallel to the Interface in GaN Pyramids

1999 ◽  
Vol 5 (S2) ◽  
pp. 734-735
Author(s):  
Zhigang Mao ◽  
Stuart McKernan ◽  
C. Barry Carte ◽  
Wei Yang ◽  
Scott A. McPherson
Keyword(s):  
Defect Density ◽  
Low Cost ◽  
Substrate Surface ◽  
Optoelectronic Devices ◽  
Limited Information ◽  
Si Substrate ◽  
Si Substrates ◽  
Lateral Overgrowth ◽  
Large Size ◽  
Window Area

The performance of III-V nitride-based microelectronic and optoelectronic devices relates directly to the micro structure of these materials. Selective lateral overgrowth has been exploited to produce GaN heteroepitaxial films with low defect density [1]. Si is a promising substrate due to its low cost, large size, and the potential for the intergration of GaN-based optoelectronic devices with Si-based electronics. It is also possible to produce high-quality GaN material for devices using lateral overgrowth on a Si substrate [2]. At present, only limited information on the defect structure in GaN heteroepitaxial films grown by selective lateral growth is available, especially those grown on Si substrate. Recent work [3] on GaN pyramids grown on (111) Si substrates by this method has shown that in the center, or core, of the GaN pyramid (at and above the window area) dislocations thread through the pyramid nearly perpendicular to the substrate surface and the dislocation density is quite high.

scholarly journals Rapid Melt Growth of Single Crystal InGaAs on Si Substrates

2016 ◽  
Vol 2016 ◽  
pp. 1-5 ◽  
Author(s):  
Xue Bai ◽  
Chien-Yu Chen ◽  
Niloy Mukherjee ◽  
Peter B. Griffin ◽  
James D. Plummer
Keyword(s):  
Single Crystal ◽  
Ternary Compound ◽  
Elevated Temperatures ◽  
Low Cost ◽  
Electronic Devices ◽  
Seed Region ◽  
Melt Growth ◽  
Si Substrates ◽  
Compound Material ◽  
Compound Materials

InGaAs integration on Si substrates is an important topic for next generation electronic devices. Rapid melt growth (RMG) has the potential to grow defect-free lattice mismatched materials on Si at low cost. Most previous publications have focused on growing binary III–V compounds by RMG, but none have discussed ternary compound materials. In this paper, we demonstrate the RMG of the single crystal ternary compound InGaAs on Si substrates. We discuss two main issues. The first is segregation along the stripe length. An analytical model is developed to describe the segregation of In/Ga in the grown stripe and the model is compared with experimental data. The second issue is the dissolution of the Si seed region during RMG, which leads to formation of Si islands inside the InGaAs stripe. The results of this study are applicable to any compound material in which Si is soluble at the elevated temperatures required for RMG.

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