scholarly journals Design of bootstrap integrated synchronous rectifier

2018 ◽  
Vol 232 ◽  
pp. 04056
Author(s):  
Shulin LIU ◽  
Jinjun PEI ◽  
Ning DUAN ◽  
Shaoxiong ZHANG ◽  
Rui LIAN

Based on the research of the development of synchronous rectification technology, this paper proposes a circuit structure of bootstrap synchronous rectifier chip. Firstly, through the research of synchronous rectification technology, the architecture of synchronous rectification chip is determined. After the system design is completed, the internal units of the chip are designed in blocks under the 0.35 μm BCD process, and the specific circuit design is completed. Each unit has been verified by HSPICE simulation and has reached the specified index. The system constructed by this has also been verified by simulation, and the simulation results are consistent with the expected results, indicating that the main design functions of the circuit have been realized.

2013 ◽  
Vol 347-350 ◽  
pp. 1323-1327
Author(s):  
Xiao Hui Hu ◽  
Guo Qiang Hang ◽  
Yang Yang ◽  
Xiao Hu You

The dynamic circuit technology can decrease the whole power consumption, and the Floating-gate technology can simplify the circuit structure, which will also decrease the area and power consumption of IC. Taking the advantages of both ,we propose a new dynamic binary circuit based on floating-gate technology. The HSPICE simulation results using TSMC 0.35μm double-polysilicon CMOS technology validate the correctness of the proposed approach, and the proposed circuits also have considerable simpler structures.


Electronics ◽  
2021 ◽  
Vol 10 (6) ◽  
pp. 720
Author(s):  
Lisong Xu ◽  
Hongwen Li ◽  
Pengzhi Li ◽  
Chuan Ge

This study proposes a new method to design an analog circuit based on the control model of the circuit, and the method is applied in the design of the power amplifiers for driving piezoelectric stack actuators. Focusing on the stability of the circuit, two power amplifiers for driving piezoelectric stack actuators are analyzed deeply. The power amplifier using high-voltage operational amplifiers has a simple circuit structure, and the bandwidth and the ripple of the power amplifier are about 43 kHz and 16 mV, respectively. As for the power amplifier using general operational amplifiers, it possesses the qualities of low cost and simple circuit structure, and the bandwidth and the ripple are 53 kHz and less than 2 mV, respectively. Moreover, the proposed power amplifiers can well drive the mechanism stage during the moving range of the piezoelectric stack actuator, and the travelling ranges are both about 13 μm. Viewing the circuit design as control system design, applying control system design method in circuit design and working with PSpice simulation of the circuit: these are the main contents of the proposed method, and the method offers an answer to designing a power amplifier systematically.


2002 ◽  
Vol 11 (01) ◽  
pp. 51-55
Author(s):  
ROBERT C. CHANG ◽  
L.-C. HSU ◽  
M.-C. SUN

A novel low-power and high-speed D flip-flop is presented in this letter. The flip-flop consists of a single low-power latch, which is controlled by a positive narrow pulse. Hence, fewer transistors are used and lower power consumption is achieved. HSPICE simulation results show that power dissipation of the proposed D flip-flop has been reduced up to 76%. The operating frequency of the flip-flop is also greatly increased.


Minerals ◽  
2021 ◽  
Vol 11 (5) ◽  
pp. 459
Author(s):  
Seyed Hassan Amini ◽  
Aaron Noble

The design of cell-based flotation circuits is often completed in two distinct phases, namely circuit structure identification and equipment sizing selection. While recent literature studies have begun to address the implications of stochastic analysis, industrial practice in flotation circuit design still strongly favors the use of deterministic metallurgical modeling approaches. Due to the complexity of the available mathematical models, most flotation circuit design techniques are constructed based on deterministic models. Neglecting the impact of various sources of uncertainty may result in the identification of circuit solutions that are only optimal in a narrow region of specific operating scenarios. One promising strategy to address this shortcoming is through the Sample Average Approximation (SAA) methodology, a stochastic approach to handling uncertainty that has been widely applied in other disciplines such as supply chain and facility location management problems. In this study, a techno-economic optimization algorithm was formulated to select the optimal size and number of flotation cells for a fixed circuit structure while considering potential uncertainty in several input parameter including feed grade, kinetic coefficients, and metal price. Initially, a sensitivity analysis was conducted to screen the uncertain parameters. After simplifying the optimization problem, the SAA approach was implemented to determine the equipment configuration (i.e., cell size and number) that maximizes the plant’s net present value while considering the range of potential input values due to parameter uncertainty. The SAA methodology was found to be useful in analyzing uncertainty in flotation kinetics; however, the approach did not provide a useful means to assess the influence of uncertainties in ore grade and metal price, as these values are not significant in determining equipment size but rather influence the optimal circuit structure, which was not considered in this study. Results from an application example indicate that the SAA approach produces optimal solutions not initially identified in a deterministic optimization, and these SAA solutions tend to provide greater robustness to uncertainty and variation in the flotation kinetics.


2021 ◽  
Vol 20 ◽  
pp. 133-139
Author(s):  
Alexander Zemliak

The different design trajectories have been analyzed in the design space on the basis of the new system design methodology. Optimal position of the design algorithm start point was analyzed to minimize the CPU time. The initial point selection has been done on the basis of the before discovered acceleration effect of the system design process. The geometrical dividing surface was defined and analyzed to obtain the optimal position of the algorithm start point. The numerical results of the design of passive and active nonlinear electronic circuits confirm the possibility of the optimal selection of the starting point of the design algorithm.


2021 ◽  
Vol 71 (1) ◽  
pp. 124-133
Author(s):  
B. K. Tiwari ◽  
R. Sharma

This paper presents the design and analysis of the ‘Variable Buoyancy System (VBS)’ for depth control which is an essential operation for all underwater vehicles. We use the ‘Water Hydraulic Variable Buoyancy System (WHVBS)’ method to control the buoyancy and discuss details of the system design architecture of various components of VBS. The buoyancy capacity of the developed VBS is five kilograms and the performance of the VBS in standalone mode is analysed using numerical simulation. Presented VBS is operable to control the buoyancy up to sixty meters of depth and it can be directly installed to medium size UVs. Simulation results show that the developed VBS can reduce the energy consumption significantly and higher in each cycle (i.e. descending and ascending) of the same VBS in standalone mode being operated with either propeller or thruster for sixty meters depth of operation. Our results conclude and demonstrate that the designed VBS is effective in changing the buoyancy and controlling the heave velocity efficiently and this serves the purpose of higher endurance and better performances desired in rescue/attack operations related to the UVs both in civilian and defense domains.


2020 ◽  
Vol 11 (1) ◽  
pp. 36-44
Author(s):  
Pankaj P. Prajapati ◽  
Mihir V. Shah

The circuit design of the CMOS based analog part of a mixed-signal integrated circuit (IC) needs a large fraction of the overall design cycle time. The automatic design of an analog circuit is inevitable, seeing recently development of System-on-Chip (SOC) design. This brings about the need to develop computer aided design (CAD) tools for automatic design of CMOS based analog circuits. In this article, a Cuckoo Search (CS) algorithm is presented for automatic design of a CMOS Miller Operational Transconductance Amplifier (OTA). The source code of the CS algorithm is developed using the C language. The Ngspice circuit simulator has been used as a fitness function creator and evaluator. A script file is written to provide an interface between the CS algorithm and the Ngspice simulator. BSIM3v3 MOSFET models with 0.18 µm and 0.35 µm CMOS technology have been used to simulate this circuit. The simulation results of this work are presented and compared with previous works reported in the literature. The experimental simulation results obtained by the CS algorithm satisfy all desired specifications for this circuit.


Complexity ◽  
2017 ◽  
Vol 2017 ◽  
pp. 1-10 ◽  
Author(s):  
Abir Lassoued ◽  
Olfa Boubaker

A novel hyperchaotic system with fractional-order (FO) terms is designed. Its highly complex dynamics are investigated in terms of equilibrium points, Lyapunov spectrum, and attractor forms. It will be shown that the proposed system exhibits larger Lyapunov exponents than related hyperchaotic systems. Finally, to enhance its potential application, a related circuit is designed by using the MultiSIM Software. Simulation results verify the effectiveness of the suggested circuit.


2013 ◽  
Vol 791-793 ◽  
pp. 658-662
Author(s):  
Chao Zhang ◽  
Yi Nan Liu ◽  
Jian Hui Xu

In order to realize accurate flight control system design and simulation, an integrated scheme of aircraft model which consists of flight dynamics, fly-by-wire (FBW) platform and flight environment is proposed. Flight environment includes gravity, wind, and atmosphere. And the actuator and sensors such as gyroscope and accelerometer models are considered in the FBW platform. All parts of the integrated model are closely connected and interacted with each other. Simulation results confirm the effectiveness of the integrated aircraft model and also indicate that the (Flight Control Law) FCL must be designed with robustness to sensor noise and time delays with the FBW platform in addition to the required robustness to model uncertainty in flight dynamics.


2011 ◽  
Vol 55-57 ◽  
pp. 648-653
Author(s):  
Lian Qing Fu ◽  
Li Sheng Yang ◽  
Tao Wang ◽  
Qing Le Zhang

In this paper, a novel netted radar system is designed to reduce the influence of mutual interference between signals. The emission signals of all stations are assigned the orthogonal PN codes. Because of the good autocorrelation and cross-correlation properties, mutual interference becomes weaker and signals from different stations could be separated by the preassigned PN codes. At the same time, the spectrum of the emission signal is spreaded, the peak-to-mean envelope power ratio (PMEPR) and the intercepted probability of the signals descend therefore. Simulation results show the good performance of the proposed approach.


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