Development of a high reliability and large volume manufacturing assembly process for a stacked memory package

Author(s):  
R.S. Priore ◽  
A. Burton
Author(s):  
Ramesh Varma ◽  
Richard Brooks ◽  
Ronald Twist ◽  
James Arnold ◽  
Cleston Messick

Abstract In a prequalification effort to evaluate the assembly process for the industrial grade high pin count devices for use in a high reliability application, one device exhibited characteristics that, without corrective actions and/or extensive screening, may lead to intermittent system failures and unacceptable reliability. Five methodologies confirmed this conclusion: (1) low post-decapsulation wire pull results; (2) bond shape analysis showed process variation; (3) Failure Analysis (FA) using state of the art equipment determined the root causes and verified the low wire pull results; (4) temperature cycling parts while monitoring, showed intermittent failures, and (5) parts tested from other vendors using the same techniques passed all limits.


1981 ◽  
Vol 8 (1-2) ◽  
pp. 103-109 ◽  
Author(s):  
N. Miura ◽  
Y. Fuura ◽  
K. Uchida

The Substrate Carrier System (S. C. System) is a new manufacturing technique for small size hybrid IC with IMST (Insulated Metal Substrate Technology)substrate which is used for power hybrid IC (STK series). The point of this system is to treat both substrate process and assembly process in the manufacturing process of hybrid IC, with several IC substrates at the same time. In the printing process, multi-IC pattern are made on a large IMST substrate at the same time and the substrate after completion of printing process are slit-punched to have the frame configuration where individual IC substrates are conected by tie-bar. Moreover in the assembly process which involves die-bonding and wire-bonding, the substrate is carried by the pitch of IC substrate, utilizing the frame construction, which can provide the automatic processes.This Substrate Carrier System is applied to many kinds of hybrid IC for low-frequency applications as a system of high reliability and productivity.


2015 ◽  
Vol 2015 (DPC) ◽  
pp. 001429-001444
Author(s):  
Thomas Wang ◽  
James Lin ◽  
Tony Cheng ◽  
Ping-Chi Hong ◽  
Albert Lin ◽  
...  

This paper describes a package design and associated manufacturing assembly process that stack a module on top of another module using a frame board. The module on the top could be in molded or open frame form. In addition, this manufacturing process is compatible with the conformal shielding process important in RF applications. The complete module-on-module can be coated seamlessly and connected to the ground planes of the two substrates. The module may be a part of product line that requires more functionality over the same foot print. There is the need to houses more components than its predecessor. Such example includes the standard memory package-on-package. However, if the module on top is not of commodity type, or when the volume is not big enough to develop a standard package, this module-on-module architecture and process could be a good solution. Alternatively, one could fix the design of bottom module , and design multiple choices of the top module. When stacked together, the two modules form various different configurations in order to serve different functionalities. The structure of the module on module is shown in figure 1 below: Figure 1 Structure of the Module on Module On the frame board, there are vertical via where vertical electrical and power connection can be made. The frame board is mounted on the main board-II by surface mount process with underfill option. In the figure, a molded module on the top is shown, and an overall coating is applied to the whole module-on-module. Figure 2 Manufacturing Process of the Module-on-module The assembly process of the module-on-module is shown in Figure 2. First, the bottom module is manufactured by a one side SMT process and sawed, with the frame board soldered and underfilled. Then, the top module is SMT and molded in a panel form on the one side, and the bottom module is SMT and underfilled on the other side. Last, the complete module is sawed and conformal shielded by the sputtering process. The design of the ground plans of the substrates, together with that of the frame board, makes it such that the coating is connected to the ground planes of the boards. It is important to study the warpage of such a module-on-module to make sure that it meets the JDEC standards. It is important to assure that the signal integrity of the electrical connections, including RF connections, inside of the frame board meets the requirement. Both simulation and measurement are made to test vehicles of the module-on-module. It is found that the simulation matches the measurement nicely. This module structure can be used for a variety of applications.


2021 ◽  
Vol 49 (4) ◽  
pp. 859-866
Author(s):  
Ana Colim ◽  
Rita Morgado ◽  
José Dinis-Carvalho ◽  
Nuno Sousa

Industry 4.0 has led to a widespread and impactful evolution of technology that is transforming industry and organizations in general. Collaborative robotics is considered one of the new features in this movement allowing humans and robots to work together in perfect collaboration. This paper presents the implementation of one collaborative robot in an assembly process and analyses its impact on performance and ergonomic work conditions. In terms of ergonomic conditions, the musculoskeletal risk was assessed, comparing both processes (without and with robotics support). The results demonstrated that collaborative robotics is a solution that allows improving the ergonomic work conditions throughout the assembly process.


2016 ◽  
Vol 2016 (DPC) ◽  
pp. 001192-001221
Author(s):  
Edgardo Anzures ◽  
Paul Morganelli ◽  
Paul Morganelli ◽  
Robert Barr ◽  
Jeffrey Calvert ◽  
...  

As packaging technology continues to advance to smaller form factors, 3D chip stacking will become more of a requirement than an option and Non-Conductive Film (NCF) underfills will play a critical role in the assembly process. Capillary Underfills (CUF) have long been the standard method of protecting interconnected solder bumps from stress, moisture and contaminants. They are, however, becoming more problematic with the steady growth of fine pitch copper pillar interconnections. With CUF, there are difficulties related to cleaning flux residues. Handling thin die (<100 μm) before bonding has become increasingly difficult and CUF does not offer support because it is applied after the bonding is completed. There are also bleed issues associated with CUF resins that limit the die spacings that are possible with new designs. NCF underfills, applied as a film laminated to a wafer, offer significant advantages over CUF and other underfill technologies for fine pitch designs. Because NCF is applied via a lamination process to wafers prior to dicing, handling and dispensing of resins is eliminated from the assembly process. Additionally, the lamination of film materials allows for a precise, uniform placement of underfill. Since NCF is applied at the beginning of the assembly process, it is able to support thinned die after backgrinding. NCF's can be self-fluxing and the removal of flux residues is not necessary. Material flow can be precisely controlled during the lamination and bonding steps, thus allowing for tighter keep out zones and closer die spacings. There have been major advances in the development and mechanistic understanding of NCF technology over the past few years. A great deal of work was done in the first stages of the development which demonstrated the potential to achieve good interconnection and high reliability with low voiding on small test vehicles with larger pitch. The NCF approach has now evolved to multiple materials developed to accommodate varying design parameters. This paper will present the development and test results of initial NCF technology applied to a base test vehicle with 1,000 I/O copper pillars and the evolution to the next generation NCF materials for high I/O die assembly (36,000 I/O's). The optimization of the parameters critical to the development of a robust assembly process will be addressed. Specific interactions between the film properties, thermal profile for joining, and the force/bump ratio will be discussed in relation to solder joint formation.


2013 ◽  
Vol 2013 (1) ◽  
pp. 000291-000297 ◽  
Author(s):  
Mary Liu ◽  
Wusheng Yin

More and more Land Grid Array (LGA) components are being used in electronic devices such as smartphones, tablets and computers. In order to enhance LGA mechanical strength and reliability, capillary flow underfill is used to improve reliability. However, due to the small gap, it is difficult for capillary underfill to flow into the LGA at SMT level. Due to cost considerations, there are usually no pre-heating underfill or cleaning flux residue processes at the SMT assembly line. YINCAE solder joint encapsulant SMT 256 has been successfully used with solder paste for LGA assembly. Solder joint encapsulant is used in in-line LGA soldering process with enhanced reliability. It eliminates the underfilling process and provides excellent reworkability. The shear strength of solder joint is stronger than that of underfilled components. The thermal cycling performance using solder joint encapsulant is much better than that using underfill. Bottom IC of POP has been studied for further understanding of LGA assembly process parameters. All details such as assembly process, drop test and thermal cycling test will be discussed in the full paper.


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