Methodology to achieve the thermal management of a 6U conduction-cooled board with 130W power dissipation and an operating temperature of 85°C

2016 ◽  
Author(s):  
Jerome Maquet
Keyword(s):  
Thermal Management ◽  
Power Dissipation ◽  
Operating Temperature

Micron-Level Actuators for Thermal Management of Microelectronic Devices

2007 ◽  
Author(s):  
Nurhak Erbas ◽  
Oktay Baysal
Keyword(s):  
Thermal Management ◽  
Power Dissipation ◽  
Transfer Rate ◽  
Operating Temperature ◽  
Electronic Devices ◽  
Synthetic Jet ◽  
Two Dimensional ◽  
Microelectronic Devices ◽  
Higher Power ◽  
Membrane Oscillations

Failure rates of electronic equipment depend on the operating temperature. Although demand for more effective cooling of electronic devices has increased in the last decades because of the microminiaturization in device sizes accompanied by higher power dissipation levels, there is still a challenge for engineers to attain improved reliability of thermal management for intermediate and low-heat-flux systems. In the present study, an innovative alternative method is proposed and a computational parametric study has been conducted. A single microchip is placed in a two-dimensional channel. Different synthetic jet configurations are designed as actuators in order to investigate their effectiveness for thermal management. The effect is that the actuator enhances mixing by imparting momentum to the channel flow thus manipulating the temperature field in a positive manner. The best control is achieved when the actuator is placed midway of the chip length and increasing the throat height. Also, using nozzle-like throat geometry increases the heat transfer rate from the microchip surface. Doubling the number of the actuators, optimally placing them, and phasing their membrane oscillations all improve the cooling.

Heat Transfer and Thermal Stress Analysis of an Optoelectronic Package

1991 ◽  
Vol 113 (3) ◽  
pp. 258-262 ◽  
Author(s):  
J. G. Stack ◽  
M. S. Acarlar
Keyword(s):  
Heat Transfer ◽  
Thermal Management ◽  
Power Dissipation ◽  
Point Of View ◽  
Optical Data ◽  
Data Link ◽  
Element Analysis ◽  
Thermally Induced ◽  
Temperature Changes ◽  
Induced Stresses

The reliability and life of an Optical Data Link transmitter are inversely related to the temperature of the LED. It is therefore critical to have efficient packaging from the point of view of thermal management. For the ODL® 200H devices, it is also necessary to ensure that all package seals remain hermetic throughout the stringent military temperature range requirements of −65 to +150°C. For these devices, finite element analysis was used to study both the thermal paths due to LED power dissipation and the thermally induced stresses in the hermetic joints due to ambient temperature changes

Thermal Management for Chip-Scale Atomic Clocks

2005 ◽  
Author(s):  
Alexander Laws ◽  
Richard Y. J. Chang ◽  
Victor M. Bright ◽  
Y. C. Lee
Keyword(s):  
Thermal Management ◽  
Power Dissipation ◽  
Waste Heat ◽  
Large Temperature ◽  
Cavity Surface ◽  
Atomic Clocks ◽  
Test Vehicle ◽  
Ambient Temperatures ◽  
Thermal Test ◽  
Vertical Cavity Surface

Power dissipation of chip-scale atomic clocks is one of the major design considerations. The largest power dissipation is for temperature control of the vertical-cavity surface-emitting laser (VCSEL) and cesium vapor cell. For example, the temperature of the VCSEL and Cs cell have to both be at 70±0.1°C or there will be frequency shift which will ruin the lock of the clock. These temperatures have to be maintained even under a large temperature variation such as −40°C to 50°C. There are three major thermal designs to consider: a) micro-heaters to fine-tune the temperatures of VCSEL and Cs cell, b) use of waste heat from other units to heat the system when outside temperature is low, and c) use of a thermal switch to release any extra waste heat when ambient temperatures are high. These three thermal designs have been incorporated in to a thermal test vehicle, which will be used to develop a thermal management design for the clock. This paper describes the proposed clock design, creation of the thermal test vehicle and development of a bimetallic snap based thermal conduction switch. The switch has been demonstrated to change thermal resistance from 52.9±2.8 K/W when the switch is open to 19.5±1.1 K/W with the switch closed.

Flip Chip Mounting for Improved Thermal Management of AlGaN/GaN HFETs

2005 ◽  
Vol 892 ◽  
Author(s):  
Hangfeng Ji ◽  
Andrei Sarua ◽  
Martin Kuball ◽  
Jo Das ◽  
Wouter Ruythooren ◽  
...  
Keyword(s):  
Thermal Management ◽  
Field Effect ◽  
Flip Chip ◽  
Field Effect Transistors ◽  
Operating Temperature ◽  
Ir Thermography ◽  
Device Management ◽  
Micro Raman Spectroscopy ◽  
Heterostructure Field Effect Transistors ◽  
Gan Heterostructure

AbstractWe report on a temperature study of flip-chip mounted multi-finger AlGaN/GaN heterostructure field effect transistors (HFETs) using micro-Raman spectroscopy and infrared (IR) thermography. Flip-chip mounting can be used to improve thermal device management, in particular, for devices grown on low thermal conductivity substrates such as sapphire. In this study, we compare two flip-chip mounted HFETs of different flip-chip contact bump layout designs and a non flip-chip mounted HFET. Both temperature measurements and 3D temperature simulations are presented. The results show that minimizing the distance between the bumps and the active area of the HFET is essential for obtaining a low device operating temperature.

scholarly journals Thermal Analysis of Fair Scheduling in Real-time Embedded Systems

2018 ◽  
Vol 7 (1) ◽  
pp. 48
Author(s):  
Tayyaba Bokhari ◽  
Sajjad Haider Shami ◽  
Farhan Haseeb
Keyword(s):  
Real Time ◽  
Thermal Management ◽  
System Reliability ◽  
Operating Temperature ◽  
Multiprocessor Scheduling ◽  
Earliest Deadline First ◽  
Fair Scheduling ◽  
The Past ◽  
Reliability Performance ◽  
Earliest Deadline

Over the past few decades, increased demand of highly sophisticated real-time applications with complex functionalities has directly led to exponentially increased power consumption and significantly elevated system temperatures. These elevated temperature and thermal variations present formidable challenges towards system reliability, performance, cooling cost and leakages. This article explores the thermal management strength of two fairness based algorithms, namely Proportional Fair (PFair) and Deadline Partitioning Fair (DP-Fair). In related literature, the introduction of fairness is often considered as a tool to achieve optimality in multiprocessor scheduling algorithms. This work shows that these algorithms bring about better thermal profile when compared with the commonly used Earliest Deadline First (EDF) algorithm in similar conditions both in uniprocessor and multiprocessor environments. A simulation is conducted for periodic task set model. The obtained results are encouraging and show that use of fairness based algorithms reduces the operating temperature, peak temperature, and thermal variations.

Thermal Management System Modeling and Simulation of a Full-Powered Fuel Cell Vehicle

2019 ◽  
Vol 142 (6) ◽  
Author(s):  
Yiping Wang ◽  
Jing Li ◽  
Qi Tao ◽  
Mohamed H. S. Bargal ◽  
Mengting Yu ◽  
...  
Keyword(s):  
Fuel Cell ◽  
Thermal Management ◽  
Management System ◽  
Operating Temperature ◽  
System Modeling ◽  
Load Condition ◽  
Proton Exchange ◽  
Fuel Cell Vehicle ◽  
Thermal Management System ◽  
Stack Model

Abstract Thermal management is an important factor in securing the safe and effective operation of a fuel cell vehicle (FCV). A parameterized stack model of a 100 kW proton exchange membrane fuel cell (PEMFC) is constructed by matlab/Simulink to design and asses the thermal management characteristics of a 100 kW full-powered FCV. The cooling components model, with parameters obtained by theoretical calculation based on the cooling requirement, is developed in the commercial solver GT-COOL. A thermal management simulation platform is constructed by coupling the stack model and cooling components. The accuracy of the modeling method for the stack is validated by comparing with the experimental data. The relationship between the operating temperature and output performance of the fuel cell stack is revealed based on the simulation model. The simulation results show that the operating temperature has a considerable influence on stack performance under high-current operation, and the inlet and outlet temperatures of the stack change nearly linearly with the increasing environmental temperature. The heat dissipation potential of the thermal management system under the high-load condition is also verified. The temperatures and coolant flow of core components, including the stack, DC/DC, air compressor, and driving motor, can meet the cooling requirements.

Experimental Analysis of a Vapor Chamber Applied to Thermal Management of Microelectronics

2015 ◽  
Vol 1120-1121 ◽  
pp. 1368-1372 ◽  
Author(s):  
Daniel Henrique de Souza Obata ◽  
Thiago Antonini Alves ◽  
Márcio Antonio Bazani ◽  
Amarildo Tabone Paschoalini
Keyword(s):  
Thermal Management ◽  
Integrated Circuit ◽  
Heat Sink ◽  
Power Dissipation ◽  
Pure Aluminum ◽  
Experimental Tests ◽  
Working Fluid ◽  
Vapor Chamber ◽  
Airflow Velocity ◽  
Circuit Power

In this research, a vapor chamber embedded in the base of a heat sink was experimentally analyzed for the application in thermal management of microelectronics. The vapor chamber was produced by a copper and molybdenum alloy with length of 240 mm, width of 54 mm, thickness of 3 mm, and capillary structures composed by copper screen meshes. The working fluid used was de-ionized water. The pure aluminum heat sink was cooled by air forced convection and the evaporator vapor chamber was heated using an electrical resistor simulating integrated circuit power dissipation. The experimental tests were done in a suction type wind tunnel with open return for a heat load varying from 20 to 80 W and for an airflow velocity varying from 1 to 4 m/s. The experimental results showed that the considered vapor chamber worked successfully, maintaining low operating temperature.

Thermal Issues in Next Generation Integrated Circuits

2003 ◽  
Author(s):  
Siva Gurrum ◽  
Shivesh Suman ◽  
Yogendra Joshi ◽  
Andrei Fedorov
Keyword(s):  
Integrated Circuits ◽  
Thermal Management ◽  
Power Dissipation ◽  
High Performance ◽  
Electronic Devices ◽  
Heat Removal ◽  
Current Generation ◽  
Fundamental Limits ◽  
Convection Boundary ◽  
And Performance

Effective cooling of electronic chips is crucial for reliability and performance of electronic devices. Steadily increasing power dissipation in both devices and interconnects motivate the investigation of chip-centric thermal management as opposed to traditional package-centric solutions. In this work, we explore the fundamental limits for heat removal from a model chip for various configurations. Temperature rise when the chip is embedded in an infinite solid is computed for different thermal conductivities of the medium to pin down the best that can be achieved with conduction based thermal management. Next, a chip attached to a spreader plate with convection boundary condition on top was considered. A brief review of interface thermal resistances and partitioning of overall thermal resistance is presented for current generation microprocessors. Based upon the analysis it is concluded that far-term cooling solutions might necessitate integration with chip/interconnect-stack to meet the challenges. In addition, this would require concurrent thermal and electrical design/fabrication of future high-performance microprocessors.

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