Analysis of Drain Current Enhancement in "PN-Body Tied SOI-FET" -Bulk vs Surface Conduction Mode and Low Vds Saturation Effect-

Author(s):  
Hiroki Itoh ◽  
Jiro Ida ◽  
Takayuki Mori ◽  
Koichiro Ishibashi
2012 ◽  
Vol 482-484 ◽  
pp. 1093-1096 ◽  
Author(s):  
Xiao Feng Zhuang ◽  
Qing Kai Zeng ◽  
Bing Ren ◽  
Zhen Hua Wang ◽  
Yue Lu Zhang ◽  
...  

In this paper, the threshold voltage of diamond film-based metal-semiconductor field effect transistors (MESFETs) has been simulated using Silvaco TCAD tools. The drain current (Id) versus gate voltage (Vg) relationship, and the distribution of acceptors in diamond surface conduction layer were also investigated. From the simulation results, it was found that the gate length contributed the most to the threshold voltage, while the doping depth almost had no impact on the threshold voltage value.


Author(s):  
Rijo Baby ◽  
Anirudh Venugopalrao ◽  
Hareesh Chandrasekar ◽  
Srinivasan Raghavan ◽  
Muralidharan Rangrajan ◽  
...  

Abstract In this work, we show that a bilayer SiNx passivation scheme which includes a high-temperature annealed SiNx as gate dielectric, significantly improves both ON and OFF state performance of AlGaN/GaN MISHEMTs. From devices with different SiNx passivation schemes, surface and bulk leakage paths were determined. Temperature-dependent MESA leakage studies showed that the surface conduction could be explained using a 2-D variable range hopping mechanism along with the mid-gap interface states at the GaN(cap)/ SiNx interface generated due to the Ga-Ga metal like bonding states. It was found that the high temperature annealed SiNx gate dielectric exhibited the lowest interface state density and a two-step C-V indicative of a superior quality SiNx/GaN interface as confirmed from conductance and capacitance measurements. High-temperature annealing helps in the formation of Ga-N bonding states, thus reducing the shallow metal-like interface states. MISHEMT measurements showed a significant reduction in gate leakage and a 4-orders of magnitude improvement in the ON/OFF ratio while increasing the saturation drain current (IDS) by a factor of 2. Besides, MISHEMTs with 2-step SiNx passivation exhibited a relatively flat transconductance profile, indicative of lower interface states density. The dynamic Ron with gate and drain stressing measurements also showed about 3x improvements in devices with bilayer SiNx passivation.


1988 ◽  
Vol 49 (C4) ◽  
pp. C4-223-C4-226 ◽  
Author(s):  
G. POST ◽  
P. DIMITRIOU ◽  
A. FALCOU ◽  
N. DUHAMEL ◽  
G. MERMANT

2020 ◽  
pp. 99-107
Author(s):  
Erdal Sehirli

This paper presents the comparison of LED driver topologies that include SEPIC, CUK and FLYBACK DC-DC converters. Both topologies are designed for 8W power and operated in discontinuous conduction mode (DCM) with 88 kHz switching frequency. Furthermore, inductors of SEPIC and CUK converters are wounded as coupled. Applications are realized by using SG3524 integrated circuit for open loop and PIC16F877 microcontroller for closed loop. Besides, ACS712 current sensor used to limit maximum LED current for closed loop applications. Finally, SEPIC, CUK and FLYBACK DC-DC LED drivers are compared with respect to LED current, LED voltage, input voltage and current. Also, advantages and disadvantages of all topologies are concluded.


2003 ◽  
Vol 771 ◽  
Author(s):  
Michael C. Hamilton ◽  
Sandrine Martin ◽  
Jerzy Kanicki

AbstractWe have investigated the effects of white-light illumination on the electrical performance of organic polymer thin-film transistors (OP-TFTs). The OFF-state drain current is significantly increased, while the drain current in the strong accumulation regime is relatively unaffected. At the same time, the threshold voltage is decreased and the subthreshold slope is increased, while the field-effect mobility of the charge carriers is not affected. The observed effects are explained in terms of the photogeneration of free charge carriers in the channel region due to the absorbed photons.


2021 ◽  
Vol 14 (1) ◽  
pp. 014003
Author(s):  
Shahab Mollah ◽  
Kamal Hussain ◽  
Abdullah Mamun ◽  
Mikhail Gaevski ◽  
Grigory Simin ◽  
...  

2019 ◽  
Vol 9 (2) ◽  
pp. 291-297
Author(s):  
Hind Jaafar ◽  
Abdellah Aouaj ◽  
Ahmed Bouziane ◽  
Benjamin Iñiguez

Background: A novel Dual Material Gate Graded Channel and Dual Oxide Thickness Cylindrical Gate (DMG-GC-DOT) MOSFET is presented in this paper. Methods: Analytical model of drain current is developed using a quasi-two-dimensional cylindrical form of the Poisson equation and is expressed as a function of the surface potential, which is calculated using the expressions of the current density. Results: Comparison of the analytical results with 3D numerical simulations using Silvaco Atlas - TCAD software presents a good agreement from subthreshold to strong inversion regime and for different bias voltages. Conclusion: Two oxide thicknesses with different permittivity can effectively improve the subthreshold current of DMG-GC-DOT MOSFET.


1995 ◽  
Vol 31 (21) ◽  
pp. 1875-1876 ◽  
Author(s):  
P.H. Ladbrooke ◽  
A.K. Jastrzebski ◽  
J.P. Bridge ◽  
R.J. Donarski ◽  
J.E. Barnaby
Keyword(s):  

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