SIMULATION STUDY ON THE ELECTRICAL PERFORMANCE OF EQUILIBRIUM THIN-BODY DOUBLE-GATE NANO-MOSFET

2015 ◽  
Vol 76 (1) ◽  
Author(s):  
Chek Yee Ooi ◽  
Lim Soo King
Keyword(s):  
Simulation Study ◽  
Model Simulation ◽  
Classical Model ◽  
Electron Velocity ◽  
Electrical Performance ◽  
Thin Body ◽  
Quantum Model ◽  
Double Gate ◽  
Electrical Characteristics ◽  
Nano Mosfet

This paper presents a numerical simulation study for electrical characteristics of double-gate (DG) nano-MOSFET at equilibrium thin-body condition. The electrical characteristics which are studied include subband energy (including unprimed and primed subbands), 2D electron density at 77K and 300K ambient temperatures, transmission coefficient, average electron velocity and ballistic current. The ranges of silicon body thickness TSi are 1.0 nm, 1.5 nm and 2.0 nm. The electron transport models used in simulation tool covered quantum model and classical model. Simulation output data are also compared with theoretical discussion.

scholarly journals Geometric and process design of ultra-thin junctionless double gate vertical MOSFETs

2019 ◽  
Vol 9 (4) ◽  
pp. 2863
Author(s):  
K. E. Kaharudin ◽  
F. Salehuddin ◽  
A. S. M. Zain ◽  
Ameer F. Roslan
Keyword(s):  
Process Design ◽  
Concentration Level ◽  
Drain Current ◽  
Channel Length ◽  
Electrical Performance ◽  
Double Gate ◽  
Electrical Characteristics ◽  
Metal Gate ◽  
The Impact ◽  
Gate Work Function

The junctionless MOSFET architectures appear to be attractive in realizing the Moore’s law prediction. In this paper, a comprehensive 2-D simulation on junctionless vertical double-gate MOSFET (JLDGVM) under geometric and process consideration was introduced in order to obtain excellent electrical characteristics. Geometrical designs such as channel length (Lch) and pillar thickness (Tp) were considered and the impact on the electrical performance was analyzed. The influence of doping concentration and metal gate work function (WF) were further investigated for achieving better performance. The results show that the shorter Lch can boost the drain current (ID) of n-JLDGVM and p-JLDGVM by approximately 68% and 70% respectively. The ID of the n-JLVDGM and p-JLVDGM could possibly boost up to 42% and 78% respectively as the Tp is scaled down from 11nm to 8nm. The channel doping (Nch) is also a critical parameter, affecting the electrical performance of both n-JLDGVM and p-JLDGVM in which 15% and 39% improvements are observed in their respective ID as the concentration level is increased from 1E18 to 9E18 atom/cm3. In addition, the adjustment of threshold voltage can be realized by varying the metal WF.

A novel process for SiGe Core-Shell JAM Transistors Fabrication and thermal annealing effect on its electrical performance

2020 ◽  
Vol 1 (2) ◽  
Author(s):  
Ashish Kumar ◽  
Wen-Hsi Lee
Keyword(s):  
Process Condition ◽  
Subthreshold Swing ◽  
Electrical Performance ◽  
Core Shell ◽  
Electrical Characteristics ◽  
Thermal Budget ◽  
New Process ◽  
Comparable Performance ◽  
Higher Temperature ◽  
Film Annealing

 In this study, we fabricate Si/SiGe core-shell Junctionless accumulation mode (JAM)FinFET devices through a rapid and novel process with four main steps, i.e. e-beam lithography definition, sputter deposition, alloy combination annealing, and chemical solution etching. The height of Si core is 30 nm and the thickness of Si/SiGe core-shell is about 2 nm. After finishing the fabrication of devices, we widely studied the electrical characteristics of poly Si/SiGe core-shell JAM FinFET transistors from a view of different Lg and Wch. A poly-Si/SiGe core -shell JAMFETs was successfully demonstrated and it also exhibits  a superior subthreshold swing of 81mV/dec and high on/off ratio > 105 when annealing for 1hr at 600°C. The thermal diffusion process condition for this study are 1hr at 600°C and 6hr at 700°C for comparison. The annealing condition at 700oC for 6 hours shows undesired electrical characteristics against the other. Results suggests that from over thermal budget causes a plenty of Ge to precipitate against to form SiGe thin film. Annealing JAMFETs at low temperature shows outstanding Subthreshold swing and better swing condition when compared to its counterpart i.e. at higher temperature. This new process can still fabricate a comparable performance to classical planar FinFET in driving current. 

Investigation of ZnO Buffer for the Optical and Electrical Characteristics of Polymer/Carbon Nanotube Composite Sol Deposited on Flexible Substrates

2013 ◽  
Vol 747 ◽  
pp. 526-529
Author(s):  
Bo Yuan Su ◽  
Meng Chun Chen ◽  
Sheng Yuan Chu ◽  
Yang Der Juang
Keyword(s):  
Carbon Nanotube ◽  
Detrimental Effect ◽  
Bending Test ◽  
Electrical Performance ◽  
Electrical Characteristics ◽  
Composite Polymer ◽  
Conductive Films ◽  
Bending Effect ◽  
Average Transmittance ◽  
Carbon Nanotube Composite

In this paper, the carbon nanotube was well dispersed into the poly (3,4-ethylenedioxythiophene) poly (styrenesulfonate) (PEDOTPSS) solution with a best concentration of 4 mg/ml. The prepared sol was spun on poly (ether sulfone) (PES) substrates, showing sheet resistance as low as 19.8 Ω/sq and the high average transmittance over 90 %. The change in optical and electrical properties due to poly (ether sulfone) (PES) substrate was investigated to understand the failure mechanisms. For realizing the bending effect on electrical performance, the pre-deposited ZnO buffer was introduced to improve the deterioration during the repeated bending test. The composite polymer enhanced the electrical conductivity with less detrimental effect on the optical transparency, which suggests the potential transparent conductive films for use in developing optical and electrical device.

Resonant gate tunneling current in double-gate SOI: a simulation study

2003 ◽  
Vol 50 (12) ◽  
pp. 2579-2581 ◽  
Author(s):  
Chang-Hoon Choi ◽  
Zhiping Yu ◽  
R.W. Dutton
Keyword(s):  
Simulation Study ◽  
Tunneling Current ◽  
Double Gate ◽  
Gate Tunneling

scholarly journals Quantum Computer: Quantum Model and Reality

2020 ◽  
Author(s):  
Vasil Dinev Penchev
Keyword(s):  
Quantum Mechanics ◽  
Turing Machine ◽  
Quantum Computer ◽  
Classical Model ◽  
Hidden Variables ◽  
Quantum Model ◽  
Computational Process ◽  
Intermediate Domain ◽  
And Mathematics ◽  
The Axiom Of Choice

Any computer can create a model of reality. The hypothesis that quantum computer can generate such a model designated as quantum, which coincides with the modeled reality, is discussed. Its reasons are the theorems about the absence of “hidden variables” in quantum mechanics. The quantum modeling requires the axiom of choice. The following conclusions are deduced from the hypothesis. A quantum model unlike a classical model can coincide with reality. Reality can be interpreted as a quantum computer. The physical processes represent computations of the quantum computer. Quantum information is the real fundament of the world. The conception of quantum computer unifies physics and mathematics and thus the material and the ideal world. Quantum computer is a non-Turing machine in principle. Any quantum computing can be interpreted as an infinite classical computational process of a Turing machine. Quantum computer introduces the notion of “actually infinite computational process”. The discussed hypothesis is consistent with all quantum mechanics. The conclusions address a form of neo-Pythagoreanism: Unifying the mathematical and physical, quantum computer is situated in an intermediate domain of their mutual transformations.

Quantum compact model for thin-body double-gate Schottky barrier MOSFETs

2008 ◽  
Vol 17 (8) ◽  
pp. 3077-3082 ◽  
Author(s):  
Luan Su-Zhen ◽  
Liu Hong-Xia
Keyword(s):  
Schottky Barrier ◽  
Compact Model ◽  
Thin Body ◽  
Double Gate
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