scholarly journals Failure Analysis of a Burner Component

Author(s):  
Kenneth L. Saunders ◽  
Brian P. Copley

The cogeneration facility of interest contains four identical cogeneration units which produce about one half million Kg per hour of steam for an adjacent refinery and 385 megawatts of electricity. To supplement the production of steam, burners are used to heat the gas turbine exhaust. These burners incorporate shields to deflect exhaust gas flow around the flame base. In an effort to improve burner emissions of the units, the burner shield design was modified. This alteration resulted in gross deformation of the shields which interfered with combustion. A failure analysis of these components was conducted to ascertain the root cause of the observed behavior. Loads were estimated based upon operational conditions and material properties were obtained from the open literature. An evaluation was conducted to determine the temperature distribution first. This temperature distribution was then coupled with mechanical loading to obtain total operational stress levels. The stress levels at the observed temperatures clearly placed the material in the high strain rate (creep) region. The computed stress distribution confirmed the observed failure configuration. A new design was proposed to eliminate this failure mechanism. Detailed evaluations revealed that the new design, while a significant improvement, still operated near the creep region for the material.

1990 ◽  
Vol 112 (1) ◽  
pp. 80-85
Author(s):  
F. Fleischer ◽  
C. Koerner ◽  
J. Mann

Following repeated cases of damage caused to exhaust silencers located directly beyond gas turbine diffusers, this paper reports on investigations carried out to determine possible remedies. In all instances, an uneven exhaust gas flow distribution was found. The company’s innovative approach to the problem involved constructing a scale model of a complete gas turbine exhaust system and using it for flow simulation purposes. It was established for the first time that, subject to certain conditions, the results of tests conducted on a model can be applied to the actual turbine exhaust system. It is shown that when an unfavorable duct arrangement might produce an uneven exhaust flow, scale models are useful in the development of suitable flow-distributing devices.


1970 ◽  
Author(s):  
P. J. Torpey ◽  
R. M. Welch

The ability to predict the longitudinal temperature distribution along a gas turbine exhaust duct facilitates the selection of the proper duct material and the appropriate paint or other external coating. It also allows accurate determination of thermal expansion over the entire length. A first-order differential equation is derived from a one-dimensional heat flow model for the exhaust system. A digital computer program employing this model is also presented. The computer solution, in addition to eliminating tedious manual computation, extends the analysis capability by accounting for changes in temperature and flow-dependent variables along the duct length. Measured gas and duct wall temperatures for a 1.5-kw gas turbine exhaust system are compared with values predicted by the analysis. Good agreement is noted throughout that portion of the system in which fully developed flow exists.


Author(s):  
Friedrich Fleischer ◽  
Christian Koerner ◽  
Juergen Mann

Following repeated cases of damage caused to exhaust silencers located directly beyond gas turbine diffusers, this paper reports on investigations carried out to determine possible remedies. In all instances, an uneven exhaust gas flow distribution was found to be present. The company’s innovative approach to the problem involved constructing a scale model of a complete gas turbine exhaust system and using it for flow simulation purposes. It was established for the first time that, subject to certain conditions, the results of tests conducted on a model can be applied to the actual turbine exhaust system. It is shown that when an unfavourable duct arrangement might produce an uneven exhaust flow, scale models are useful in the development of suitable flow-distributing devices.


Author(s):  
Hua Younan ◽  
Chu Susan ◽  
Gui Dong ◽  
Mo Zhiqiang ◽  
Xing Zhenxiang ◽  
...  

Abstract As device feature size continues to shrink, the reducing gate oxide thickness puts more stringent requirements on gate dielectric quality in terms of defect density and contamination concentration. As a result, analyzing gate oxide integrity and dielectric breakdown failures during wafer fabrication becomes more difficult. Using a traditional FA flow and methods some defects were observed after electrical fault isolation using emission microscopic tools such as EMMI and TIVA. Even with some success with conventional FA the root cause was unclear. In this paper, we will propose an analysis flow for GOI failures to improve FA’s success rate. In this new proposed flow both a chemical method, Wright Etch, and SIMS analysis techniques are employed to identify root cause of the GOI failures after EFA fault isolation. In general, the shape of the defect might provide information as to the root cause of the GOI failure, whether related to PID or contamination. However, Wright Etch results are inadequate to answer the questions of whether the failure is caused by contamination or not. If there is a contaminate another technique is required to determine what the contaminant is and where it comes from. If the failure is confirmed to be due to contamination, SIMS is used to further determine the contamination source at the ppm-ppb level. In this paper, a real case of GOI failure will be discussed and presented. Using the new failure analysis flow, the root cause was identified to be iron contamination introduced from a worn out part made of stainless steel.


Author(s):  
E. Widener ◽  
S. Tatti ◽  
P. Schani ◽  
S. Crown ◽  
B. Dunnigan ◽  
...  

Abstract A new 0.5 um 1 Megabit SRAM which employed a double metal, triple poly CMOS process with Tungsten plug metal to poly /silicon contacts was introduced. During burn-in of this product, high currents, apparently due to electrical overstress, were experienced. Electrical analysis showed abnormal supply current characteristics at high voltages. Failure analysis identified the sites of the high currents of the bum-in rejects and discovered cracks in the glue layer prior to Tungsten deposition as the root cause of the failure. The glue layer cracks allowed a reaction with the poly/silicon, causing opens at the bottom of contacts. These floating nodes caused high currents and often latch-up during burn-in. Designed experiments in the wafer fab identified an improved glue layer process, which has been implemented. The new process shows improvement in burn in performance as well as outgoing product quality.


Author(s):  
Hashim Ismail ◽  
Ang Chung Keow ◽  
Kenny Gan Chye Siong

Abstract An output switching malfunction was reported on a bridge driver IC. The electrical verification testing revealed evidence of an earlier over current condition resulting from an abnormal voltage sense during a switching event. Based on these test results, we developed the hypothesis that a threshold voltage mismatch existed between the sense transistor and the output transistor. This paper describes the failure analysis approach we used to characterize the threshold voltage mismatch as well as our approach to determine the root cause, which was trapped charge on the gate oxide of the sense transistor.


Author(s):  
D. Zudhistira ◽  
V. Viswanathan ◽  
V. Narang ◽  
J.M. Chin ◽  
S. Sharang ◽  
...  

Abstract Deprocessing is an essential step in the physical failure analysis of ICs. Typically, this is accomplished by techniques such as wet chemical methods, RIE, and mechanical manual polishing. Manual polishing suffers from highly non-uniform delayering particularly for sub 20nm technologies due to aggressive back-end-of-line scaling and porous ultra low-k dielectric films. Recently gas assisted Xe plasma FIB has demonstrated uniform delayering of the metal and dielectric layers, achieving a planar surface of heterogeneous materials. In this paper, the successful application of this technique to delayer sub-20 nm microprocessor chips with real defects to root cause the failure is presented.


Author(s):  
Erik Paul ◽  
Holger Herzog ◽  
Sören Jansen ◽  
Christian Hobert ◽  
Eckhard Langer

Abstract This paper presents an effective device-level failure analysis (FA) method which uses a high-resolution low-kV Scanning Electron Microscope (SEM) in combination with an integrated state-of-the-art nanomanipulator to locate and characterize single defects in failing CMOS devices. The presented case studies utilize several FA-techniques in combination with SEM-based nanoprobing for nanometer node technologies and demonstrate how these methods are used to investigate the root cause of IC device failures. The methodology represents a highly-efficient physical failure analysis flow for 28nm and larger technology nodes.


Author(s):  
Keith Harber ◽  
Steve Brockett

Abstract This paper outlines the failure analysis of a Radio Frequency only (RF-only) failure on a complex Multimode Multiband Power Amplifier (MMPA) module, where slightly lower gain was observed in one mode of operation. 2 port S-parameter information was collected and utilized to help localize the circuitry causing the issue. A slight DC electrical difference was observed, and simulation was utilized to confirm that difference was causing the observed S-parameters. Physical analysis uncovered a very visible cause for the RF-only failure.


Author(s):  
Nathan Wang ◽  
Saunil Shah ◽  
Camille Garcia ◽  
Vicente Pasating ◽  
George Perreault

Abstract MEMS samples, with their relatively large size and weight, present a unique challenge to the failure analyst as they also included thin films and microstructures used in conventional integrated circuits. This paper describes how to accommodate the large MEMS structures without skimping on the microanalyses needed to get to the root cause. Investigations of tuning folk gyroscopes were used to demonstrate these new techniques.


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