SMALL SIGNAL AND DC CHARACTERISTICS OF ULTRA-THIN GaN/AlN/GaN HFETs

2011 ◽  
Vol 20 (03) ◽  
pp. 385-392 ◽  
Author(s):  
KELSON D. CHABAK ◽  
DENNIS E. WALKER ◽  
ANTONIO CRESPO ◽  
MANUEL TREJO ◽  
MAURICIO KOSSLER ◽  
...  
Keyword(s):  
Sapphire Substrate ◽  
High Performance ◽  
Gate Dielectric ◽  
Small Signal ◽  
Barrier Thickness ◽  
Gate Leakage ◽  
Performance Factors ◽  
Dc Characteristics ◽  
Signal Parameters

This paper presents high performance device results using an ultra-thin AlN / GaN structure on sapphire substrate with a 100-nm T -gate. Excellent dc and RF characteristics are reported, including an extrinsic transconductance of 500 mS/mm and an extrinsic f t / f max ( U ) ratio of 78/111-GHz which is among the highest reported for AlN / GaN HFETs. Low gate leakage results are also presented despite the small barrier thickness and absence of a gate dielectric. Modeling of the small signal parameters is also discussed to gain an understanding of the limiting and contributing performance factors.

scholarly journals Graphene Oxide/Polystyrene Bilayer Gate Dielectrics for Low-Voltage Organic Field-Effect Transistors

2018 ◽  
Vol 9 (1) ◽  
pp. 2 ◽  
Author(s):  
Sooji Nam ◽  
Yong Jeong ◽  
Joo Kim ◽  
Hansol Yang ◽  
Jaeyoung Jang
Keyword(s):  
Graphene Oxide ◽  
Field Effect ◽  
High Performance ◽  
Gate Dielectric ◽  
Low Voltage ◽  
Field Effect Transistors ◽  
High Mobility ◽  
Operating Voltage ◽  
Organic Field Effect Transistors ◽  
Gate Leakage

Here, we report on the use of a graphene oxide (GO)/polystyrene (PS) bilayer as a gate dielectric for low-voltage organic field-effect transistors (OFETs). The hydrophilic functional groups of GO cause surface trapping and high gate leakage, which can be overcome by introducing a layer of PS—a hydrophobic polymer—onto the top surface of GO. The GO/PS gate dielectric shows reduced surface roughness and gate leakage while maintaining a high capacitance of 37.8 nF cm−2. The resulting OFETs show high-performance operation with a high mobility of 1.05 cm2 V−1 s−1 within a low operating voltage of −5 V.

scholarly journals Analysis of DC Characteristics in GaN-Based Metal-Insulator-Semiconductor High Electron Mobility Transistor with Variation of Gate Dielectric Layer Composition by Considering Self-Heating Effect

2019 ◽  
Vol 9 (17) ◽  
pp. 3610 ◽  
Author(s):  
Hwang ◽  
Jang ◽  
Kim ◽  
Lee ◽  
Lim ◽  
...  
Keyword(s):  
Leakage Current ◽  
Dielectric Layer ◽  
Gate Dielectric ◽  
High Electron Mobility Transistor ◽  
High Electron ◽  
Gate Leakage Current ◽  
Gate Leakage ◽  
Metal Insulator ◽  
Self Heating ◽  
Dc Characteristics

This study investigates metal-insulator-semiconductor high electron mobility transistor DC characteristics with different gate dielectric layer compositions and thicknesses, and lattice temperature effects on gate leakage current by using a two-dimensional simulation. We first compared electrical properties, including threshold voltage, transconductance, and gate leakage current with the self-heating effect, by applying a single Si3N4 dielectric layer. We then employed different Al2O3 dielectric layer thicknesses on top of the Si3N4, and also investigated lattice temperature across a two-dimensional electron gas channel layer with various dielectric layer compositions to verify the thermal effect on gate leakage current. Gate leakage current was significantly reduced as the dielectric layer was added, and further decreased for a 15-nm thick Al2O3 on a 5-nm Si3N4 structure. Although the gate leakage current increased as Al2O3 thickness increased to 35 nm, the breakdown voltage was improved.

scholarly journals A reliability study of Non-uniform Si TFET with dual material source: Impact of interface trap charges and temperature

2021 ◽  
Author(s):  
Jagritee Talukdar ◽  
Kavicharan Mummaneni
Keyword(s):  
Interface Trap ◽  
Small Signal ◽  
Reliability Study ◽  
Material Source ◽  
Dc Characteristics ◽  
Signal Parameters ◽  
Source Voltage ◽  
The Impact ◽  
Dual Material ◽  
Trap Charges

Abstract The article reports the extraction of DC characteristics and small signal parameters of Non-uniform Si TFET with dual material source (NUTFET-DMS) at different frequencies followed by its reliability investigation. The reliability of the device is examined by analysing: 1) the impact of the presence of interface trap charges, 2) the impact of temperature variation (200 K- 400 K). In the analysis it has been observed that in case of absence of interface trap charges the increase in frequency reduces the value of parasitic capacitances. In addition, the presence of interface trap charges lessens the value of parasitic capacitances up to a certain gate to source voltage after that it shows a reverse effect. Further, it has been perceived that the effect of change in temperature is more on device ambipolar current when interface trap charges are present, whereas the reverse is true in the case of OFF state current and different parasitic capacitances.

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