A New Tune-Dependent Multiple-Gated Transistor Linearization Technique

2019 ◽  
Vol 29 (07) ◽  
pp. 2050103
Author(s):  
Farzan Rezaei

In this paper, a new multiple-gated transistor (MGTR) linearization technique is presented. To simultaneously keep linearity and tuning capability of proposed operational transconductance amplifier (OTA), the auxiliary transistors which are employed for [Formula: see text] cancellation of differential pair (DP) stage are body-driven through a tune-dependent voltage. By this way, the third-order nonlinearity of DP is reduced for a wide range of transconductance values from 5.1 to 35.6[Formula: see text][Formula: see text]A/V. The OTA works with 1.2[Formula: see text]V supply voltage and its power consumption changes between 137.4 and 156[Formula: see text][Formula: see text]W at the entire tuning range. For [Formula: see text][Formula: see text][Formula: see text]A/V ([Formula: see text][Formula: see text]V) and for 0.6[Formula: see text][Formula: see text] input voltage, the simulation results show 6[Formula: see text]dB reduction in the total harmonic distortion (THD) of proposed OTA when the MGTR linearization technique is used and 15[Formula: see text]dB reduction when the tune-dependent body driving is also utilized. The proposed OTA is employed in a third-order low-pass Butterworth filter which is tunable from 2 to 18[Formula: see text]MHz. The in-band IIP3 of filter is 16.9 and 12.4[Formula: see text]dBm, respectively, for 2 and 18[Formula: see text]MHz cutoff frequencies while the two-tone input voltage is applied at 1[Formula: see text]MHz.

Author(s):  
May Phu Pwint Wai ◽  
Peerawut Suwanjan ◽  
Winai Jaikla ◽  
Amornchai Chaichana

The commercially available IC LT1228 is an interesting active device due to its advantage features, such as a fast transconductance amplifier, a wide bandwidth over a wide range of voltage gain, low total harmonic distortion (THD), high impedance differential input, etc. The single-input triple-output (SITO) voltage-mode (VM) multifunction biquadratic filters using ICs, LT1228s are introduced in this research. This circuit design provides the three-filtering functions, low-pass (LP), high-pass (HP), and band-pass (BP), without changing the circuit architecture. It comprises three LT1228s, four resistors, and two capacitors connected to the ground. The low impedance voltage output nodes are HP and BP responses. The quality factor (Q) and the pole frequency (ω0) can be electronically and orthogonally tuned by altering the third LT1228’s bias current (IB). The PSPICE simulation and the experiment are verified to describe the circuit operation.


Author(s):  
Peethala Rajiv Roy ◽  
P. Parthiban ◽  
B. Chitti Babu

Abstract This paper deals with implementation of a single-phase three level converter system under low voltage condition. The frequency of the switches is made constant and involves change in ${t_{on}}$ and ${t_{off}}$ duration. For this condition the pulse width modulation control scheme for a single phase three level rectifier is developed to improve the power quality. The hysteresis current control technique is adopted to bring forth three-level PWM on the dc side of the bridge rectifier and to achieve high power factor and low harmonic distortion. Based on the proposed control scheme, the line current is driven to follow the sinusoidal current command which is in phase with the supply voltage. By using three-level voltage pattern the blocking voltage of each power device is clamped to half of the dc link voltage. The simulation and experimental results of 20W converter under low input voltage condition are shown to verify the circuit performance. Open loop simulation and hardware tests are implemented by applying a low voltage of 15 V(rms) on the input side.


2020 ◽  
Vol 15 (3) ◽  
pp. 1-12
Author(s):  
Ana Isabela Araújo Cunha ◽  
Antonio José Sobrinho De Sousa ◽  
Edson Pinto Santana ◽  
Robson Nunes De Lima ◽  
Fabian Souza De Andrade ◽  
...  

This work presents a CMOS four quadrant analog multiplier architecture for application as the synapse element in analog cellular neural networks. For this reason, the circuit has voltage-mode inputs and a current-mode output and the chief design targets are compactness and low energy consumption. A signal application method is proposed that avoids voltage reference generators, which contributes to reduce sensitivity to supply voltage variation. Performance analysis through simulation has been accomplished for a design in CMOS 130 nm technology with 163 µm2 total active area. The circuit features ±50 mV input voltage range, 86 µW static power and ‑28.4 dB maximum total harmonic distortion. A simple technique for manual calibration is also presented.


2021 ◽  
Author(s):  
Palash K. Banerjee

In this research project, an AC Cûk voltage regulator has been proposed for maintaining constant voltage across the load during wide range of input voltage fluctuations. The proposed AC Ck voltage regulator made of practical IGBT switches has been investigated for both manual and automatic control circuit. A fraction of the output voltage is taken as the input voltage of the control circuit and produce the error signal if any changes occur in the output voltage. The modified error signal is used to make PWM signals for switching devices as per output voltage of regulator. The PWM controls the ON/OFF time (Duty cycle) of switching devices (IGBTs) of the proposed regulator. As a result the regulator is maintaining a constant voltage across the load during any change in supply voltage. The simulation waveforms and the calculated total harmonics distortion (THD) values are compared with previously studied AC Buck-Boost regulator. The observed simulated waveforms of output voltage, output current and input current and THD values have been improved in case of proposed AC Cûk voltage regulator.


Author(s):  
May Phu Pwint Wai ◽  
Winai Jaikla ◽  
Surapong Siripongdee ◽  
Amornchai Chaichana ◽  
Peerawut Suwanjan

This study aims to design an electronically tunable voltage-mode (VM) universal filter utilizing commercially available LT1228 integrated circuits (ICs) with three-input and single-output (TISO) configuration. With the procedure based on two integrator loop filtering structures, the proposed filter consists of two LT1228s, four resistors, and two grounded capacitors. It realizes five filter output responses: low-pass, all-pass, band-reject, band-pass, and high-pass functions. By selecting input voltage signals, each output responses can be achieved without changing the circuit architecture. The natural angular frequency can be controlled electronically. The input voltage nodes Vin1 and Vin3 possess high impedance. The output node has low impedance, so it can be cascaded to other circuits. The performance of the proposed filter is corroborated by PSpice simulation and hardware implementation which support the theoretical assumptions. The result shows that the range of total harmonic distortion (THD) is lower than 1%, and that the higher the temperature is, the lower the natural angular frequency is.


2013 ◽  
Vol 22 (07) ◽  
pp. 1350053 ◽  
Author(s):  
S. REKHA ◽  
T. LAXMINIDHI

This paper presents an active-RC continuous time filter in 0.18 μm standard CMOS technology intended to operate on a very low supply voltage of 0.5 V. The filter designed, has a 5th order Chebyshev low pass response with a bandwidth of 477 kHz and 1-dB passband ripple. A low-power operational transconductance amplifier (OTA) is designed which makes the filter realizable. The OTA uses bulk-driven input transistors and feed-forward compensation in order to increase the Dynamic Range and Unity Gain Bandwidth, respectively. The paper also presents an equivalent circuit of the OTA and explains how the filter can be modeled using descriptor state-space equations which will be used for design centering the filter in the presence of parasitics. The designed filter offers a dynamic range of 51.3 dB while consuming a power of 237 μW.


2007 ◽  
Vol 16 (02) ◽  
pp. 221-231 ◽  
Author(s):  
YUH-SHYAN HWANG ◽  
JIANN-JONG CHEN ◽  
JEN-HUNG LAI

A fully differential third-order very high frequency (VHF) Gm–C filter based on linear transformation (LT) techniques is presented in this paper. The systematic design method and the procedure are developed to realize LT Gm–C filters efficiently. A third-order Butterworth lowpass filter embedded bandgap and bias circuits with 200 MHz cutoff frequency is implemented in the TSMC 0.18 μm 1P6M process. The total harmonic distortion (THD) of the proposed filter is - 43 dB with input signal 0.5 V p-p and output loading capacitance 1 pF at 200 MHz. Power dissipation is 9.77 mW under 1.8 V supply voltage. Its core area occupies 0.188 × 0.1862. Post simulation and experimental results that confirm the theoretical analysis are obtained. Furthermore, the proposed circuits can be extended to high-order Chebychev and elliptic filters.


2021 ◽  
Author(s):  
Palash K. Banerjee

In this research project, an AC Cûk voltage regulator has been proposed for maintaining constant voltage across the load during wide range of input voltage fluctuations. The proposed AC Ck voltage regulator made of practical IGBT switches has been investigated for both manual and automatic control circuit. A fraction of the output voltage is taken as the input voltage of the control circuit and produce the error signal if any changes occur in the output voltage. The modified error signal is used to make PWM signals for switching devices as per output voltage of regulator. The PWM controls the ON/OFF time (Duty cycle) of switching devices (IGBTs) of the proposed regulator. As a result the regulator is maintaining a constant voltage across the load during any change in supply voltage. The simulation waveforms and the calculated total harmonics distortion (THD) values are compared with previously studied AC Buck-Boost regulator. The observed simulated waveforms of output voltage, output current and input current and THD values have been improved in case of proposed AC Cûk voltage regulator.


2019 ◽  
pp. 22-29

Caracterización del método SVPWM con inversor trifásico de dos niveles Juan Tisza1, 2, Javier Villegas2 1Universidad Nacional de Ingeniería, Av. Túpac Amaru 210, Rímac, Lima Perú 2Universidad Nacional Mayor de San Marcos, Ciudad Universitaria, Lima, Perú Recibido 17 de junio del 2019, Revisado el 17 de julio de 2019 Aceptado el 19 de julio de 2019 DOI: https://doi.org/10.33017/RevECIPeru2019.0005/ Resumen Las cargas en Corriente Alterna (CA) requieren voltaje variable y frecuencia variable. Estos requisitos se cumplen con un inversor de fuente de voltaje (VSI). Se puede lograr un voltaje de salida variable variando la tensión de CC de entrada y manteniendo constante la ganancia del inversor. Por otro lado, si la tensión de entrada CC es fija y no es controlable, se puede lograr una tensión de salida variable variando la ganancia del inversor, lo que normalmente se logra mediante el control de modulación por ancho de pulso dentro del inversor. Hay varias técnicas de modulación de ancho de pulso, pero la técnica de vector espacial es una buena opción entre todas las técnicas para controlar el inversor de fuente de voltaje. La modulación por ancho de pulso de vector espacial (SVPWM) es un método avanzado y muy popular con varias ventajas tales como la utilización efectiva del bus de CC, menos generación de armónicos en voltaje de salida, menos pérdidas de conmutación, amplio rango de modulación lineal, etc. En este documento, se ha tomado un inversor de fuente de voltaje constante CC y se ha implementado la SVPWM para VSI de dos niveles utilizando MATLAB / SIMULINK. Descriptores: Modulación de ancho de pulso (PWM), modulación de ancho de pulso de vector espacial (SVPWM), distorsión armónica total (THD), inversor de fuente de voltaje (VSI). Abstract Alternating Current (AC) loads require variable voltage and variable frequency. These requirements are met by a voltage supply inverter (VSI). A variable output voltage can be achieved by varying the input DC voltage and keeping the inverter gain constant. On the other hand, if the DC input voltage is fixed and not controllable, a variable output voltage can be achieved by varying the gain of the inverter, which is normally achieved by controlling the pulse width modulation within the inverter. There are several pulse width modulation techniques, but the spatial vector technique is a good choice among all the techniques for controlling the voltage source inverter. Spatial vector pulse width modulation (SVPWM) is an advanced and very popular method with several advantages such as effective utilization of CC bus, less harmonic generation in output voltage, less switching losses, wide range of linear modulation, etc. In this document, a CC constant voltage source inverter has been taken and SVPWM has been implemented for two-level VSI using MATLAB / SIMULINK. Keywords: Pulse Width Modulation (PWM), Space Vector Pulse Width Modulation (SVPWM), Total Harmonic Distortion (THD), Voltage Source Inverter (VSI).


Author(s):  
R. N. Pradhan ◽  
S. Behera ◽  
P. K. Modi

The conventional rectifier [1] which is popularly referred as Unity Power Rectifiers (UPR)/ Boost rectifier (BR) suffers from various limitations such as low power factor, high ripple content on load voltage and increase in harmonic contents in source current due to non-linear load current that results in significant increase of total harmonic distortion (THD). The main objective of conventional SMR (i.e. shown in Fig.1) is to eliminate these problems so as to maintain unity pf, sinusoidal input current, constant dc voltage and restricted harmonic distortion based on IEEE std. To avoid the separate operation for discontinuous current mode (DCM) and continuous current mode (CCM), a mixed-mode operation [2] is proposed for wide-range of load variation. Since the ripple content on output capacitor voltage and harmonic contents in input ac current are prime concern, the authors [3] presented a robust technique to get rid of these problems. In SMR, the power flow is unidirectional and the circuit is to be operated as boost switch which enables the capacitor to keep the voltage slightly greater than peak of source voltage. But in order to double the level of capacitor voltage with respect to input voltage, a new topology [4] is proposed by Y.Neba and et.al. All these SMRs operate for resistive load, but Patil and et.al[5] changed this resistive load to induction motor to study its effect upon SMR. The mixed-mode operation [2], which has some limitations, has been overcome by modifying the SMR [6]. The topologies used [1-8] use boost inductor on dc side. So this suffers from following demerits.


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