Metrology for Implanted Si Substrate and Dopant Loss Studies

2019 ◽  
Vol 25 (5) ◽  
pp. 367-374
Author(s):  
Dunja Radisic ◽  
Denis Shamiryan ◽  
Geert Mannaert ◽  
Werner Boullart ◽  
Erik Rosseel ◽  
...  
Keyword(s):  
Author(s):  
F.-R. Chen ◽  
T. L. Lee ◽  
L. J. Chen

YSi2-x thin films were grown by depositing the yttrium metal thin films on (111)Si substrate followed by a rapid thermal annealing (RTA) at 450 to 1100°C. The x value of the YSi2-x films ranges from 0 to 0.3. The (0001) plane of the YSi2-x films have an ideal zero lattice mismatch relative to (111)Si surface lattice. The YSi2 has the hexagonal AlB2 crystal structure. The orientation relationship with Si was determined from the diffraction pattern shown in figure 1(a) to be and . The diffraction pattern in figure 1(a) was taken from a specimen annealed at 500°C for 15 second. As the annealing temperature was increased to 600°C, superlattice diffraction spots appear at position as seen in figure 1(b) which may be due to vacancy ordering in the YSi2-x films. The ordered vacancies in YSi2-x form a mesh in Si plane suggested by a LEED experiment.


Author(s):  
V. Kaushik ◽  
P. Maniar ◽  
J. Olowolafe ◽  
R. Jones ◽  
A. Campbell ◽  
...  

Lead zirconium titanate films (Pb (Zr,Ti) O3 or PZT) are being considered for potential application as dielectric films in memory technology due to their high dielectric constants. PZT is a ferroelectric material which shows spontaneous polarizability, reversible under applied electric fields. We report herein some results of TEM studies on thin film capacitor structures containing PZT films with platinum-titanium electrodes.The wafers had a stacked structure consisting of PZT/Pt/Ti/SiO2/Si substrate as shown in Figure 1. Platinum acts as electrode material and titanium is used to overcome the problem of platinum adhesion to the oxide layer. The PZT (0/20/80) films were deposited using a sol-gel method and the structure was annealed at 650°C and 800°C for 30 min in an oxygen ambient. XTEM imaging was done at 200KV with the electron beam parallel to <110> zone axis of silicon.Figure 2 shows the PZT and Pt layers only, since the structure had a tendency to peel off at the Ti-Pt interface during TEM sample preparation.


Author(s):  
A.C. Daykin ◽  
C.J. Kiely ◽  
R.C. Pond ◽  
J.L. Batstone

When CoSi2 is grown onto a Si(111) surface it can form in two distinct orientations. A-type CoSi2 has the same orientation as the Si substrate and B-type is rotated by 180° degrees about the [111] surface normal.One method of producing epitaxial CoSi2 is to deposit Co at room temperature and anneal to 650°C.If greater than 10Å of Co is deposited then both A and B-type CoSi2 form via a number of intermediate silicides .The literature suggests that the co-existence of A and B-type CoSi2 is in some way linked to these intermediate silicides analogous to the NiSi2/Si(111) system. The phase which forms prior to complete CoSi2 formation is CoSi. This paper is a crystallographic analysis of the CoSi2/Si(l11) bicrystal using a theoretical method developed by Pond. Transmission electron microscopy (TEM) has been used to verify the theoretical predictions and to characterise the defect structure at the interface.


Author(s):  
N. Rozhanski ◽  
A. Barg

Amorphous Ni-Nb alloys are of potential interest as diffusion barriers for high temperature metallization for VLSI. In the present work amorphous Ni-Nb films were sputter deposited on Si(100) and their interaction with a substrate was studied in the temperature range (200-700)°C. The crystallization of films was observed on the plan-view specimens heated in-situ in Philips-400ST microscope. Cross-sectional objects were prepared to study the structure of interfaces.The crystallization temperature of Ni5 0 Ni5 0 and Ni8 0 Nb2 0 films was found to be equal to 675°C and 525°C correspondingly. The crystallization of Ni5 0 Ni5 0 films is followed by the formation of Ni6Nb7 and Ni3Nb nucleus. Ni8 0Nb2 0 films crystallise with the formation of Ni and Ni3Nb crystals. No interaction of both films with Si substrate was observed on plan-view specimens up to 700°C, that is due to the barrier action of the native SiO2 layer.


1996 ◽  
Vol 451 ◽  
Author(s):  
R. Amster ◽  
B. Johnson ◽  
L. S. Vanasupa
Keyword(s):  

ABSTRACTWe studied the nucleation of Cu deposited by an electroless bath. A Pd seed layer was sputtered onto a (100) Si substrate and analyzed with GIX, STM, and AFM. The seed layer was then placed in varying ED-Cu bath conditions and also analyzed using GIX, STM, and AFM. GIX analysis results show a (111) texture for the Pd seed layer as well as the ED-Cu layer. The seed layer's influence on the deposited Cu grain's texture was found to be inconclusive.


2002 ◽  
Vol 716 ◽  
Author(s):  
K.L. Ng ◽  
N. Zhan ◽  
M.C. Poon ◽  
C.W. Kok ◽  
M. Chan ◽  
...  

AbstractHfO2 as a dielectric material in MOS capacitor by direct sputtering of Hf in an O2 ambient onto a Si substrate was studied. The results showed that the interface layer formed between HfO2 and the Si substrate was affected by the RTA time in the 500°C annealing temperature. Since the interface layer is mainly composed of hafnium silicate, and has high interface trap density, the effective barrier height is therefore lowered with increased RTA time. The change in the effective barrier height will affect the FN tunneling current and the operation of the MOS devices when it is applied for nonvolatile memory devices.


2003 ◽  
Vol 766 ◽  
Author(s):  
Sungjin Hong ◽  
Seob Lee ◽  
Yeonkyu Ko ◽  
Jaegab Lee

AbstractThe annealing of Ag(40 at.% Cu) alloy films deposited on a Si substrate at 200 – 800 oC in vacuum has been conducted to investigate the formation of Cu3Si at the Ag-Si interface and its effects on adhesion and resistivity of Ag(Cu)/Si structure. Auger electron spectroscopy(AES) analysis showed that annealing at 200°C allowed a diffusion of Cu to the Si surface, leading to the significant reduction in Cu concentration in Ag(Cu) film and thus causing a rapid drop in resistivity. In addition, the segregated Cu to the Si surface reacts with Si, forming a continuous copper silicide at the Ag(Cu)/Si interface, which can contribute to an enhanced adhesion of Ag(Cu)/Si annealed at 200 oC. However, as the temperature increases above 300°C, the adhesion tends to decrease, which may be attributed to the agglomeration of copper silicide beginning at around 300°C.


Author(s):  
Valery Ray

Abstract Gas Assisted Etching (GAE) is the enabling technology for High Aspect Ratio (HAR) circuit access via milling in Focused Ion Beam (FIB) circuit modification. Metal interconnect layers of microelectronic Integrated Circuits (ICs) are separated by Inter-Layer Dielectric (ILD) materials, therefore HAR vias are typically milled in dielectrics. Most of the etching precursor gases presently available for GAE of dielectrics on commercial FIB systems, such as XeF2, Cl2, etc., are also effective etch enhancers for either Si, or/and some of the metals used in ICs. Therefore use of these precursors for via milling in dielectrics may lead to unwanted side effects, especially in a backside circuit edit approach. Making contacts to the polysilicon lines with traditional GAE precursors could also be difficult, if not impossible. Some of these precursors have a tendency to produce isotropic vias, especially in Si. It has been proposed in the past to use fluorocarbon gases as precursors for the FIB milling of dielectrics. Preliminary experimental evaluation of Trifluoroacetic (Perfluoroacetic) Acid (TFA, CF3COOH) as a possible etching precursor for the HAR via milling in the application to FIB modification of ICs demonstrated that highly enhanced anisotropic milling of SiO2 in HAR vias is possible. A via with 9:1 aspect ratio was milled with accurate endpoint on Si and without apparent damage to the underlying Si substrate.


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