Voltage Differencing Gain Amplifier-Based Sinusoidal Quadrature Oscillator Using Only Two Grounded Capacitors

Author(s):  
Orapin Channumsin ◽  
Worapong Tangsrirat

Background: This article describes the circuit construction of the sinusoidal quadrature oscillator using two Voltage Differencing Gain Amplifiers (VDGAs) as active devices. Methods: Since the presented oscillator circuit uses only two external grounded capacitors as passive elements, it is quite suitable for monolithic integration point of view. The condition of oscillation and the frequency of oscillation are non-interactive, and can be controlled electronically by tuning two separate biasing currents. Non-ideal analysis and sensitivity performance are also discussed. Results: The feasibility of the designed oscillator is justified by the PSPICE simulation results based on TSMC 0.35-µm CMOS process parameters. Conclusion: The effects of the VDGA non-idealities on the proposed circuit are also provided, and the computer simulations based on TSMC 0.35-mm CMOS model parameters are included to evaluate the performance of the circuit.

2016 ◽  
Vol 19 (2) ◽  
pp. 94 ◽  
Author(s):  
B. Chaturvedi ◽  
J. Mohan

In this paper, a versatile quadrature oscillator using single Differential Difference Second Generation Dual-X Current Conveyor (DD-DXCCII) as an active element, two grounded capacitors and three grounded resistors is presented. The proposed oscillator provides two current outputs and three voltage outputs in quadrature relationship simultaneously so named as versatile quadrature oscillator. The proposed versatile quadrature oscillator exhibits the feature of orthogonal control over the frequency of oscillation and condition of oscillation. Effects of non-idealities along with sensitivity analysis are also analyzed. The proposed circuit has low active and passive sensitivities. Parasitic study is further explored. The simulation results with 0.18μm CMOS process parameters using PSPICE are also given. Possible realization of proposed oscillator using AD-844 and LM13600 along with some simulation results are also given for completeness sake.


2010 ◽  
Vol 19 (05) ◽  
pp. 1069-1076 ◽  
Author(s):  
ABHIRUP LAHIRI

A number of sinusoidal oscillators using current differencing buffered amplifiers (CDBAs) have been reported in the literature. However, only three of them are canonic quadrature oscillators (i.e., requiring two capacitors). The aim of this letter is to present additional realizations of single/dual-resistance-controlled quadrature oscillators using CDBAs. Four voltage-mode quadrature oscillators are proposed, which provide the following advantageous features: (i) use of reduced and canonic component count, viz. two CDBAs, three/four resistors and two capacitors, (ii) all passive components are grounded or virtually grounded, which is favorable from integration point of view and (iii) independent and non-interactive resistor control of the condition of oscillation (CO) and the frequency of oscillation (FO). Simulation results verifying the workability of the proposed circuits have been included.


2013 ◽  
Vol 2013 ◽  
pp. 1-5 ◽  
Author(s):  
Avireni Srinivasulu ◽  
Madugula Rajesh

Two new structures for Differential Cascode Voltage Switch Logic (DCVSL) pull-up stage are proposed. In conventional DCVSL structure, low-to-high propagation delay is larger than high-to-low propagation delay this could be brought down by using DCVSL-R. Promoting resistors in DCVSL-R structure increase the parasitic effects and unavoidable delay and it also occupies more area on the chip (Turker et al., 2011). In order to minimize these problems, a new Ultra-Low-Power Diode (ULPD) structures in place of resistors have been suggested. This provides the minimum parasitic effects and reduces area on the chip. Second proposed circuit uses Complementary Pass Transistor Logic (CPTL) structure, which provides complementary outputs. This contributes an alternate circuit for conventional DCVSL structure. The performances of the proposed circuits are examined using Cadence and the model parameters of a 180 nm CMOS process. The simulation results of these two circuits are compared and presented. These circuits are found to be suitable for VLSI implementation.


Author(s):  
Montree Kumngern

In this paper, a current-mode quadrature oscillator using second-generation current conveyors (CCIIs) is presented. The proposed oscillator consists of two CCIIs, two grounded capacitors and two grounded resistors. The circuit is suitable for integrated circuit implementation by using grounded capacitors. In addition, a new current-controlled current-mode quadrature oscillator using two current controlled second generation current conveyors (CCCIIs) and two grounded capacitors can be obtained by replacing CCIIs and resistors series at X terminals with CCCIIs. The condition of oscillation and frequency of oscillation can be orthogonally controlled. The frequency of oscillation can be controlled by grounded resistors and external bias currents. The proposed circuits have been simulated by SPICE simulations. The simulation results are confirmed the proposed theory.


Energies ◽  
2021 ◽  
Vol 14 (5) ◽  
pp. 1265 ◽  
Author(s):  
Johanna Geis-Schroer ◽  
Sebastian Hubschneider ◽  
Lukas Held ◽  
Frederik Gielnik ◽  
Michael Armbruster ◽  
...  

In this contribution, measurement data of phase, neutral, and ground currents from real low voltage (LV) feeders in Germany is presented and analyzed. The data obtained is used to review and evaluate common modeling approaches for LV systems. An alternative modeling approach for detailed cable and ground modeling, which allows for the consideration of typical German LV earthing conditions and asymmetrical cable design, is proposed. Further, analytical calculation methods for model parameters are described and compared to laboratory measurement results of real LV cables. The models are then evaluated in terms of parameter sensitivity and parameter relevance, focusing on the influence of conventionally performed simplifications, such as neglecting house junction cables, shunt admittances, or temperature dependencies. By comparing measurement data from a real LV feeder to simulation results, the proposed modeling approach is validated.


2020 ◽  
Vol 11 (1) ◽  
pp. 129
Author(s):  
Po-Yu Kuo ◽  
Ming-Hwa Sheu ◽  
Chang-Ming Tsai ◽  
Ming-Yan Tsai ◽  
Jin-Fa Lin

The conventional shift register consists of master and slave (MS) latches with each latch receiving the data from the previous stage. Therefore, the same data are stored in two latches separately. It leads to consuming more electrical power and occupying more layout area, which is not satisfactory to most circuit designers. To solve this issue, a novel cross-latch shift register (CLSR) scheme is proposed. It significantly reduced the number of transistors needed for a 256-bit shifter register by 48.33% as compared with the conventional MS latch design. To further verify its functions, this CLSR was implemented by using TSMC 40 nm CMOS process standard technology. The simulation results reveal that the proposed CLSR reduced the average power consumption by 36%, cut the leakage power by 60.53%, and eliminated layout area by 34.76% at a supply voltage of 0.9 V with an operating frequency of 250 MHz, as compared with the MS latch.


2013 ◽  
Vol 2013 ◽  
pp. 1-9 ◽  
Author(s):  
Ali Kargarnejad ◽  
Mohsen Taherbaneh ◽  
Amir Hosein Kashefi

Tracking maximum power point of a solar panel is of interest in most of photovoltaic applications. Solar panel modeling is also very interesting exclusively based on manufacturers data. Knowing that the manufacturers generally give the electrical specifications of their products at one operating condition, there are so many cases in which the specifications in other conditions are of interest. In this research, a comprehensive one-diode model for a solar panel with maximum obtainable accuracy is fully developed only based on datasheet values. The model parameters dependencies on environmental conditions are taken into consideration as much as possible. Comparison between real data and simulations results shows that the proposed model has maximum obtainable accuracy. Then a new fuzzy-based controller to track the maximum power point of the solar panel is also proposed which has better response from speed, accuracy and stability point of view respect to the previous common developed one.


2010 ◽  
Vol 19 (03) ◽  
pp. 519-528 ◽  
Author(s):  
M. PRAMOD ◽  
T. LAXMINIDHI

Continuous common mode feedback (CMFB) circuits having high input impedance and low distortion are proposed. The proposed circuits are characterized for 0.18 μm CMOS process with 1.8 V supply. Simulation results indicate that the proposed common mode detector consumes no standby power and CMFB circuit consumes 27–34% less power than previous high swing CMFB circuits.


2009 ◽  
Vol 2009 ◽  
pp. 1-5 ◽  
Author(s):  
Jiun-Wei Horng

This paper describes a current-mode third-order quadrature oscillator based on current differencing transconductance amplifiers (CDTAs). Outputs of two current-mode sinusoids with90°phase difference are available in the quadrature oscillator circuit. The oscillation condition and oscillation frequency are orthogonal controllable. The proposed circuit employs only grounded capacitors and is ideal for integration. Simulation results are included to confirm the theoretical analysis.


2010 ◽  
Vol 146-147 ◽  
pp. 966-971
Author(s):  
Qi Hua Jiang ◽  
Hai Dong Zhang ◽  
Bin Xiang ◽  
Hai Yun He ◽  
Ping Deng

This work studies the aggregation of an synthetic ultraviolet absorbent, named 2-hydroxy-4-perfluoroheptanoate-benzophenone (HPFHBP), in the interface between two solvents which can not completely dissolve each other. The aggregation is studied by computer simulations based on a dynamic density functional method and mean-field interactions, which are implemented in the MesoDyn module and Blend module of Material Studios. The simulation results show that the synthetic ultraviolet absorbent diffuse to the interface phase and the concentration in the interface phase is greater than it in the solvents phase.


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