Failure Mechanism Studies and Root Cause Identification of Nonstick on Pad on Microchip Al Bondpads

2014 ◽  
Author(s):  
Hua Younan ◽  
Zhou Yongkai ◽  
Chen Yixin ◽  
Fu Chao ◽  
Li Xiaomin
Keyword(s):  
Failure Analysis ◽  
Failure Mechanism ◽  
Wafer Fabrication ◽  
Assembly Process ◽  
Root Cause ◽  
Barrier Metal ◽  
Root Cause Identification ◽  
Induced Defects

Abstract It is well-known that underetch material, contamination, particle, pinholes and corrosion-induced defects on microchip Al bondpads will cause non-stick on pads (NSOP) issues. In this paper, the authors will further study NSOP problem and introduce one more NSOP failure mechanism due to Cu diffusion caused by poor Ta barrier metal. Based on our failure analysis results, the NSOP issue was not due to the assembly process, but due to the wafer fabrication. The failure mechanism might be that the barrier metal Ta was with pinholes, which caused Cu diffused out to the top Al layer, and then formed the “Bump-like” Cu defects and resulted in NSOP on Al bondpads during assembly process.

Failure Mechanism Studies and Elimination of Galvanic Corrosion (Al-Cu Cell) on Microchip Aluminum Bondpads in Copper Process

2015 ◽  
Author(s):  
Hua Younan ◽  
Chen Yixin ◽  
Fu Chao ◽  
Li Xiaomin
Keyword(s):  
Failure Mechanism ◽  
Galvanic Corrosion ◽  
Metal Layer ◽  
Al Alloy ◽  
Weak Point ◽  
Root Cause ◽  
Weak Points ◽  
Barrier Metal ◽  
Root Cause Identification

Abstract In the authors' previous papers, the failure mechanism and elimination solutions of galvanic corrosion (Al-Cu cell) on microchip Al bondpads in the Al process (0.18un and above) have been studied [1-2]. In this paper, the authors will further study the failure mechanism and root cause of galvanic corrosion (Al-Cu cell) on microchip Al bondpads in the Cu process (0.13um and below) with Ta barrier metal. Based on our results, the root cause of galvanic corrosion (Al-Cu cell) in the Al process is only one way and Al-Cu cell is from Al alloy (Al + 0.5%Cu) on Al bondpads. However, in the Cu process it may be from two ways and Al-Cu cell can be from both Al alloy (Al + 0.5%Cu) on Al bondpads and the Cu metal layer below the barrier metal Ta when Ta has weak points or pinhole. As such, the pinhole defects on Al bondpad caused by galvanic corrosion (Al-Cu cell) in the Cu process might be more serious than that in the Al process. In this paper, TEM is used for root cause identification. Based on the TEM results, galvanic corrosion was due to the weak point/pinhole at the Ta barrier metal layer and Al-Cu diffusion.

A Study on Non-Stick Aluminium Bondpads Due to Fluorine Contamination Using SEM, EDX, TEM, IC, AUGER, XPS and TOF-SIMS Techniques

2002 ◽  
Author(s):  
Y. N. Hua ◽  
S. Redkar ◽  
C. K. Lau ◽  
Z. Q. Mo
Keyword(s):  
New Products ◽  
Wafer Fabrication ◽  
Electrochemical Reactions ◽  
Assembly Process ◽  
Foam Material ◽  
Root Cause ◽  
Tof Sims ◽  
Induced Defects ◽  
Electrochemical Model

Abstract Fluorine contamination on Al bondpads will result in corrosion, affect quality of bondpads and pose problem such as non-stick on pad (NSOP) during wire bonding at assembly process. In this paper, a fluorine contamination case in wafer fabrication will be studied. Some wafers were reported to have bondpad discoloration and bonding problem at the assembly house. SEM, EDX, TEM, AES and IC techniques were employed to identify the root cause of the failure. Failure analysis results showed that fluorine contamination had caused bondpad corrosion and thicker native aluminium oxide, which had resulted in discolored bondpads and NSOP. It was concluded that fluorine contamination was not due to wafer fab process, but was due to the wafer packaging foam material. XPS/ESCA and TOF-SIMS advanced tools were used to study the chemical and physical failure mechanism of fluorine-induced defects. An unknown Al compound was found using XPS technique and identified it as [AlF6]3- using electrochemical theories and TOF-SIMS technique. This finding was very significance, as it helped developing a theoretical electrochemical model for fluorine-induced corrosion and helped understanding of the mechanism of fluorine-induced corrosion on aluminium bondpads. It was found that fluorine contamination had formed [AlF6]3-on the affected bondpads and it had caused further electrochemical reactions and formed some new products of (NH4)+ and OH-. Then [AlF6]3- and (NH4)+ ions combined and formed a corrosive complex compound, (NH4)3(AlF6), while the OH- reacted with Al and caused further corrosion.

A New Failure Analysis Flow of Gate Oxide Integrity Failure in Wafer Fabrication

2009 ◽  
Author(s):  
Hua Younan ◽  
Chu Susan ◽  
Gui Dong ◽  
Mo Zhiqiang ◽  
Xing Zhenxiang ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Gate Dielectric ◽  
Dielectric Breakdown ◽  
Defect Density ◽  
Gate Oxide ◽  
Oxide Thickness ◽  
Fault Isolation ◽  
Wafer Fabrication ◽  
Root Cause ◽  
Gate Oxide Integrity

Abstract As device feature size continues to shrink, the reducing gate oxide thickness puts more stringent requirements on gate dielectric quality in terms of defect density and contamination concentration. As a result, analyzing gate oxide integrity and dielectric breakdown failures during wafer fabrication becomes more difficult. Using a traditional FA flow and methods some defects were observed after electrical fault isolation using emission microscopic tools such as EMMI and TIVA. Even with some success with conventional FA the root cause was unclear. In this paper, we will propose an analysis flow for GOI failures to improve FA’s success rate. In this new proposed flow both a chemical method, Wright Etch, and SIMS analysis techniques are employed to identify root cause of the GOI failures after EFA fault isolation. In general, the shape of the defect might provide information as to the root cause of the GOI failure, whether related to PID or contamination. However, Wright Etch results are inadequate to answer the questions of whether the failure is caused by contamination or not. If there is a contaminate another technique is required to determine what the contaminant is and where it comes from. If the failure is confirmed to be due to contamination, SIMS is used to further determine the contamination source at the ppm-ppb level. In this paper, a real case of GOI failure will be discussed and presented. Using the new failure analysis flow, the root cause was identified to be iron contamination introduced from a worn out part made of stainless steel.

Advancement in Data Engineering and Feature Processing Workflow by Using Deep Learning Techniques for the Automation of ESP Failure Root Cause Analyses

2021 ◽  
Author(s):  
Saniya Karnik ◽  
Navya Yenuganti ◽  
Bonang Firmansyah Jusri ◽  
Supriya Gupta ◽  
Prasanna Nirgudkar ◽  
...  
Keyword(s):  
Deep Learning ◽  
Failure Analysis ◽  
Language Processing ◽  
Turnaround Time ◽  
Process Efficiency ◽  
Root Cause ◽  
Feature Processing ◽  
Learning Techniques ◽  
Electrical Submersible Pump ◽  
Root Cause Identification

Abstract Today, Electrical Submersible Pump (ESP) failure analysis is a tedious, human-intensive, and time-consuming activity involving dismantle, inspection, and failure analysis (DIFA) for each failure. This paper presents a novel artificial intelligence workflow using an ensemble of machine learning (ML) algorithms coupled with natural language processing (NLP) and deep learning (DL). The algorithms outlined in this paper bring together structured and unstructured data across equipment, production, operations, and failure reports to automate root cause identification and analysis post breakdown. This process will result in reduced turnaround time (TAT) and human effort thus drastically improving process efficiency.

Failure Analysis and Elimination of Galvanic Corrosion on Bondpads During Wafer Sawing

2000 ◽  
Author(s):  
Y. N. Hua ◽  
E. C. Low ◽  
L. H. An ◽  
Shailesh Redkar
Keyword(s):  
Failure Analysis ◽  
Feed Rate ◽  
Galvanic Corrosion ◽  
Experimental Results ◽  
Metal Corrosion ◽  
Wafer Fabrication ◽  
Al Alloy ◽  
Assembly Process ◽  
Water Problem ◽  
Sawing Process

Abstract In our previous paper [1], discolored bondpads due to galvanic corrosion were studied. The results showed that the galvanic corrosion occurred in 0.8 ìm wafer fabrication (fab) process with cold Al alloy (Al-Si, 0.8 wt%-Cu, 0.5 wt%) metallization. Galvanic corrosion is also known as a two-metal corrosion and it could be due to either wafer fab process or assembly process. Our initial suspicion was that it was due to a DI water problem during wafer sawing at assembly process. After that, we did further failure analysis and investigation work on galvanic corrosion of bondpads and further found that galvanic corrosion might be due to longer rinsing time of DI water during wafer sawing. The rinsing time of DI water is related to the cutting time of wafer sawing. Therefore, some experiments of wafer sawing process were done by using different sizes of wafer (1/8 of wafer, a quadrant of wafer and whole of wafer) and different sawing speed (feed-rate). The results showed that if the cutting time was longer than 25 minutes, galvanic corrosion occurred on bondpads. However, if the cutting time was shorter than 25 minutes, galvanic corrosion was eliminated. Based on the experimental results, it is concluded that in order to prevent galvanic corrosion of bondpads, it is necessary to select higher feed-rate during wafer sawing process at assembly houses. In this paper, we will report the details of failure analysis and simulation experimental results, including the solution to eliminate galvanic corrosion of bondpads during wafer sawing at assembly houses.

An Application of Breakthrough Failure Analysis Techniques in Eliminating Silicon Dislocation Problem in Sub-Micron CMOS Devices

1997 ◽  
Author(s):  
E. H. Yeoh ◽  
W. M. Mak ◽  
H. C. Lock ◽  
S. K. Sim ◽  
C. C. Ooi ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Failure Mechanism ◽  
Packing Density ◽  
Failure Mechanisms ◽  
Potential Solution ◽  
Critical Dimensions ◽  
Functional Failure ◽  
Analysis Techniques ◽  
Root Cause ◽  
First Time

Abstract As device interconnect layers increase and transistor critical dimensions decrease below sub-micron to cater for higher speed and higher packing density, various new and subtle failure mechanisms have emerged and are becoming increasingly prevalent. Silicon dislocation is a new failure mechanism that falls in this category and was for the first time, uncovered in submicron multilayered CMOS devices. This mechanism was responsible for a systematic yield problem; identified as the 'centre GFA wafer' functional failure problem. In this paper, several breakthrough failure analysis techniques used to narrow down and identify this new mechanism will be presented. Root cause determination and potential solution to this problem will also be discussed.

A Method to Enhance the Front-Side Lapping Process for Localisation of Sub-Surface Defect for Advanced Packages

2018 ◽  
Author(s):  
Sze Yee Tan ◽  
Chiu Soon Wong ◽  
Chea Wee Lo ◽  
Cin Sheng Goh
Keyword(s):  
Failure Analysis ◽  
Surface Defect ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Assembly Process ◽  
Front Side ◽  
Root Cause ◽  
The Common ◽  
Thinning Process ◽  
Non Destructive

Abstract In the back-end assembly process, all of the packages will be tested prior to disposition to the customers in order to filter out any device with failure. For a reject unit with an unknown failure mechanism, it will be subjected to a comprehensive failure analysis (FA) to identify the root cause of the failure. Non-destructive verification, following by front-side decapsulation and internal physical inspection is the common way to visualise and identify the physical defect that usually causes the failure of a device during the back-end assembly process. For certain failures, visualization of the defect might not be straight forward after the decapsulation because the defect may be embedded or buried underneath a layer or wedge bond on the die. In this case, a more complicated FA analysis flow which comprises various precision techniques such as parallel lapping, hotspot localisation and focused-ion-beam (FIB) analyses will be needed to thin down the top layer/wedge bond for a precise localisation of the defect prior to precision analysis by FIB. However, the process to thin down the top layer/wedge bond with an exposed die of a partially decapsulated package is a tricky job as artefacts such as crack/scratches on die are likely to be introduced during the process of polishing. Also it is relatively difficult to control the thickness and levelling of the top layer/wedge bond during the thinning process. In this work, we developed a method that allows the analyst to re-cap the partially decapped package, and also to precisely measure and thin down the top layer to an accuracy of less than < 2um without the introduction of artefacts.

Nanoprobing as an Essential and Fast Methodology in Identification of Failure’s Root Cause for Advanced Technology

2013 ◽  
Author(s):  
Yinzhe Ma ◽  
Chong Khiam Oh ◽  
Ohnmar Nyi ◽  
Chuan Zhang ◽  
Donald Nedeau ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Success Rate ◽  
Failure Mechanism ◽  
Turnaround Time ◽  
Advanced Technology ◽  
Electrical Behavior ◽  
Root Cause ◽  
Front End

Abstract This paper highlights the use of nanoprobing as a crucial and fast methodology for failure analysis (FA) in sub 20nm with an improved semi-auto nanoprobing system. Nanoprobing has the capability to localize as well as characterize the electrical behavior of the malfunctioning device for a better understanding of the failure mechanism. It provides a valuable guide to choose a proper physical FA technique to identify the root cause of the failure. This established methodology helps to accelerate the FA turnaround time and improve the success rate. Its application to a few of the front end of line and one back end of line issues is highlighted in the paper.

Failure Analysis Methodology on Systematic Missing Cu in RAM Due to Cu CMP

2014 ◽  
Author(s):  
Ghim Boon Ang ◽  
Changqing Chen ◽  
Hui Peng Ng ◽  
Alfred Quah ◽  
Angela Teo ◽  
...  
Keyword(s):  
Problem Solving ◽  
Failure Analysis ◽  
Failure Mechanism ◽  
Removal Rate ◽  
Deep Dive ◽  
The Real ◽  
Root Cause ◽  
Analysis Methodology ◽  
Strong Emphasis ◽  
Cu Cmp

Abstract This paper places a strong emphasis on the importance of applying Systematic Problem Solving approach and use of appropriate FA methods and tools to understand the “real” failure root cause. A case of wafer center cluster RAM fail due to systematic missing Cu was studied. It was through a strong “inquisitive” mindset coupled with deep dive problem solving that lead to uncover the actual root cause of large Cu voids. The missing Cu was due to large Cu void induced by galvanic effects from the faster removal rate during Cu CMP and subsequently resulted in missing Cu. This highlights that the FA analyst’s mission is not simply to find defects but also play a catalyst role in root cause/failure mechanism understanding by providing supporting FA evidence (electrically/ physically) to Fab.

MEMS Failure Analysis In Wafer Fabrication

2016 ◽  
Author(s):  
Hui Peng Ng ◽  
Angela Teo ◽  
Ghim Boon Ang ◽  
Alfred Quah ◽  
N. Dayanand ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Case Studies ◽  
Data Interpretation ◽  
Fault Isolation ◽  
Wafer Fabrication ◽  
Auger Analysis ◽  
Root Cause ◽  
Defect Site ◽  
Defect Localization ◽  
Cmos Chip

Abstract This paper discussed on how the importance of failure analysis to identify the root cause and mechanism that resulted in the MEMS failure. The defect seen was either directly on the MEMS caps or the CMOS integrated chip in wafer fabrication. Two case studies were highlighted in the discussion to demonstrate how the FA procedures that the analysts had adopted in order to narrow down to the defect site successfully on MEMS cap as well as on CMOS chip on MEMS package units. Besides the use of electrical fault isolation tool/technique such as TIVA for defect localization, a new physical deprocessing approach based on the cutting method was performed on the MEMS package unit in order to separate the MEMS from the Si Cap. This approach would definitely help to prevent the introduction of particles and artifacts during the PFA that could mislead the FA analyst into wrong data interpretation. Other FA tool such as SEM inspection to observe the physical defect and Auger analysis to identify the elements in the defect during the course of analysis were also documented in this paper.

Sign in / Sign up

Export Citation Format

Share Document