scholarly journals Improvement of Electrical Performance in Heterostructure Junctionless TFET Based on Dual Material Gate

2019 ◽  
Vol 10 (1) ◽  
pp. 126 ◽  
Author(s):  
Haiwu Xie ◽  
Hongxia Liu ◽  
Shulong Wang ◽  
Shupeng Chen ◽  
Tao Han ◽  
...  
Keyword(s):  
Superior Performance ◽  
Electrical Performance ◽  
Metallic Material ◽  
Analog Performance ◽  
Drain Region ◽  
Source Voltage ◽  
Effect Transistor ◽  
Tunnel Field Effect Transistor ◽  
Rf Performance ◽  
Dual Material

In this paper, a dual metallic material gate heterostructure junctionless tunnel field-effect transistor (DMMG-HJLTFET) is proposed and investigated. We use the Si/SiGe heterostructure at the source/channel interface to improve the band to band tunneling (BTBT) rate, and introduce a sandwich stack (GaAs/Si/GaAs) at the drain region to suppress the OFF-state current and ambiplolar current. Simultaneously, to further decrease ambipolar current, the gate electrode is divided into three parts namely auxiliary gate (M1), control gate (M2), and tunnel gate (M3) with workfunctions ΦM1, ΦM2 and ΦM3, respectively, where ΦM1 = ΦM3 < ΦM2. Simulation results indicate that DMMG-HJLTFET provides superior performance in terms of logic and analog/RF as compared with other possible combinations, the ON-state current of the DMMG-HJLTFET increases up to 9.04 × 1 0 − 6 A/μm, and the maximum gm (which determine the analog performance of devices) of DMMG-HJLTFET is 1.11 × 1 0 − 5 S/μm at 1.0V drain-to-source voltage (Vds). Meanwhile, RF performance of devices depends on the cut-off frequency (fT) and gain bandwidth (GBW), and DMMG-HJLTFET could achieve a maximum fT of 5.84 GHz, and a maximum GBW of 0.39 GHz, respectively.

scholarly journals Study of a Gate-Engineered Vertical TFET with GaSb/GaAs0.5Sb0.5 Heterojunction

Materials ◽  
2021 ◽  
Vol 14 (6) ◽  
pp. 1426
Author(s):  
Haiwu Xie ◽  
Yanning Chen ◽  
Hongxia Liu ◽  
Dan Guo
Keyword(s):  
Field Effect Transistor ◽  
Performance Enhancement ◽  
Source Region ◽  
Gain Bandwidth ◽  
Source Voltage ◽  
Effect Transistor ◽  
Work Functions ◽  
Tunnel Field Effect Transistor ◽  
And Control ◽  
Dual Material

It is well known that the vertical tunnel field effect transistor (TFET) is easier to fabricate than the conventional lateral TFETs in technology. Meanwhile, a lightly doped pocket under the source region can improve the subthreshold performance of the vertical TFETs. This paper demonstrates a dual material gate heterogeneous dielectric vertical TFET (DMG-HD-VTFET) with a lightly doped source-pocket. The proposed structure adopts a GaSb/GaAs0.5Sb0.5 heterojunction at the source and pocket to improve the band-to-band tunneling (BTBT) rate; at the same time, the gate electrode is divided into two parts, namely a tunnel gate (M1) and control gate (M2) with work functions ΦM1 and ΦM2, where ΦM1 > ΦM2. In addition, further performance enhancement in the proposed device is realized by a heterogeneous dielectric corresponding to a dual material gate. Simulation results indicate that DMG-HD-VTFET and HD-VTFET possess superior metrics in terms of DC (Direct Current) and RF (Radio Frequency) performance as compared with conventional VTFET. As a result, the ON-state current of 2.92 × 10−4 A/μm, transconductance of 6.46 × 10−4 S/μm, and average subthreshold swing (SSave) of 18.1 mV/Dec at low drain voltage can be obtained. At the same time, DMG-HD-VTFET could achieve a maximum fT of 459 GHz at 0.72 V gate-to-source voltage (Vgs) and a maximum gain bandwidth (GBW) of 35 GHz at Vgs = 0.6 V, respectively. So, the proposed structure will have a great potential to boost the device performance of traditional vertical TFETs.

scholarly journals Design and Investigation of a Dual Material Gate Arsenic Alloy Heterostructure Junctionless TFET with a Lightly Doped Source

2019 ◽  
Vol 9 (19) ◽  
pp. 4104 ◽  
Author(s):  
Haiwu Xie ◽  
Hongxia Liu ◽  
Shupeng Chen ◽  
Tao Han ◽  
Shulong Wang
Keyword(s):  
Integrated Circuit ◽  
Lattice Mismatch ◽  
Ultra Low Power ◽  
Maximum Cut ◽  
Novel Structure ◽  
Power Integrated Circuit ◽  
Polarization Electric Field ◽  
Source Voltage ◽  
Rf Performance ◽  
Dual Material

This paper designs and investigates a novel structure of dual material gate-engineered heterostructure junctionless tunnel field-effect transistor (DMGE-HJLTFET) with a lightly doped source. Similar to the conventional HJLTFET, the proposed structure still adopts an InAs/GaAs0.1Sb0.9 heterojunction at source and channel interface and employs a polarization electric field at the arsenic heterojunction induced by the lattice mismatch in the InAs and GaAs0.1Sb0.9 zinc blende crystal to improve band to band tunneling (BTBT) current. However, the gate electrode is divided into three parts in DMGE-HJLTFET namely the auxiliary gate (M1), control gate (M2) and tunnel gate (M3) with workfunctions ΦM1, ΦM2 and ΦM3, where ΦM1 = ΦM3 < ΦM2, which not only improves ON-state current but also decreases the OFF-state current. In addition, a lightly doped source is used to further decrease the OFF-state current of this device. Simulation results indicate that DMGE-HJLTFET provides superior metrics in terms of logic and analog/radio frequency (RF) performance as compared with conventional HJLTFET, the maximum ON-state current and transconductance of the DMGE-HJLTFET increases up to 5.46 × 10−4 A/μm and 1.51 × 10−3 S/μm at 1.0 V drain-to-source voltage (Vds). Moreover, average subthreshold swing (SSave) of DMGE-HJLTFET is as low as 15.4 mV/Dec at low drain voltages. Also, DMGE-HJLTFET could achieve a maximum cut-off frequency (fT) of 423 GHz at 0.92 V gate-to-source voltage (Vgs) and a maximum gain bandwidth (GBW) of 82 GHz at Vgs = 0.88 V, respectively. Therefore, it has great potential in future ultra-low power integrated circuit applications.

scholarly journals High Performance Drain Engineered InGaN Heterostructure Tunnel Field Effect Transistor

Micromachines ◽  
2019 ◽  
Vol 10 (1) ◽  
pp. 75 ◽  
Author(s):  
Xiaoling Duan ◽  
Jincheng Zhang ◽  
Jiabo Chen ◽  
Tao Zhang ◽  
Jiaduo Zhu ◽  
...  
Keyword(s):  
Energy Band ◽  
Field Effect ◽  
High Performance ◽  
Field Effect Transistor ◽  
Energy Band Structure ◽  
Drain Region ◽  
Effect Transistor ◽  
Tunnel Field Effect Transistor ◽  
Silvaco Atlas ◽  
Channel Region

A drain engineered InGaN heterostructure tunnel field effect transistor (TFET) is proposed and investigated by Silvaco Atlas simulation. This structure uses an additional metal on the drain region to modulate the energy band near the drain/channel interface in the drain regions, and increase the tunneling barrier for the flow of holes from the conduction band of the drain to the valence band of the channel region under negative gate bias for n-TFET, which induces the ambipolar current being reduced from 1.93 × 10−8 to 1.46 × 10−11 A/μm. In addition, polar InGaN heterostructure TFET having a polarization effect can adjust the energy band structure and achieve steep interband tunneling. The average subthreshold swing of the polar drain engineered heterostructure TFET (DE-HTFET) is reduced by 53.3% compared to that of the nonpolar DE-HTFET. Furthermore, ION increases 100% from 137 mA/mm of nonpolar DE-HTFET to 274 mA/mm of polar DE-HTFET.

scholarly journals Demonstration of Fin-Tunnel Field-Effect Transistor with Elevated Drain

Micromachines ◽  
2019 ◽  
Vol 10 (1) ◽  
pp. 30 ◽  
Author(s):  
Jang Hyun Kim ◽  
Hyun Woo Kim ◽  
Garam Kim ◽  
Sangwan Kim ◽  
Byung-Gook Park
Keyword(s):  
Computer Aided Design ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Electrical Performance ◽  
Control Group ◽  
Effect Transistor ◽  
Tunnel Field Effect Transistor ◽  
Tcad Simulation ◽  
High Level ◽  
Aided Design

In this paper, a novel tunnel field-effect transistor (TFET) has been demonstrated. The proposed TFET features a SiGe channel, a fin structure and an elevated drain to improve its electrical performance. As a result, it shows high-level ON-state current (ION) and low-level OFF-state current (IOFF); ambipolar current (IAMB). In detail, its ION is enhanced by 24 times more than that of Si control group and by 6 times more than of SiGe control group. The IAMB can be reduced by up to 900 times compared with the SiGe control group. In addition, technology computer-aided design (TCAD) simulation is performed to optimize electrical performance. Then, the benchmarking of ON/OFF current is also discussed with other research group’s results.

scholarly journals Study And Investigation of Silicon Extended Source Vertical Double Gate Tunnel Transistor For Analog/RF Performance

2021 ◽  
Author(s):  
omendra Kumar singh ◽  
D Vaithiyanathan ◽  
Baljit Kaur
Keyword(s):  
Structural Parameters ◽  
Source Region ◽  
Cutoff Frequency ◽  
Double Gate ◽  
Carrier Injection ◽  
Extended Source ◽  
Effect Transistor ◽  
Tunnel Field Effect Transistor ◽  
Rf Performance ◽  
Silvaco Atlas

Abstract In this paper, a Silicon Double Gate tunnel field effect transistor with Extended Source (ESVDG-TFET) is disclosed while addressing the need for dc/switching and analog/RF applications using Silvaco-Atlas simulator which is used to examine and explore the performance of the proposed device. The mechanics of band-to-band tunnelling and accompanying carrier injection are used to illustrate the operation of the proposed silicon ESVDG-TFET device. The gate is designed to overlap with extended source region along with N+ pockets and channel in order to facilitate both the lateral and vertical tunnelling . The silicon ESVDG-TFET provide lower subthreshold swing of 10.1 mV/decade that allow higher ratio of ION / IOFF of 1013 for optimized device structural parameters with threshold voltage of 0.35 V. Moreover, peak transconductance of 800 uS/ um, cutoff frequency of 82 GHz, gain bandwidth product of 16.8 GHz and transit time of 1p sec is obtained by proposed device.

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