scholarly journals A Study on the Pattern Effects of Chemical Mechanical Planarization with CNN-Based Models

Electronics ◽  
2020 ◽  
Vol 9 (7) ◽  
pp. 1158
Author(s):  
Han Bao ◽  
Lan Chen ◽  
Bowen Ren
Keyword(s):  
Neural Network ◽  
Integrated Circuits ◽  
Surface Morphology ◽  
Chemical Mechanical Polishing ◽  
Chemical Mechanical Planarization ◽  
Important Process ◽  
Chip Surface ◽  
Atomic Force ◽  
Test Chips ◽  
Cmp Model

Chemical mechanical polishing (CMP) has become one of the most important process stages in the fabrication of advanced integrated circuits (IC). The CMP pattern effect strongly influences the planarization of the chip surface morphology after CMP, degrading the performance and the yield of the circuits. In this paper, we introduce a method to predict the post-CMP surface morphology with a convolutional neural network (CNN)-based CMP model. Then, CNN-based, density step height (DSH)-based, and common neural-network-based CMP models are built to compare the accuracy of the predictions. The test chips are designed and taped out and the predictions of the three models are compared with experimental results measured by an atomic force profiler (AFP) and scanning electron microscope (SEM). The results show that CNN-based CMP models have better accuracy by taking advantage of the CNN networks to extract features from images instead of the traditional equivalent pattern parameters. The effective planarization length (EPL) is introduced and defined to make better predictions with real-time CMP models and in dummy filling tasks. Experiments are designed to show a method to solve the EPL.

scholarly journals Chemical Mechanical Polishing of GaSb Wafers for Significantly Improved Surface Quality

2021 ◽  
Vol 8 ◽  
Author(s):  
Bing Yan ◽  
Hongyu Liang ◽  
Yongfeng Liu ◽  
Weihua Liu ◽  
Wenhui Yuan ◽  
...  
Keyword(s):  
Molecular Beam Epitaxy ◽  
Surface Morphology ◽  
Surface Quality ◽  
Chemical Mechanical Polishing ◽  
Molecular Beam ◽  
Gallium Antimonide ◽  
Mechanical Polishing ◽  
High Quality ◽  
X Ray ◽  
Atomic Force

Gallium antimonide (GaSb) is considered an ideal substrate for heterostructure growth via molecular beam epitaxy. A significant aspect that inhibits the widespread application of infrared plane-array detector growth on GaSb is the starting substrate surface quality. In this study, the chemical mechanical polishing of GaSb wafers is investigated by considering the effects of the polishing pad, polishing solution, polishing time and pH buffer on their surface morphology and roughness. The surface morphology and root mean square (RMS) roughness of the free-standing wafers are characterized using a white light interferometer, a laser interferometer and an atomic force microscope. X-ray tomography is employed to measure the surface crystalline quality and strain defects of the samples subjected to the polishing treatments. The results show that with the optimum polishing condition, the polished GaSb wafers demonstrate high-quality surfaces without haze, scratches or strain defect regions. The peak to valley value is 5.0 μm and the RMS roughness can be controlled at less than 0.13 nm. A buffer layer grown on the GaSb surface with molecular beam epitaxy is examined via atomic force microscopy and high-resolution X-ray diffraction, which show a low RMS roughness of 0.159 nm, a well-controlled two-dimensional growth mode and a full width half maximum of the Bragg diffraction peak of 14.2”, indicating high-quality GaSb wafers. Thus, this work provides useful guidelines for achieving GaSb wafers with high-quality surfaces that show significant promise for substrate applications.

Nanotopography Issues in Shallow Trench Isolation CMP

MRS Bulletin ◽  
2002 ◽  
Vol 27 (10) ◽  
pp. 761-765 ◽  
Author(s):  
Duane Boning ◽  
Brian Lee
Keyword(s):  
Integrated Circuits ◽  
Chemical Mechanical Planarization ◽  
Surface Films ◽  
Small Surface ◽  
Shallow Trench Isolation ◽  
Important Concern ◽  
Trench Isolation ◽  
Time Required ◽  
Nitride Layers ◽  
Cmp Model

AbstractAs advancing technologies increase the demand for planarity in integrated circuits, nanotopography has emerged as an important concern in shallow trench isolation (STI) on wafers polished by means of chemical–mechanical planarization (CMP). Previous work has shown that nanotopography—small surface-height variations of 10–100 nm in amplitude extending across millimeter-scale lateral distances on virgin wafers—can result in CMP-induced localized thinning of surface films such as the oxides or nitrides used in STI. A contact-wear CMP model can be employed to produce maps of regions on a given starting wafer that are prone to particular STI failures, such as the lack of complete clearing of the oxide in low spots and excessive erosion of nitride layers in high spots on the wafer. Stiffer CMP pads result in increased nitride thinning. A chip-scale pattern-dependent CMP simulation shows that substantial additional dishing and erosion occur because of the overpolishing time required due to nanotopography. Projections indicate that nanotopography height specifications will likely need to decrease in order to scale with smaller feature sizes in future IC technologies.

Chemical Mechanical Polishing Friction Measurements With Silica Atomic Force Microscope Tips

2007 ◽  
Author(s):  
Joo Hoon Choi ◽  
Yangro Lee ◽  
Louis E. DeMarco ◽  
Richard T. Leveille ◽  
Joseph A. Levert ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Atomic Force Microscope ◽  
Chemical Mechanical Polishing ◽  
Surface Damage ◽  
Mechanical Polishing ◽  
Radius Of Curvature ◽  
Liquid Environment ◽  
Atomic Force ◽  
Friction Measurements ◽  
Circuit Components

The feature sizes on Integrated Circuits (ICs) continue to decrease to provide higher device densities and smaller chip designs. To accomplish this, current fabrication and processing technology must be advanced to achieve these goals. In particular, Chemical Mechanical Polishing (CMP), which is used for planarization of wafers and logic circuit components during IC fabrication, can cause severe surface damage to components in the form of delamination or distortion of surface features. CMP utilizes polishing particles suspended between a polymeric pad and the substrate to be polished. To control the process with higher precision the fundamentals of friction between CMP surfaces need to be analyzed. To investigate the friction contributions of the polishing particles in the CMP process, individual CMP abrasive particles are modeled by a silica atomic force microscope (AFM) probe with a radius of curvature on the order of 200 nm that is utilized in a scanning probe microscope (SPM). Lateral forces are measured that occur in simulated polishing of silica substrates and polyurethane pad material in a liquid environment. Results are obtained as a function of pH and environment and are compared with macroscopic friction results obtained using a high precision tribometer with a glass ball.

The Integration of Interlayer Dielectric Deposition and Chemical Mechanical Polishing

1997 ◽  
Vol 477 ◽  
Author(s):  
Anda McAfee ◽  
Daniel A. Koos ◽  
Stephen mcArdle ◽  
Mercedes Jacobs ◽  
Robert Hiatt
Keyword(s):  
Photoelectron Spectroscopy ◽  
Chemical Mechanical Polishing ◽  
Mechanical Polishing ◽  
Important Process ◽  
Interlayer Dielectric ◽  
X Ray ◽  
Force Microscopy ◽  
Interfacial Delamination ◽  
Atomic Force ◽  
Process Issue

ABSTRACTThis paper addresses an important process issue in tie integration of chemical mechanical polishing (CMP) with interlayer dielectric (ILD) deposition for advanced back end processing. Gap fill between metal lines is achieved by using a dep-etch-dep technique for the tetraethylorthosilicate (TEOS) ILD deposition. The ILD layer is then planarized by CMP. Vias are etched through the ILD and filled with tungsten plugs in a blanket tungsten deposition and tungsten CMP sequence. Delamination has been observed at the interface between the TEOS layers following the blanket tungsten deposition and before or during tungsten CMP. The weak interface between the TEOS layers was found to be the result of residual carbon and fluorine from the tetraflouromethane (CF4) doped etch process. The interface between the TEOS layers was examined using X-ray photoelectron spectroscopy (XPS) and atomic force microscopy (AFM). Experiments were carried out to determine if the residue and subsequent delamination could be eliminated by modifying the dep-etch-dep process. An improved process was identified and has been implemented on a 0.5μm CMOS and mixed-mode BiCMOS production line with no subsequent occurrence of interfacial delamination.

Reactive Ion Etching Parameter Effect on Aluminum Bond Pad Surface Morphology

2014 ◽  
Vol 925 ◽  
pp. 140-143
Author(s):  
Moganraj Palianysamy ◽  
Zaliman Sauli ◽  
Uda Hashim ◽  
Vithyacharan Retnasamy ◽  
Steven Taniselass ◽  
...  
Keyword(s):  
Experimental Study ◽  
Surface Roughness ◽  
Surface Morphology ◽  
Gas Flow ◽  
Reactive Ion Etching ◽  
Important Process ◽  
Ion Etching ◽  
Argon Gas ◽  
Atomic Force ◽  
Surface Morphologies

Reactive Ion Etching (RIE) is an important process in fabrication of semiconductor devices. Design Of Experiment (DOE) has been used to study the effect of Reactive Ion Etch (RIE) towards surface morphology of aluminum bond pad. Important RIE factors involved in this experimental study are ratio of Tetrafluoromethane (CF4), Argon gas flow, BIAS, and ICP power. Different combinations of these factors produces different results of surface morphologies which was obtained using Atomic Force Microscopic (AFM). Produced results shows that overall surface roughness of the pad is affected by RIE and DOE offers a better way to optimize the desired outcome.

Effect of Citric Acid in Chemical Mechanical Polishing (CMP) for Lithium Tantalate (LiTaO3) Wafer

2016 ◽  
Vol 1136 ◽  
pp. 305-310 ◽  
Author(s):  
Hyun Seop Lee
Keyword(s):  
Citric Acid ◽  
Integrated Circuits ◽  
Chemical Mechanical Polishing ◽  
Removal Rate ◽  
High Surface ◽  
Lithium Tantalate ◽  
Mechanical Polishing ◽  
High Surface Quality ◽  
Force Microscopy ◽  
Atomic Force

Lithium tantalate (LiTaO3) has piezoelectric, electro-optical and nonlinear optical characteristics, and a wide transparency range going from ultraviolet to infrared. It is desirable that LiTaO3 wafer was a smooth surface in order to function with good quality. Chemical mechanical polishing (CMP) has been used to planarize integrated circuits (ICs) or obtain a high surface quality of the substrates. This paper investigates the effect of citric acid as an additive in the slurry for LiTaO3 CMP. The roughness of the wafers was measured by an atomic force microscopy (AFM, XE-100) after polishing. The slurry, which contains citric acid as an additive, has a higher material removal rate and friction force than a slurry without an additive. After polishing, the surface roughness of the LiTaO3 wafer can be reduced down to 1.7Å of Ra.

Surface-particle interactions in the chemical mechanical polishing process

1997 ◽  
Vol 501 ◽  
Author(s):  
J. J. Adler ◽  
Y. I. Rabinovich ◽  
R. K. Singh ◽  
B. M. Moudgil
Keyword(s):  
Integrated Circuits ◽  
Chemical Mechanical Polishing ◽  
Difficult Problem ◽  
Mechanical Polishing ◽  
Particle Interactions ◽  
Force Microscopy ◽  
Atomic Force ◽  
Chemical Mechanical Polishing Process ◽  
Surface Particle ◽  
The Stability

ABSTRACTChemical mechanical polishing (CMP) is a critical step in the fabrication of integrated circuits. Each layer of deposited material must be planarized before the next layer of circuitry can be formed. In CMP, a chemically active solution is used to modify the substrate so that a particulate abrasive may polish more efficiently. Modification of the surface often requires high oxidizer concentrations or pH extremes. Under these circumstances the stability of the polishing slurry and prevention of particulate attachment to the substrate is a difficult problem. In this study, atomic force microscopy (AFM) has been used to directly measure the forces between surfaces that simulate those in CMP. Initial investigation has focused on modeling the polishing of tungsten interconnect material by alumina slurries at acidic pH and evaluating the role surfactants can play in the stabilization of the polishing slurry and CMP processes.

Reactive Ion Etching Parameter Effect on Aluminum Bond Pad Surface Morphology

2014 ◽  
Vol 925 ◽  
pp. 84-87
Author(s):  
Moganraj Palianysamy ◽  
Zaliman Sauli ◽  
Uda Hashim ◽  
Vithyacharan Retnasamy ◽  
Steven Taniselass ◽  
...  
Keyword(s):  
Experimental Study ◽  
Surface Roughness ◽  
Surface Morphology ◽  
Gas Flow ◽  
Reactive Ion Etching ◽  
Important Process ◽  
Ion Etching ◽  
Argon Gas ◽  
Atomic Force ◽  
Surface Morphologies

Reactive Ion Etching (RIE) is an important process in fabrication of semiconductor devices. Design Of Experiment (DOE) has been used to study the effect of Reactive Ion Etch (RIE) towards surface morphology of aluminum bond pad. Important RIE factors involved in this experimental study are ratio of Tetrafluoromethane (CF4), Argon gas flow, BIAS, and ICP power. Different combinations of these factors produces different results of surface morphologies which was obtained using Atomic Force Microscopic (AFM). Produced results shows that overall surface roughness of the pad is affected by RIE and DOE offers a better way to optimize the desired outcome.

Effect of Temperature on Defect Generation during Copper Chemical Mechanical Planarization

2005 ◽  
Vol 867 ◽  
Author(s):  
Subrahmanya Mudhivarthi ◽  
Parshuram Zantyea ◽  
Ashok Kumara ◽  
Jeung-Yeop Shim
Keyword(s):  
Atomic Force Microscopy ◽  
Integrated Circuits ◽  
Heat Generation ◽  
Chemical Mechanical Planarization ◽  
Effect Of Temperature ◽  
Force Microscopy ◽  
Atomic Force ◽  
Significant Process ◽  
Different Temperatures ◽  
Multi Level

AbstractChemical Mechanical Planarization (CMP) is the process of choice for planarization of the constituent layers of the Multi Level Metallization schemes in modern Integrated Circuits. Besides having a lot of advantages, copper CMP process still needs significant process control to eliminate defects such as delamination, microscratches, dishing, erosion etc. In this research, effect of heat generated at the interface on the generation of CMP defects has been investigated. CMP of blanket and patterned samples has been carried out at two conditions of pressure x velocity values with varying slurry temperature. Post CMP metrology is carried out using Atomic force microscopy (AFM) in order to characterize the variation in scratch depth, dishing profile and non-uniformity in step coverage. Pictures of the patterned samples polished at different temperatures are captured using Optical Microscopy (OM) to study the dishing and dissolution of copper lines in greater detail. The primary goal of this study was to gain deeper understanding of the effect of heat generation and rise in temperature at the pad-wafer-slurry interface on CMP induced defectivity.

Fault Localization in Contact Level by Using Conductive Atomic Force Microscopy

2003 ◽  
Author(s):  
Jon C. Lee ◽  
J. H. Chuang
Keyword(s):  
Atomic Force Microscopy ◽  
Integrated Circuits ◽  
Fault Localization ◽  
Electrical Characterization ◽  
Conductive Atomic Force Microscopy ◽  
Force Microscopy ◽  
Atomic Force ◽  
Optical Electron ◽  
Defect Isolation ◽  
Voltage Contrast

Abstract As integrated circuits (IC) have become more complicated with device features shrinking into the deep sub-micron range, so the challenge of defect isolation has become more difficult. Many failure analysis (FA) techniques using optical/electron beam and scanning probe microscopy (SPM) have been developed to improve the capability of defect isolation. SPM provides topographic imaging coupled with a variety of material characterization information such as thermal, magnetic, electric, capacitance, resistance and current with nano-meter scale resolution. Conductive atomic force microscopy (C-AFM) has been widely used for electrical characterization of dielectric film and gate oxide integrity (GOI). In this work, C-AFM has been successfully employed to isolate defects in the contact level and to discriminate various contact types. The current mapping of C-AFM has the potential to identify micro-leaky contacts better than voltage contrast (VC) imaging in SEM. It also provides I/V information that is helpful to diagnose the failure mechanism by comparing I/V curves of different contact types. C-AFM is able to localize faulty contacts with pico-amp current range and to characterize failure with nano-meter scale lateral resolution. C-AFM should become an important technique for IC fault localization. FA examples of this technique will be discussed in the article.

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