scholarly journals Theoretical and Experimental Study of 13.4 kV/55 A SiC PiN Diodes with an Improved Trade-Off between Blocking Voltage and Differential On-Resistance

Materials ◽  
2019 ◽  
Vol 12 (24) ◽  
pp. 4186
Author(s):  
Yuewei Liu ◽  
Ruixia Yang ◽  
Yongwei Wang ◽  
Zhiguo Zhang ◽  
Xiaochuan Deng
Keyword(s):  
Breakdown Voltage ◽  
Figure Of Merit ◽  
Pin Diode ◽  
Potential Candidate ◽  
Device Structure ◽  
Pin Diodes ◽  
Trade Off ◽  
Blocking Voltage ◽  
Process Complexity ◽  
A Current

In this paper, a 13.4 kV/55 A 4H-silicon carbide (SiC) PiN diode with a better trade-off between blocking voltage, differential on-resistance, and technological process complexity has been successfully developed. A multiple zone gradient modulation field limiting ring (MGM-FLR) for extremely high-power handling applications was applied and investigated. The reverse blocking voltage of 13.4 kV, close to 95% of the theoretical value of parallel plane breakdown voltage, was obtained at a leakage current of 10 μA for a 100 μm thick, lightly doped, 5 × 1014 cm−3 n-type SiC epitaxial layer. Meanwhile, a fairly low differential on-resistance of 2.5 mΩ·cm2 at 55 A forward current (4.1 mΩ·cm2 at a current density of 100 A/cm2) was calculated for the fabricated SiC PiN with 0.1 cm2 active area. The highest Baliga’s figure-of-merit (BFOM) of 72 GW/cm2 was obtained for the fabricated SiC PiN diode. Additionally, the dependence of the breakdown voltage on transition region width, number of rings in each zone, as well as the junction-to-ring spacing of SiC PiN diodes is also discussed. Our findings indicate that this proposed device structure is one potential candidate for an ultra-high voltage power system, and it represents an option to maximize power density and reduce system complexity.

scholarly journals Investigation of 3.3 kV 4H-SiC DC-FSJ MOSFET Structures

Micromachines ◽  
2021 ◽  
Vol 12 (7) ◽  
pp. 756
Author(s):  
Chia-Yuan Chen ◽  
Yun-Kai Lai ◽  
Kung-Yen Lee ◽  
Chih-Fang Huang ◽  
Shin-Yi Huang
Keyword(s):  
Breakdown Voltage ◽  
Epitaxial Layer ◽  
Computer Aided Design ◽  
Figure Of Merit ◽  
Type Structure ◽  
Static Characteristics ◽  
Device Structure ◽  
P Type ◽  
Aided Design ◽  
A Current

This research proposes a novel 4H-SiC power device structure—different concentration floating superjunction MOSFET (DC-FSJ MOSFET). Through simulation via Synopsys Technology Computer Aided Design (TCAD) software, compared with the structural and static characteristics of the traditional vertical MOSFET, DC-FSJ MOSFET has a higher breakdown voltage (BV) and lower forward specific on-resistance (Ron,sp). The DC-FSJ MOSFET is formed by multiple epitaxial technology to create a floating P-type structure in the epitaxial layer. Then, a current spreading layer (CSL) is added to reduce the Ron,sp. The floating P-type structure depth, epitaxial layer concentration and thickness are optimized in this research. This structure can not only achieve a breakdown voltage over 3300 V, but also reduce Ron,sp. Under the same conditions, the Baliga Figure of Merit (BFOM) of DC-FSJ MOSFET increases by 27% compared with the traditional vertical MOSFET. Ron,sp is 25% less than that of the traditional vertical MOSFET.

High Current 6 kV 4H-SiC PiN Diodes for Power Module Switching Applications

2006 ◽  
Vol 527-529 ◽  
pp. 1355-1358 ◽  
Author(s):  
Brett A. Hull ◽  
Mrinal K. Das ◽  
Jim Richmond ◽  
Bradley Heath ◽  
Joseph J. Sumakeris ◽  
...  
Keyword(s):  
Pin Diode ◽  
High Current ◽  
Power Module ◽  
Temperature Dependent ◽  
Forward Voltage ◽  
Pin Diodes ◽  
Blocking Voltage ◽  
Chip Size ◽  
Switching Characteristics ◽  
Vf Drift

Forward voltage (VF) drift, in which a 4H-SiC PiN diode suffers from an irreversible increase in VF under forward current flow, continues to inhibit commercialization of 4H-SiC PiN diodes. We present our latest efforts at fabricating high blocking voltage (6 kV), high current (up to 50 A) 4H-SiC PiN diodes with the best combination of reverse leakage current (IR), forward voltage at rated current (VF), and VF drift yields. We have achieved greater than 60% total die yield onwafer for 50 A diodes with a chip size greater than 0.7 cm2. A comparison of the temperature dependent conduction and switching characteristics between a 50 A/6 kV 4H-SiC PiN diode and a commercially available 60 A/4.5 kV Si PiN diode is also presented.

Novel Advanced Analytical Design Tool for 4H-SiC VDMOSFET Devices

2017 ◽  
Vol 897 ◽  
pp. 529-532 ◽  
Author(s):  
Luigi di Benedetto ◽  
Gian Domenico Licciardo ◽  
Tobias Erlbacher ◽  
Anton J. Bauer ◽  
Alfredo Rubino
Keyword(s):  
Figure Of Merit ◽  
Gate Oxide ◽  
Design Tool ◽  
Oxide Semiconductor ◽  
Drift Region ◽  
Trade Off ◽  
Blocking Voltage ◽  
Wide Range ◽  
Source Voltage ◽  
Effect Transistor

An analytical tool to design 4H-SiC power vertical Double-diffused Metal-Oxide-Semiconductor Field-Effect-Transistor is proposed. The model optimizes, in terms of the doping concentration in the Drift–region, the trade–off between the ON–resistance, RON, and the maximum blocking voltage, VBL, that is the Drain-Source voltage for which the avalanche breakdown appears at the p+–well/n-DRIFT junction together with the breakdown of the Gate oxide. Finding such trade-off means to maximize, Figure-Of-Merit. Our results are based on a novel full–analytical model of the electric field in the Gate oxide, EOX, whose generality is ensured by the absence of fitting and empirical parameters. Model results are successfully compared with 2D–simulations covering a wide range of device performances.

Single Photolithography/Implantation 120-Zone Junction Termination Extension for High-Voltage SiC Devices

2012 ◽  
Vol 717-720 ◽  
pp. 977-980 ◽  
Author(s):  
Megan Snook ◽  
Ty McNutt ◽  
Chris Kirby ◽  
Harold Hearne ◽  
Victor Veliadis ◽  
...  
Keyword(s):  
Breakdown Voltage ◽  
High Voltage ◽  
Cycle Time ◽  
Pin Diodes ◽  
Edge Termination ◽  
Comparable Performance ◽  
Process Complexity ◽  
Single Implant ◽  
The Ideal

The multi-zone junction termination extension (MJTE) is a widely used edge termination technique for achieving high voltage SiC devices. It is commonly implemented with multiple lithography and implantation events. In order to reduce process complexity, cycle time, and cost, a single photolithography and single implant MJTE technique has been successfully developed. The method utilizes a pattern of finely graduated oxide windows that filter the implant dose and create a graded MJTE in a single implant and single photolithography step. Based on this technique, 6 kV / 0.09 cm2 PiN diodes were fabricated utilizing a 120-zone single-implant JTE design. This novel single-implant MJTE design captures 93% of the ideal breakdown voltage and has comparable performance and yield to a baseline three implant process.

HIGH-VOLTAGE DIAMOND SCHOTTKY RECTIFIERS

2004 ◽  
Vol 14 (03) ◽  
pp. 872-878 ◽  
Author(s):  
W. HUANG ◽  
T. P. CHOW ◽  
J. YANG ◽  
J. E. BUTLER
Keyword(s):  
Breakdown Voltage ◽  
Voltage Drop ◽  
Schottky Diodes ◽  
Pin Diode ◽  
Switching Voltage ◽  
Thermal Limit ◽  
Schottky Rectifiers ◽  
Blocking Voltage ◽  
Schottky Rectifier ◽  
Lateral Structure

In this paper, we simulate and fabricate diamond schottky rectifiers. The growth rate of pure diamond single crystal epitaxial is from 0.5 up to 100μm/hr with boron doping concentration around 1 × 1014 cm -3 to 1 × 1016 cm -3. A "liftoff" technology is used to provide the wafer. Theoretical calculation indicates that the diamond shottky rectifier has a significant lower voltage drop than SiC schottky rectifier and comparable with SiC PiN diode with the blocking voltage higher than 10 kV. A maximum 50 kHz operating frequency at switching voltage 25 kV is shown based on thermal limit. Vertical structure devices with 70μm epi layer achieve 18 A/cm2 at 250°C at 7 V forward drop as shown with a breakdown voltage of only 600 V. A breakdown voltage of 8 kV at 100μm distance is recorded for lateral structure devices without ohmic contact (back to back Schottky diodes), 12.4 kV at 300μm distance.

6.5 kV 4H-SiC PiN Diodes without Bipolar Degradation

2017 ◽  
Vol 897 ◽  
pp. 435-438 ◽  
Author(s):  
Yuan Bu ◽  
Hiroyuki Yoshimoto ◽  
Kumiko Konishi ◽  
Akio Shima ◽  
Yasuhiro Shimamoto
Keyword(s):  
Breakdown Voltage ◽  
Basal Plane ◽  
Room Temperature ◽  
Test Results ◽  
Leakage Currents ◽  
Pin Diodes ◽  
Basal Plane Dislocation ◽  
Koh Etching ◽  
A Current ◽  
Free Area

We designed, fabricated and evaluated 6.5 kV SiC PiN diodes. In order to suppress process-induced basal plane dislocation (BPD) in SiC PiN diodes, we improved the fabrication processes. The Ir-Vr measurements showed that the breakdown voltage was over 9 kV at room temperature (25 °C). The leakage currents (Ileak) at 6.5 kV are as low as 5.9×10-6 mA/cm2 (25 °C) and 9.7×10-5 mA/cm2 (150 °C). The maximum recovery loss among our switching test results was 6.7 mJ at 150 °C, 60 A. Moreover, the diodes fabricated on BPD-free area are very stable during applying 20 A current for 8~1000 h. Photoluminescence (PL) observation and KOH etching indicated that no BPD generated during improved fabrication processes.

Investigation of Packaged High-Voltage 4H SiC pin Diodes in the 20-700 °C Temperature Range

2006 ◽  
Vol 527-529 ◽  
pp. 1375-1378 ◽  
Author(s):  
Mykola S. Boltovets ◽  
Volodymyr V. Basanets ◽  
Nicolas Camara ◽  
Valentyn A. Krivutsa ◽  
Konstantinos Zekentes
Keyword(s):  
Reverse Current ◽  
Pin Diode ◽  
Reverse Voltage ◽  
Pin Diodes ◽  
Effective Lifetime ◽  
Voltage Range ◽  
Temperature Range ◽  
Forward Current ◽  
Blocking Voltage ◽  
Region Length

The packaged microwave 4H SiC pin diode chips (with i-region length of 6 μm, mesa diameter of 80 μm and blocking voltage of 1000 V) were investigated. We studied the parameters of diode I−V curve (in particular, the diode resistance RS at forward current) and the processes of diode switching from forward current of 50 mA to reverse voltage of 15 V, as well as C−V curves, in the 20−700 °C temperature range. At a voltage of 300 V, the diode reverse current was 10 (180) μA when temperature was 600 (700) °C. At a forward current of 40 mA, the diode resistance first decreases smoothly as temperature is increased from 20 up to 300 °C, and then grows up. As temperature is increased from 20 up to 700 °C, the effective lifetime τeff grows from 7 up to 50 ns, while the diode capacitance (in the 0−40 V reverse voltage range) grows smoothly as temperature is increased from 20 up to 400 °C.

Influence of Anode Layout on the Performance of SiC JBS Diodes

2012 ◽  
Vol 717-720 ◽  
pp. 937-940 ◽  
Author(s):  
Rahul Radhakrishnan ◽  
Jian Hui Zhao
Keyword(s):  
Breakdown Voltage ◽  
Figure Of Merit ◽  
Honeycomb Structure ◽  
Feature Size ◽  
Trade Off ◽  
D Model

Various layouts of the anode of Junction Barrier Schottky (JBS) diodes are compared theoretically and it is found that the hexagonal honeycomb structure with 3-D symmetry offers the best figure of merit (FOM). Proportional relationships between the various layouts are reported, using which we extend a fully analytical 2-D model for reverse biased field shielding in a JBS diode to the superior 3-D layouts. The effect of reducing implanted feature size is also analyzed as a trade-off between FOM and breakdown voltage capability.

Lifetime Control in SiC PiN Diodes Using Radiation Defects

2017 ◽  
Vol 897 ◽  
pp. 463-466 ◽  
Author(s):  
Pavel Hazdra ◽  
Stanislav Popelka
Keyword(s):  
Electron Irradiation ◽  
Proton Irradiation ◽  
Deep Levels ◽  
Experimental Results ◽  
Pin Diode ◽  
Radiation Defects ◽  
Pin Diodes ◽  
Trade Off ◽  
Recovery Curves

Application of radiation defects for lifetime control in contemporary SiC PiN diodes was investigated using the calibrated device simulator ATLAS from Silvaco, Inc. Recombination models accounting for the effect of deep levels introduced by the irradiation were set according to experimental results obtained by C-V and DLTS measurements performed on low-doped n-type SiC epilayers irradiated with 4.5 MeV electrons and 670 keV protons. Global (4.5 MeV electron irradiation) and local (700 keV proton irradiation) lifetime reduction was then applied on the 2A/10kV SiC PiN diode and the ON-state and reverse recovery characteristics were simulated and compared. Results show that the proton irradiation can substantially improve the trade‑off between the diode ON‑state and turn‑OFF losses. Compared to the electron irradiation, the local lifetime killing by protons allows achieving better trade-off and softer recovery curves.

1.2 kV Pin Diodes with SiCrystal Epiwafer

2007 ◽  
Vol 556-557 ◽  
pp. 901-904
Author(s):  
Heu Vang ◽  
Christophe Raynaud ◽  
Pierre Brosselard ◽  
Mihai Lazar ◽  
Pierre Cremillieu ◽  
...  
Keyword(s):  
World Market ◽  
Substrate Material ◽  
Alternative Source ◽  
Pin Diodes ◽  
Blocking Voltage ◽  
Alternative Material ◽  
Market Leader ◽  
Source Materials ◽  
A Current

Silicon carbide devices limitations often originate from the quality of the substrate material. Therefore it is interesting to investigate devices fabricated on alternative source materials. Currently, CREE is the world market leader of SiC wafers. Nowadays, some new companies begin to propose alternative material. The European manufacturer SiCrystal furnishes now some epiwafers for the fabrication of 1,2kV devices. In this paper we present 4H-SiC 1.2 kV pin diodes with a JTE termination realized on a SiCrystal epiwafer. The devices exhibit a blocking voltage of 1.2 kV, a current density of 420 A.cm-2 and a specific differential series resistance of 4.4 m-⋅cm2. The yield of fabricated diodes with a breakdown voltage greater 600 V is superior to 75%.

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