scholarly journals Characterization of Electrical Traps Formed in Al2O3 under Various ALD Conditions

Materials ◽  
2020 ◽  
Vol 13 (24) ◽  
pp. 5809
Author(s):  
Md. Mamunur Rahman ◽  
Ki-Yong Shin ◽  
Tae-Woo Kim
Keyword(s):  
Leakage Current ◽  
Deposition Temperature ◽  
Fundamental Property ◽  
Frequency Dispersion ◽  
Atomic Layer ◽  
Oxide Semiconductor ◽  
Semiconductor Interface ◽  
Low Leakage ◽  
Low Leakage Current ◽  
Deposited Film

Frequency dispersion in the accumulation region seen in multifrequency capacitance–voltage characterization, which is believed to be caused mainly by border traps, is a concerning issue in present-day devices. Because these traps are a fundamental property of oxides, their formation is expected to be affected to some extent by the parameters of oxide growth caused by atomic layer deposition (ALD). In this study, the effects of variation in two ALD conditions, deposition temperature and purge time, on the formation of near-interfacial oxide traps in the Al2O3 dielectric are examined. In addition to the evaluation of these border traps, the most commonly examined electrical traps—i.e., interface traps—are also investigated along with the hysteresis, permittivity, reliability, and leakage current. The results reveal that a higher deposition temperature helps to minimize the formation of border traps and suppress leakage current but adversely affects the oxide/semiconductor interface and the permittivity of the deposited film. In contrast, a longer purge time provides a high-quality atomic-layer-deposited film which has fewer electrical traps and reasonable values of permittivity and breakdown voltage. These findings indicate that a moderate ALD temperature along with a sufficiently long purge time will provide an oxide film with fewer electrical traps, a reasonable permittivity, and a low leakage current.

High-Temperature Trench Capacitors, Using Thin-Film ALD Dielectrics

2015 ◽  
Vol 2015 (HiTEN) ◽  
pp. 000130-000133 ◽  
Author(s):  
Dorothee Dietz ◽  
Yusuf Celik ◽  
Andreas Goehlich ◽  
Holger Vogt ◽  
Holger Kappert
Keyword(s):  
High Temperature ◽  
Leakage Current ◽  
Automobile Industry ◽  
Elevated Temperatures ◽  
Atomic Layer ◽  
Operating Voltage ◽  
Low Leakage ◽  
Low Leakage Current ◽  
Layer Deposition ◽  
Soft Breakdown

High-temperature passive electronic becomes more and more important, e.g. in the field of deep drilling, aerospace or in automobile industry. For these applications, capacitors are needed, which are able to withstand temperatures up to 300 °C, which exhibit a low leakage current at elevated temperatures, a breakdown voltage above the intended operating voltage and a high capacitive density value. In this paper, investigations of 3D-integration and atomic layer deposition (ALD) techniques to achieve these features are presented. A highly n-doped Si-substrate acts as a bottom electrode. Medium- and high-k dielectrics represent the insulator and the upper electrode consists of Ru, TiN or TiAlCN. The materials can be used at elevated temperatures. At room temperature, the leakage current is less than 10 pA/mm2 without showing a soft-breakdown up to ± 15 V, indicating the absence of Fowler-Nordheim tunneling. At 300 °C and at 3 V the leakage current amounts about 1 nA/mm2 and at 5 V a soft-breakdown is detected.

Atomic layer deposition of gadolinium scandate films with high dielectric constant and low leakage current

2006 ◽  
Vol 89 (13) ◽  
pp. 133512 ◽  
Author(s):  
Kyoung H. Kim ◽  
Damon B. Farmer ◽  
Jean-Sebastien M. Lehn ◽  
P. Venkateswara Rao ◽  
Roy G. Gordon
Keyword(s):  
Dielectric Constant ◽  
Atomic Layer Deposition ◽  
Leakage Current ◽  
High Dielectric Constant ◽  
Atomic Layer ◽  
Low Leakage ◽  
Low Leakage Current ◽  
Layer Deposition ◽  
High Dielectric

scholarly journals A Transformer-Less Buck-Boost Grid-Tied Inverter with Low Leakage-Current and High Voltage-Gain

2021 ◽  
Vol 11 (8) ◽  
pp. 3625
Author(s):  
Chien-Hsuan Chang ◽  
Yi-Fan Chen
Keyword(s):  
Leakage Current ◽  
High Voltage ◽  
Input Voltage ◽  
Boost Converter ◽  
Oxide Semiconductor ◽  
Voltage Gain ◽  
Low Leakage ◽  
High Voltage Gain ◽  
Low Leakage Current ◽  
Circuit Structure

To improve the efficiency of photovoltaic (PV) grid-tied systems and simplify the circuit structure, many pseudo DC-link inverters have been proposed by combining a sinusoidal pulse-width modulation (SPWM) controlled buck-boost converter and a low-frequency polarity unfolder. However, due to the non-ideal characteristics of power diodes, the voltage-gain of a buck-boost converter is limited. To meet the needs of grid-connected systems with low input voltage and 220 Vrms utility, this paper uses two two-switch buck-boost converters with coupled inductors to develop a transformer-less buck-boost grid-tied inverter with low leakage-current and high voltage-gain. The proposed inverter is charging on the primary side of the coupled inductor and discharging in series on the primary side and the secondary side so that the voltage-gain can be greatly increased. Furthermore, the utility line can be connected to the negative end of the PV array to suppress leakage current, and the unfolding circuit can be simplified to reduce the conduction losses. High-frequency switching is only performed in one metal-oxide-semiconductor field-effect transistor (MOSFET) in each mode, which can effectively improve conversion efficiency. A prototype was implemented to obtain experimental results and to prove the validity of the proposed circuit structure.

Impact of atomic layer deposition temperature on HfO2/InGaAs metal-oxide-semiconductor interface properties

2012 ◽  
Vol 112 (8) ◽  
pp. 084103 ◽  
Author(s):  
Rena Suzuki ◽  
Noriyuki Taoka ◽  
Masafumi Yokoyama ◽  
Sang-Hyeon Kim ◽  
Takuya Hoshii ◽  
...  
Keyword(s):  
Atomic Layer Deposition ◽  
Metal Oxide ◽  
Deposition Temperature ◽  
Atomic Layer ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Interface Properties ◽  
Semiconductor Interface ◽  
Layer Deposition

Binary HfO2: SiO2 used as High-k Gate Oxide Material in Combinatorial Material Library Method

2005 ◽  
Vol 894 ◽  
Author(s):  
Wen-Hsuan Chao ◽  
Lih-Ping Wang ◽  
Shu-Huei Wang ◽  
Tien-Heng Huang ◽  
Ren-Jen Wu ◽  
...  
Keyword(s):  
Dielectric Constant ◽  
Electrical Properties ◽  
Leakage Current ◽  
Structural Characteristics ◽  
Rf Sputtering ◽  
Oxide Semiconductor ◽  
Oxide Material ◽  
Gate Oxides ◽  
Low Leakage ◽  
Low Leakage Current

AbstractHafnium silicates (HfO2:SiO2, HSO) have recently attracted much interest in the fields of fundamental science and technology because they have high dielectric constant and low leakage current. The structure and properties of HSO gate oxides were studied using a combinatorial continuous-compositional-spread method. HSO material libraries were synthesized on a 4-inch wafer at room temperature and at 200°C using a custom-built radio-frequency (RF) sputtering system. The electrical properties of HSO material libraries were measured using metal-oxide-semiconductor structure. X-ray diffraction (XRD) was utilized to characterize the structure and compositions of HSO material libraries. The effects of sputtering conditions on the properties of the HSO gate oxides were investigated. The dielectrics constants (εr) of HSO material libraries treated with rapid thermal annealing (600°C/1min/N2) were in the range 5∼23, as determined by C-V measurement, and the dielectric constant was observed to increase with HfO2 content. The I-V relations of the HSO material libraries indicate that the leakage current decreases as the amount of Si in the HSO films increases. The structural characteristics of HSO films with RTA treatment (1000°C/10sec/N2) varied from the amorphous to the crystalline state (tetragonal and monoclinic phase), according to the composition of material libraries. The correlation among the electrical properties, the composition and the crystal structure of the HSO films is discussed.

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