scholarly journals Design of a Linear LNA for 5G Applications using 45 nm Technology

2021 ◽  
Vol 20 ◽  
pp. 128-132
Author(s):  
Rashmi Hazarika ◽  
Manash Pratim Sharma
Keyword(s):  
Communication Systems ◽  
Noise Figure ◽  
Low Noise ◽  
Active Inductor ◽  
Output Stage ◽  
Common Gate ◽  
Noise Amplifier ◽  
Cost Efficient ◽  
The Stability ◽  
Gate Input

A low noise amplifier (LNA) plays a very significant role in communication systems. Despite having a good amplification of the signal it must offer other attributes like noise figure, linearity etc for making the communication system more robust. With the advent of 5G communication, the requirement of a high BW LNA is becoming important. This paper presents the design of a LNA which have a common gate input configuration, an active inductor in place of a passive inductor, common drain amplifier at the output stage and a linearity circuit. Common gate amplifier offers a good voltage amplification while the common drain stage enhances the stability. The active inductor facilitates reduction of the die area paving the way for a cost efficient structure. This proposed design achieves a gain of 15.17dB with substantial enhancement of linearity. A good noise figure of 7dB is obtained while using 11 transistors and eliminating the need of passive inductors. The peak gain is achieved at 3.5GHz

Design of 3.1-10.6GHz CMOS LNA Based on Input Matching Technique of Common-Gate Topology

2013 ◽  
Vol 479-480 ◽  
pp. 1014-1017
Author(s):  
Yi Cheng Chang ◽  
Meng Ting Hsu ◽  
Yu Chang Hsieh
Keyword(s):  
Noise Figure ◽  
Supply Voltage ◽  
Average Power ◽  
Wide Band ◽  
Low Noise ◽  
Input Matching ◽  
Common Gate ◽  
Cmos Lna ◽  
Noise Amplifier ◽  
Is Design

In this study, three stage ultra-wide-band CMOS low-noise amplifier (LNA) is presented. The UWB LNA is design in 0.18μm TSMC CMOS technique. The LNA input and output return loss are both less than-10dB, and achieved 10dB of average power gain, the minimum noise figure is 6.55dB, IIP3 is about-9.5dBm. It consumes 11mW from a 1.0-V supply voltage.

scholarly journals A 2.4 GHz low noise amplifier design at 130nm CMOS technology using common gate topology for WiFi / WiMAX application

2017 ◽  
Vol 7 (1.3) ◽  
pp. 69
Author(s):  
M. Ramana Reddy ◽  
N.S Murthy Sharma ◽  
P. Chandra Sekhar
Keyword(s):  
Noise Figure ◽  
Cmos Technology ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Low Power Consumption ◽  
Common Gate ◽  
Chip Size ◽  
Overall Performance ◽  
Amplifier Design ◽  
Noise Amplifier

The proposed work shows an innovative designing in TSMC 130nm CMOS technology. A 2.4 GHz common gate topology low noise amplifier (LNA) using an active inductor to attain the low power consumption and to get the small chip size in layout design. By using this Common gate topology achieves the noise figure of 4dB, Forward gain (S21) parameter of 14.7dB, and the small chip size of 0.26 mm, while 0.8mW power consuming from a 1.1V in 130nm CMOS gives the better noise figure and improved the overall performance.

scholarly journals Design of Low Power UWB CMOS Low Noise Amplifier using Active Inductor for WLAN Receiver

2018 ◽  
Vol 7 (2.24) ◽  
pp. 448
Author(s):  
S Manjula ◽  
M Malleshwari ◽  
M Suganthy
Keyword(s):  
Low Power ◽  
Noise Figure ◽  
Wide Band ◽  
Cmos Technology ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Design System ◽  
Active Inductor ◽  
Chip Area ◽  
Noise Amplifier

This paper presents a low power Low Noise Amplifier (LNA) using 0.18µm CMOS technology for ultra wide band (UWB) applications. gm boosting common gate (CG) LNA is designed to improve the noise performance.  For the reduction of on chip area, active inductor is employed at the input side of the designed LNA for input impedance matching. The proposed UWB LNA is designed using Advanced Design System (ADS) at UWB frequency of 3.1-10.6 GHz. Simulation results show that the gain of 10.74+ 0.01 dB, noise figure is 4.855 dB, input return loss <-13 dB and 12.5 mW power consumption.  

scholarly journals Design and Analysis High Gain PHEMT LNA for Wireless Application at 5.8 GHz

2015 ◽  
Vol 5 (3) ◽  
pp. 611
Author(s):  
Kamil Pongot ◽  
Abdul Rani Othman ◽  
Zahriladha Zakaria ◽  
Mohamad Kadim Suaidi ◽  
Abdul Hamid Hamidon ◽  
...  
Keyword(s):  
Return Loss ◽  
Noise Figure ◽  
High Gain ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Output Terminal ◽  
Wireless Application ◽  
Noise Amplifier ◽  
The Stability ◽  
Inductive Generation

This research present a design of a higher  gain (66.38dB) for PHEMT LNA  using an inductive drain feedback technique for wireless application at 5.8GHz. The amplifier it is implemented using PHEMT FHX76LP transistor devices.  The designed circuit is simulated with  Ansoft Designer SV.  The LNA was designed using  T-network as a matching technique was used at the input and output terminal,  inductive generation to the source and an inductive drain feedback. The  low noise amplifier (LNA) using lumped-component provides a noise figure 0.64 dB and a gain (S<sub>21</sub>) of 68.94 dB. The output reflection (S<sub>22</sub>), input reflection (S<sub>11</sub>) and return loss (S<sub>12</sub>) are -17.37 dB, -15.77 dB and -88.39 dB respectively. The measurement shows the  stability was at  4.54 and 3-dB bandwidth of 1.72 GHz. While, the  low noise amplifier (LNA) using  Murata manufactured component provides a noise figure 0.60 dB and a gain (S<sub>21</sub>) of 66.38 dB. The output reflection (S<sub>22</sub>), input reflection (S<sub>11</sub>) and return loss (S<sub>12</sub>) are -13.88 dB, -12.41 dB and -89.90 dB respectively. The measurement shows the  stability was at  6.81 and 3-dB bandwidth of 1.70 GHz. The input sensitivity more than -80 dBm  exceeded the standards required by IEEE 802.16.

Design of High Performance Low-Noise Amplifier Circuit Based on Complementary Metal Oxide Semiconductor Technology

2021 ◽  
Vol 16 (4) ◽  
pp. 559-564
Author(s):  
Chao Huang ◽  
Wan-Jun Yin
Keyword(s):  
Power Consumption ◽  
High Performance ◽  
Noise Figure ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Oxide Semiconductor ◽  
Input Device ◽  
Output Stage ◽  
Noise Amplifier ◽  
5 Ghz

This paper designs a body-biased (BB) differential cascode low-noise amplifier (LNA) with current bias (CR) and capacitor cross-coupling (CCC) technology that meets the bandwidth requirements of 5 GHz wireless applications. In the design, the CCC technology in the differential cascode topology is used to effectively suppress the common mode noise, thereby improving the noise figure. The series resonant network eliminates parasitic capacitance at the input and output ends, thereby improving the power transmission efficiency. The CR technology formed by the intermediate capacitor shares the DC current input to the output device, thereby increasing the gain. This paper uses BB technology in the design to lower the threshold of the cascode device and improve the transconductance, which further improves the gain and reduces the power consumption. The CCC technology used in the paper improves linearity by eliminating the non-linear components present in the input device, which will not interfere with the transconductance of the output stage. This article has obtained excellent performance parameters including gain, noise figure (NF) and linearity without affecting the power consumption, integration and cost of the proposed design.

A wideband CMOS single-ended low noise amplifier employing negative resistance technique

2018 ◽  
Vol 32 (06) ◽  
pp. 1850068 ◽  
Author(s):  
Benqing Guo ◽  
Hongpeng Chen ◽  
Xuebing Wang ◽  
Jun Chen ◽  
Yueyue Li ◽  
...  
Keyword(s):  
Power Dissipation ◽  
Noise Figure ◽  
Cmos Technology ◽  
Negative Resistance ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Common Gate ◽  
Noise Amplifier ◽  
Maximal Gain ◽  
Resistance Structure

A wideband common-gate CMOS low noise amplifier with negative resistance technique is proposed. A novel single-ended negative resistance structure is employed to improve gain and noise of the LNA. The inductor resonating is adopted at the input stage and load stage to meet wideband matching and compensate gain roll-off at higher frequencies. Implemented in a 0.18 [Formula: see text]m CMOS technology, the proposed LNA demonstrates in simulations a maximal gain of 16.4 dB across the 3 dB bandwidth of 0.2–3 GHz. The in-band noise figure of 3.4–4.7 dB is obtained while the IIP3 of 5.3–6.8 dBm and IIP2 of 12.5–17.2 dBm are post-simulated in the designed frequency band. The LNA core consumes a power dissipation of 3.8 mW under a 1.5 V power supply.

Performance of a Ferroelectric Tunable Pre-Select Filter/Low Noise Amplifier Hybrid Circuit

1999 ◽  
Vol 603 ◽  
Author(s):  
Guru Subramanyam ◽  
Felix A. Miranda ◽  
Robert R. Romanofsky ◽  
Fred Van Keuls ◽  
Chonglin Chen
Keyword(s):  
Strontium Titanate ◽  
Communication Systems ◽  
Satellite Communication ◽  
Noise Figure ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Band Pass Filter ◽  
Pass Filter ◽  
Noise Amplifier ◽  
Hybrid Circuit

AbstractIn this paper we discuss the performance of a proof-of-concept of a tunable band pass filter (BPF)/Low Noise Amplifier (LNA) hybrid circuit for a possible gain-compensated down-converter targeted for the next generation of K-band satellite communication systems. Electrical tunability of the filter is obtained through the nonlinear electric field dependence of the relative dielectric constant of a ferroelectric thin-film such as strontium titanate (SrTiO3) or barium strontium titanate (BaxSr1−xTiO3). Experimental results show that the BPFs are tunable by more than 5%, with a bipolar biasing scheme employed. The BPF/LNA tunable hybrid circuit was used to study the effect of tuning on the hybrid circuit's performance especially on the amplifier's noise-figure and the gain.

Design and Implementation of a Wideband C-Band LNA

2011 ◽  
Vol 130-134 ◽  
pp. 3272-3275
Author(s):  
Jian Ye Zhang ◽  
Ling Tian ◽  
Wei Hong ◽  
Jia Qi Liu
Keyword(s):  
Noise Figure ◽  
Low Noise ◽  
Broad Bandwidth ◽  
Design And Implementation ◽  
Matching Networks ◽  
Input And Output ◽  
Balanced Structure ◽  
Noise Amplifier ◽  
The Stability ◽  
Better Than

This paper presents the design and implementation of a C-band 6-8 GHz wideband low noise amplifier (LNA). The design is based on balanced structure. The compensated matching networks are designed to obtain gain flatness, two Wilkinson couplers are used to obtain good input and output VSWR, a section of microstrip line is introduced between the source and ground to improve the stability. The measured gain is 12±0.5 dB and noise figure is less than 1.5 dB, the input and output VSWR are better than 1.7. The LNA with broad bandwidth, flat gain, low noise figure and high stability can be used in wideband RF receivers.

Low-power CMOS LNA based on dual resistive-feedback structure with peaking inductor for wideband application

2013 ◽  
Vol 5 (1) ◽  
pp. 65-70 ◽  
Author(s):  
Meng-Ting Hsu ◽  
Shih-Yu Hsu ◽  
Yu-Hwa Lin
Keyword(s):  
Low Power ◽  
Noise Figure ◽  
Low Noise ◽  
Cmos Process ◽  
Output Stage ◽  
Chip Area ◽  
Inductive Peaking ◽  
Resistive Feedback ◽  
Low Power Cmos ◽  
Noise Amplifier

This paper presents a low-power and low-noise amplifier (LNA) with resistive-feedback configuration. The design consists of two resistive-feedback amplifiers. In order to reduce the chip area, a resistive-feedback inverter is adopted for input matching. The output stage adopts basic topology of an RC feedback for output matching, and adds two inductors for inductive peaking at the high band. The implemented LNA has a peak gain of 10.5 dB, the input reflection coefficient S11 is lower than −8 dB and the output reflection S22 is lower than −10.8 dB, and noise figure of 4.2–5.2 dB is between 1 and 10 GHz while consuming 12.65 mW from a 1.5 V supply. The chip area is only 0.69 mm2 and the figure of merit is 6.64 including the area estimation. The circuit was fabricated in a TSMC 0.18 um CMOS process.

scholarly journals Design of High Stability Factor Lna using Cascade Mosfet at 850MHz Rf Frequency

2019 ◽  
Vol 8 (3) ◽  
pp. 8925-8928
Keyword(s):  
High Stability ◽  
Noise Figure ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Front Panel ◽  
Stability Factor ◽  
Load Impedance ◽  
Amplifier Stage ◽  
Noise Amplifier ◽  
The Stability

Controlling noise is the primary effort in any amplifier. LNA (Low Noise Amplifier) will control the noise in front panel of amplifier stage as per FRISS law. Instead of single MOS in LNA , cascaded the MOS generates the stability factor in a better way in 850MHz RF frequency at load impedance of 50Ω. But additionally capacitor inserted cascaded MOS will pull down the stability factor. Cascasded MOS LNA have a stability factor of 1.387 and Noise Figure(dB) of 0.518

Sign in / Sign up

Export Citation Format

Share Document