Solder Paste Corrosivity Assesment: Bono Test

2015 ◽  
Vol 2015 (1) ◽  
pp. 000662-000668
Author(s):  
Céline Puechagut ◽  
Anne-Marie Laügt ◽  
Emmanuelle Guéné ◽  
Richard Anisko
Keyword(s):  
Corrosion Test ◽  
Lead Free ◽  
Test Surface ◽  
Solder Paste ◽  
Insulation Resistance ◽  
Electronic Assembly ◽  
Selective Method ◽  
Corrosion Tests ◽  
Surface Insulation Resistance ◽  
Common Process

Lead free soldering with no clean solder pastes represent nowadays the most common process in electronic assembly. A solder paste is usually considered as no-clean if it passes all IPC J-STD-004 corrosion tests: copper mirror, copper panel corrosion test, Surface Insulation Resistance (SIR) and Elecrochemical Migration (ECM). Other SIR and ECM tests are described in Bellcore GR-78-CORE and JIS Z3197 standards. Although SIR and ECM tests are recognized by all standards authorities to evaluate the solder paste residue corrosivity after reflow, a more selective method, the Bono test, has been developed and implemented in some French companies as a qualification criterion. It has been proven that compared to common corrosion tests, the Bono test better differentiates the nature of solder paste residues.

scholarly journals Eco-Friendly Lead-Free Solder Paste Printing via Laser-Induced Forward Transfer for the Assembly of Ultra-Fine Pitch Electronic Components

Materials ◽  
2021 ◽  
Vol 14 (12) ◽  
pp. 3353
Author(s):  
Marina Makrygianni ◽  
Filimon Zacharatos ◽  
Kostas Andritsos ◽  
Ioannis Theodorakos ◽  
Dimitris Reppas ◽  
...  
Keyword(s):  
High Resolution ◽  
Form Factors ◽  
Circuit Board ◽  
Lead Free ◽  
Process Conditions ◽  
Solder Paste ◽  
Electronic Components ◽  
Successful Operation ◽  
Fine Pitch ◽  
Forward Transfer

Current challenges in printed circuit board (PCB) assembly require high-resolution deposition of ultra-fine pitch components (<0.3 mm and <60 μm respectively), high throughput and compatibility with flexible substrates, which are poorly met by the conventional deposition techniques (e.g., stencil printing). Laser-Induced Forward Transfer (LIFT) constitutes an excellent alternative for assembly of electronic components: it is fully compatible with lead-free soldering materials and offers high-resolution printing of solder paste bumps (<60 μm) and throughput (up to 10,000 pads/s). In this work, the laser-process conditions which allow control over the transfer of solder paste bumps and arrays, with form factors in line with the features of fine pitch PCBs, are investigated. The study of solder paste as a function of donor/receiver gap confirmed that controllable printing of bumps containing many microparticles is feasible for a gap < 100 μm from a donor layer thickness set at 100 and 150 μm. The transfer of solder bumps with resolution < 100 μm and solder micropatterns on different substrates, including PCB and silver pads, have been achieved. Finally, the successful operation of a LED interconnected to a pin connector bonded to a laser-printed solder micro-pattern was demonstrated.

Quantitative Evaluation of Voids in Lead Free Solder Joints

2015 ◽  
Vol 772 ◽  
pp. 284-289 ◽  
Author(s):  
Sabuj Mallik ◽  
Jude Njoku ◽  
Gabriel Takyi
Keyword(s):  
Solder Bump ◽  
Solder Joints ◽  
Void Formation ◽  
Lead Free ◽  
Lead Free Solder ◽  
Solder Paste ◽  
X Ray ◽  
Size And Shape ◽  
Solder Bumps ◽  
Free Solder

Voiding in solder joints poses a serious reliability concern for electronic products. The aim of this research was to quantify the void formation in lead-free solder joints through X-ray inspections. Experiments were designed to investigate how void formation is affected by solder bump size and shape, differences in reflow time and temperature, and differences in solder paste formulation. Four different lead-free solder paste samples were used to produce solder bumps on a number of test boards, using surface mount reflow soldering process. Using an advanced X-ray inspection system void percentages were measured for three different size and shape solder bumps. Results indicate that the voiding in solder joint is strongly influenced by solder bump size and shape, with voids found to have increased when bump size decreased. A longer soaking period during reflow stage has negatively affectedsolder voids. Voiding was also accelerated with smaller solder particles in solder paste.

Study of a Low Cost Reballing of BGA Method with Lead-Free Solder Paste

2019 ◽  
Vol 14 (1) ◽  
pp. 651-657
Author(s):  
Talita Mazon ◽  
Guilherme E. Prevedel ◽  
Egont A. Schenkel ◽  
Marcio T. Biasoli
Keyword(s):  
Low Cost ◽  
Lead Free ◽  
Lead Free Solder ◽  
Solder Paste ◽  
Free Solder

Analysis of surface insulation resistance related failures in electronics by circuit simulation

Circuit World ◽  
2017 ◽  
Vol 43 (2) ◽  
pp. 45-55 ◽  
Author(s):  
Vadimas Verdingovas ◽  
Salil Joshy ◽  
Morten Stendahl Jellesen ◽  
Rajan Ambat
Keyword(s):  
Printed Circuit Board ◽  
Electronic Device ◽  
Early Stage ◽  
Circuit Simulation ◽  
Circuit Board ◽  
Insulation Resistance ◽  
Electronic Circuits ◽  
Content Type ◽  
Printed Circuit ◽  
Surface Insulation Resistance

Purpose The purpose of this study is to show that the humidity levels for surface insulation resistance (SIR)-related failures are dependent on the type of activators used in no-clean flux systems and to demonstrate the possibility of simulating the effects of humidity and contamination on printed circuit board components and sensitive parts if typical SIR data connected to a particular climatic condition are available. This is shown on representative components and typical circuits. Design/methodology/approach A range of SIR values obtained on SIR patterns with 1,476 squares was used as input data for the circuit analysis. The SIR data were compared to the surface resistance values observable on a real device printed circuit board assembly. SIR issues at the component and circuit levels were analysed on the basis of parasitic circuit effects owing to the formation of a water layer as an electrical conduction medium. Findings This paper provides a summary of the effects of contamination with various weak organic acids representing the active components in no-clean solder flux residue, and demonstrates the effect of humidity and contamination on the possible malfunctions and errors in electronic circuits. The effect of contamination and humidity is expressed as drift from the nominal resistance values of the resistors, self-discharge of the capacitors and the errors in the circuits due to parasitic leakage currents (reduction of SIR). Practical/implications The methodology of the analysis of the circuits using a range of empirical leakage resistance values combined with the knowledge of the humidity and contamination profile of the electronics can be used for the robust design of a device, which is also important for electronic products relying on low current consumption for long battery lifetime. Originality/value Examples provide a basic link between the combined effect of humidity and contamination and the performance of electronic circuits. The methodology shown provides the possibility of addressing the climatic reliability of an electronic device at the early stage of device design by using typical SIR data representing the possible climate exposure.

Effect of the Soldering Atmosphere on the Wettability Between Sn4.0Ag0.5Cu (in wt.%) Lead-Free Solder Paste and Various Substrates

2018 ◽  
Vol 27 (10) ◽  
pp. 5011-5017 ◽  
Author(s):  
D. Soares ◽  
H. Leitão ◽  
C. S. Lau ◽  
J. C. Teixeira ◽  
L. Ribas ◽  
...  
Keyword(s):  
Lead Free ◽  
Lead Free Solder ◽  
Solder Paste ◽  
Free Solder
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