A Curvature-Based Interpretation of the Steinberg Criterion for Fatigue Life of Electronic Components

2015 ◽  
Vol 2015 (1) ◽  
pp. 000707-000712 ◽  
Author(s):  
Michael G. Béda
Keyword(s):  
Fatigue Life ◽  
Printed Circuit Board ◽  
Fem Analysis ◽  
Sine Wave ◽  
Circuit Board ◽  
Mode Shapes ◽  
Electronic Components ◽  
Industry Standard ◽  
A Value ◽  
Single Location

The “Steinberg Criterion” is a well-known method for determining the fatigue life of Printed Circuit Board (PCB) components based on the deflection of the PCB. It has been adopted as a de facto industry standard for the fatigue analysis of electronic components, and has been successfully used on many programs. However it has some limitations. Steinberg derived this equation to describe the behavior of rectangular PCBs simply supported on all sides. In this configuration the deformed shape of the first mode of a PCB under vibratory loads is assumed by Steinberg to be described by two perpendicular half sine waves. Unfortunately many PCBs have distorted mode shapes as a result of clamped or asymmetric edge constraints, stiffeners, or irregular PCB outline. Finite Element Models (FEMs) can be used to predict mode shapes for these PCBs, but there has been no clear way to use Steinberg's equation to determine the fatigue margin for components on such boards. The traditional method (when the discrepancy is addressed) is to use a value for PCB length in the equation based on an approximation of the length of an equivalent half sine wave superimposed on the predicted mode shape. This approach, while better than ignoring the problem, can lead to inconsistency in results or the overlooking of localized effects, and in the case of extremely odd mode shapes can be nearly impossible. This paper presents a method of using FEM data for curvature as well as deflection at a single location to eliminate the shape and location variables from the Steinberg criterion, allowing it to be applied confidently to PCBs and Printed Wiring Assemblies (PWAs) with any shape and boundary conditions. Test cases are described that show equivalence between this method and the existing Steinberg criterion. Lastly the methodology used to extract phase-consistent curvature and deflection results from FEM analysis is briefly discussed.

Validation of the Critical Strain-Based Methodology for Evaluating the Mechanical Safety of Ball Grid Array Solder Joints in a Launch Random Vibration Environment

2021 ◽  
Author(s):  
Tae-Yong Park ◽  
Hyun-Ung Oh
Keyword(s):  
Fatigue Life ◽  
Random Vibration ◽  
Critical Strain ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Mechanical Design ◽  
Ball Grid Array ◽  
Primary Objective ◽  
Circuit Board ◽  
Analytical Approaches

Abstract To overcome the theoretical limitations of Steinberg's theory for evaluating the mechanical safety of the solder joints of spaceborne electronics in a launch random vibration environment, a critical strain-based methodology was proposed and validated in a previous study. However, for the critical strain-based methodology to be used reliably in the mechanical design of spaceborne electronics, its effectiveness must be validated under various conditions of the package mounting locations and the first eigenfrequencies of a printed circuit board (PCB); achieving this validation is the primary objective of this study. For the experimental validation, PCB specimens with ball grid array packages mounted on various board locations were fabricated and exposed to a random vibration environment to assess the fatigue life of the solder joint. The effectiveness of the critical strain-based methodology was validated through a comparison of the fatigue life of the tested packages and their margin of safety, which was estimated using various analytical approaches.

Analysis of 16 QFN Device I/O Pads for Solderability Failures

2015 ◽  
Vol 2015 (1) ◽  
pp. 000675-000684
Author(s):  
Rama Hegde ◽  
Anne Anderson ◽  
Sam Subramanian ◽  
Andrew Mawer ◽  
Ed Hall ◽  
...  
Keyword(s):  
Cross Section ◽  
Printed Circuit Board ◽  
Depth Profiling ◽  
Lessons Learned ◽  
Circuit Board ◽  
Physical Analysis ◽  
Lead Frame ◽  
Cross Sectional ◽  
Root Cause ◽  
Industry Standard

In-process failures were experienced during printed circuit board (PCB) SMT assembly of a 16 Quad Flat No Leads (QFN) device. The failures appeared to be solderability related with QFN unit I/O pads not soldering robustly and sometimes leading to QFN detachment following board mounting. When assembly did take place on affected QFN units, the resulting solder joint was observed to be weak. This paper reports on very systematic analyses of the QFN device I/O pads using optical inspections, AES surface, AES depth profiling, SEM/EDX, SIMS, FIB and TEM cross-sectional measurements to determine the root cause of the failure and the failure mechanism. The detached QFN units, suspect and good unsoldered units, passing and failing units obtained from customers were examined. The industry standard surface mount solderability testing was performed on good and suspect parts, and all were observed to pass as evidenced by >95% coverage of the I/O pads. Optical inspections and a wide variety of physical analysis of the pads on fresh parts showed no anomalies with only the expected Au over Pd over Ni found. AES analysis was performed including depth profiling to look for any issues in the NiPdAu over base Cu plating layers that could be contributing the solderability failures. The AES depth profiling indicated AuPd film on the Ni under layer for the I/O pads as expected. No unexpected elements or oxide layers were observed at any layer. Then, one failing and one passing units were compared by doing FIB cross-section, FIB planar section and TEM cross-section analysis. The cross-sectional analysis showed rough Ni surface for the failing units, while the Ni surface was relatively smooth for the passing unit. Further, finer Cu grains and Ni grains were observed on the passing units. Additionally, the lead frame fabrication process mapping showed rough Cu, Ni “texturing” and use of low electro chemical polishing (ECP) current on the bad units compared to that of the good units. All affected bad units were confirmed coming from a second source Cu supplier with the rough Cu. The weak and irregular NiSn IMC formation on the bad units caused IMC separation and possible spalling during board solder reflow primarily due to the rough base Cu and irregular grain sizes and resulting lower ECP lead frame plating current. A possible final factor was marginally low Pd thickness. In conclusion, the 16 QFN device solderability failure root cause summary and the lessons learned from a wide variety of analysis techniques will be discussed.

A Study on the Characteristics of a Vibrator Using Flat PCB-Coil

2013 ◽  
Vol 392 ◽  
pp. 738-742 ◽  
Author(s):  
Hyung Sik Kim ◽  
Sang Pyo Hong ◽  
Mi Hyun Choi ◽  
Hyun Joo Kim ◽  
In Hwa Lee ◽  
...  
Keyword(s):  
Vibration Amplitude ◽  
Printed Circuit Board ◽  
Cooling System ◽  
Sine Wave ◽  
Circuit Board ◽  
Frequency Change ◽  
Tactile Stimulator ◽  
Custom Made ◽  
Wide Range ◽  
Fiberglass Cloth

In this study, we developed and evaluateda vibrator using a flat PCB-coil. The flat PCB-coil vibrator was fabricated on a printed circuit board using and etching process. The spiral pattern was etched on a fiberglass cloth with an epoxy resin. To evaluatethe flat PCB-coil vibrator, we generated a sine wave, saw-tooth, and square wave through a custom made wave generator and amplified the waveforms using a power amplifier. A three-axis accelerometer was used to evaluate the performance of the developed vibrator. Even though the developed vibrator is simple, it has a wide range of vibration frequency (50~500 Hz) and vibration amplitude (0~5 V). The vibration amplitude does not change due to frequency change. It is expected that the developed vibrator can be used in a wide variety of applications such as in a tactile stimulator, in elastography, energy harvesting, and in a cooling system.

Fatigue Life Analysis of Solder Joints in Flip Chip Bonding

1999 ◽  
Vol 122 (3) ◽  
pp. 207-213 ◽  
Author(s):  
Yutaka Tsukada ◽  
Hideo Nishimura ◽  
Masao Sakane ◽  
Masateru Ohnami
Keyword(s):  
Fatigue Life ◽  
Flip Chip ◽  
Printed Circuit Board ◽  
Electrical Potential ◽  
Potential Drop ◽  
Life Assessment ◽  
Circuit Board ◽  
Ratchet Effect ◽  
The Difference ◽  
Fatigue Life Analysis

This paper describes the life assessment of flip chip joints. Flip chip joints of 63Sn-37Pb and 5Sn-95Pb solders on a printed circuit board were stressed thermally for fatigue. Fatigue lives of the joints were determined by an electrical potential drop method and the effect of encapsulation on fatigue life was discussed. The encapsulation had a significant effect of prolonging the fatigue life of the joints. Thermo-mechanical finite element analyses proved that the encapsulation lowered the strain amplitude of the joints by distributing the strain over a whole package and bending effect. Cracking location was also discussed in relation with the strain concentration in the joints. Fatigue lives of the flip chip joints were compared with those of bulk round bar specimens and the difference in fatigue life between two types of specimens was discussed from the specimen dimensions and ratchet effect. [S1043-7398(00)00203-6]

The Effect of Solder Paste Volume and Reflow Ambient Atmosphere on Reliability of CBGA Assemblies

1999 ◽  
Vol 123 (3) ◽  
pp. 284-289 ◽  
Author(s):  
Y. P. Wu ◽  
P. L. Tu ◽  
Yan C. Chan
Keyword(s):  
Fatigue Life ◽  
Printed Circuit Board ◽  
Theoretical Models ◽  
Circuit Board ◽  
Ambient Atmosphere ◽  
Solder Paste ◽  
Remarkable Effect ◽  
Soldering Process ◽  
Vibration Fatigue ◽  
And Performance

To investigate the effect of stencil thickness and reflow ambient atmosphere on the reliability of ceramic ball grid array (CBGA) assemblies, three levels of stencil thickness, 0.10, 0.15, and 0.20 mm, were used to print solder paste on printed circuit board (PCB). After the CBGA modules were placed on PCBs, the specimens were divided into two groups, and reflowed in nitrogen and compressed air separately. Properties of the six groups of assemblies, such as shear strength, bending fatigue life, thermal shock cycles, and vibration fatigue life, were tested to find out the optimum assembling process. The results show that assemblies prepared with a stencil 0.15 mm thick yield maximized performance. And the nitrogen ambient atmosphere demonstrates a remarkable effect on improving the fatigue life. Theoretical models are given to qualitatively explain the relationship between the solder joint volume and performance. This work provides a guideline on how to determine the soldering process parameters of CBGA assemblies.

scholarly journals Universal synthesis of conductive liquid network in polymers enabling elastic printed circuit board technology

2021 ◽  
Author(s):  
Jiheong Kang ◽  
Wonbeom Lee ◽  
Hyunjun Kim ◽  
Inho Kang ◽  
Hongjun Park ◽  
...  
Keyword(s):  
Liquid Metal ◽  
Acoustic Field ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
System Level ◽  
Large Strains ◽  
Stretchable Electronics ◽  
Electronic Components ◽  
Conductive Liquid ◽  
Printed Circuit

Abstract Stretchable electronics are considered next-generation electronic devices in a broad range of emerging fields, including soft robotics1,2, biomedical devices3,4, human-machine interfaces5,6, and virtual or augmented reality devices7,8. A stretchable printed circuit board (S-PCB) is a basic conductive framework for the facile assembly of system-level stretchable electronics with various electronic components. Since an S-PCB is responsible for electrical communications between numerous electronic components, the conductive lines in S-PCB should strictly satisfy the following features: (i) metallic conductivity, (ii) constant electrical resistance during dynamic stretching, and (iii) tough interface bonding with various components9. Despite recent significant advances in intrinsically stretchable conductors10,11,12, they cannot simultaneously satisfy the above stringent requirements. Here, we present a new concept of conductive liquid network-based elastic conductors. These conductors are based on unprecedented liquid metal particles assembled network (LMPNet) and an elastomer. The unique assembled network structure and reconfigurable nature of the LMPNet conductor enabled high conductivity, high stretchability, tough adhesion, and imperceptible resistance changes under large strains, which enabled the first elastic-PCB (E-PCB) technology. We synthesized LMPNet through an acoustic field-driven cavitation event in the solid state. When an acoustic field is applied, liquid metal nanoparticles (LMPnano) are remarkably generated from original LMPs and assemble into a highly conductive particle network (LMPNet). Finally, we demonstrated a multi-layered E-PCB, in which various electronic components were integrated with tough adhesion to form a highly stretchable health monitoring system. Since our synthesis of LMPNet is universal, we could synthesize LMPNet in various polymers, including hydrogel, self-healing elastomer and photoresist and add new functions to LMPNet.

scholarly journals Thermal and Electrical Analysis of Solid Aluminium Capacitors

1987 ◽  
Vol 12 (3) ◽  
pp. 167-186 ◽  
Author(s):  
E. H.L.J. Dekker ◽  
C. J.M. Lasance
Keyword(s):  
Thermal Properties ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Electronic Components ◽  
Reverse Voltage ◽  
Printed Circuit ◽  
Electrolytic Capacitors ◽  
Extensive Analysis ◽  
Current Specification ◽  
Electrical Analysis

The thermal properties of electronic components partly determine the reliability of electronic equipment. For electrolytic capacitors, they also set the limits for the ripple current and voltage values.This article first discusses the voltage limits under various conditions of temperature, frequency and polarity. Then the connection of ripple current to these parameters and to the capacitor's resistance is treated.An extensive analysis is made of the influence of heat conduction in the capacitor and the printed-circuit board, for metal-cased as well as for epoxy-coated pearl types. The study pays particular attention to solid aluminium capacitors containing a manganese dioxide semiconductor. They have some extraordinary properties: a temperature range of at least – 80 to + 175℃, and an appreciable reverse voltage potential.These can be fully employed to improve the ripple-current specification.

A Micro Fluxgate Magnetic Sensor Using New Printed Circuit Board Technology

2006 ◽  
Vol 326-328 ◽  
pp. 1487-1490 ◽  
Author(s):  
Won Youl Choi ◽  
Jun Sik Hwang ◽  
Sang On Choi
Keyword(s):  
Low Power ◽  
Printed Circuit Board ◽  
Sine Wave ◽  
Magnetic Core ◽  
Magnetic Sensor ◽  
Circuit Board ◽  
Sensing Element ◽  
Printed Circuit ◽  
Fluxgate Sensor ◽  
Ring Shape

We have developed a micro fluxgate magnetic sensor using new printed circuit board (PCB) technology. The fluxgate sensor consisted of five PCB stack layers including one layer of magnetic core and four layers of excitation and pick-up coils. The center layer as a magnetic core was made of micro patterned amorphous magnetic ribbon with an extremely high DC permeability of ~100,000, and the core had a rectangular ring shape. Four outer layers as an excitation and pickup coils had a planar solenoid structure. The amorphous magnetic core was easily saturated due to the high permeability, low coercive field, and closed magnetic path for the excitation field. The chip size of the fabricated sensing element was 7.3 × 5.7 mm2. Excellent linear response over the range of –100 μT to +100 μT was obtained with sensitivity of 780 V/T at excitation sine wave of 3 Vp-p and 360 kHz. A very low power consumption of ~8 mW was measured. This low power, small size, and high sensitive fluxgate sensor to measure a low magnetic field is very useful for various applications.

SILVerIn: Systematic Integrity Verification of Printed Circuit Board Using JTAG Infrastructure

2021 ◽  
Vol 17 (3) ◽  
pp. 1-28
Author(s):  
Shubhra Deb Paul ◽  
Swarup Bhunia
Keyword(s):  
Integrated Circuit ◽  
Printed Circuit Board ◽  
Supply Voltage ◽  
Semiconductor Industry ◽  
Electronic System ◽  
Circuit Board ◽  
System Level ◽  
Printed Circuit ◽  
Industry Standard ◽  
Custom Hardware

A printed circuit board (PCB) provides necessary mechanical support to an electronic system and acts as a platform for connecting electronic components. Counterfeiting and in-field tampering of PCBs have become significant security concerns in the semiconductor industry as a result of increasing untrusted entities in the supply chain. These counterfeit components may result in performance degradation, profit reduction, and reputation risk for the manufacturers. While Integrated Circuit (IC) level authentication using physical unclonable functions (PUFs) has been widely investigated, countermeasures at the PCB level are scarce. These approaches either suffer from significant overhead issues, or opportunistic counterfeiters can breach them like clockwork. Besides, they cannot be extended to system-level (both chip and PCB together), and their applications are also limited to a specific purpose (i.e., either counterfeiting or tampering). In this article, we introduce SILVerIn , a novel systematic approach to verify the authenticity of all chips used in a PCB as well as the board for combating attacks such as counterfeiting, cloning, and in-field malicious modifications. We develop this approach by utilizing the existing boundary scan architecture (BSA) of modern ICs and PCBs. As a result, its implementation comes at a negligible (∼0.5%) hardware overhead. SILVerIn  is integrated into a PCB design during the manufacturing phase. We implement our technique on a custom hardware platform consisting of an FPGA and a microcontroller. We incorporate the industry-standard JTAG (Joint Test Action Group) interface to transmit test data into the BSA and perform hands-on measurement of supply current at both chip and PCB levels on 20 boards. We reconstruct these current values to digital signatures that exhibit high uniqueness, robustness, and randomness features. Our approach manifests strong reproducibility of signatures at different supply voltage levels, even with a low-resolution measurement setup. SILVerIn  also demonstrates a high resilience against machine learning-based modeling attacks, with an average prediction accuracy of ∼51%. Finally, we conduct intentional alteration experiments by replacing the on-board FPGA to replicate the scenario of PCB tampering, and the results indicate successful detection of in-field modifications in a PCB.

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