scholarly journals Ultra‐thin Body Buried In 0.35 Ga 0.65 As Channel MOSFETs with Extremely Low Off‐current on Si Substrates

2021 ◽  
Vol 30 (6) ◽  
pp. 1017-1021
Author(s):  
WANG Bo ◽  
DING Peng ◽  
FENG Ruize ◽  
WANG Yanfu ◽  
LIU Xiaoyu ◽  
...  
Keyword(s):  
Thin Body ◽  
Si Substrates

Interactions Between Al and Cr Thin Films

1976 ◽  
Vol 34 ◽  
pp. 638-639
Author(s):  
R. M. Anderson ◽  
T. M. Reith ◽  
M. J. Sullivan ◽  
E. K. Brandis
Keyword(s):  
Thin Films ◽  
Room Temperature ◽  
Vacuum System ◽  
Processing Temperature ◽  
Diffusion Couples ◽  
Electronic Circuits ◽  
Intermetallic Formation ◽  
Si Substrates ◽  
Aluminum Silicon

Thin films of aluminum or aluminum-silicon can be used in conjunction with thin films of chromium in integrated electronic circuits. For some applications, these films exhibit undesirable reactions; in particular, intermetallic formation below 500 C must be inhibited or prevented. The Al films, being the principal current carriers in interconnective metal applications, are usually much thicker than the Cr; so one might expect Al-rich intermetallics to form when the processing temperature goes out of control. Unfortunately, the JCPDS and the literature do not contain enough data on the Al-rich phases CrAl7 and Cr2Al11, and the determination of these data was a secondary aim of this work.To define a matrix of Cr-Al diffusion couples, Cr-Al films were deposited with two sets of variables: Al or Al-Si, and broken vacuum or single pumpdown. All films were deposited on 2-1/4-inch thermally oxidized Si substrates. A 500-Å layer of Cr was deposited at 120 Å/min on substrates at room temperature, in a vacuum system that had been pumped to 2 x 10-6 Torr. Then, with or without vacuum break, a 1000-Å layer of Al or Al-Si was deposited at 35 Å/s, with the substrates still at room temperature.

Electron Energy Analysis of Germanium and Silica Layers on Silicon Substrates

1975 ◽  
Vol 33 ◽  
pp. 96-97
Author(s):  
R. W. Ditchfield ◽  
A. G. Cullis
Keyword(s):  
Epitaxial Growth ◽  
Electron Energy ◽  
Silicon Substrates ◽  
Secondary Phases ◽  
Si Substrates ◽  
Transmission Electron ◽  
Layer Structures ◽  
Si Films ◽  
Electron Energy Loss ◽  
Growth Centres

An energy analyzing transmission electron microscope of the Möllenstedt type was used to measure the electron energy loss spectra given by various layer structures to a spatial resolution of 100Å. The technique is an important, method of microanalysis and has been used to identify secondary phases in alloys and impurity particles incorporated into epitaxial Si films.Layers Formed by the Epitaxial Growth of Ge on Si Substrates Following studies of the epitaxial growth of Ge on (111) Si substrates by vacuum evaporation, it was important to investigate the possible mixing of these two elements in the grown layers. These layers consisted of separate growth centres which were often triangular and oriented in the same sense, as shown in Fig. 1.

Defects in β-SiC thin films grown on α-SiC substrates

1988 ◽  
Vol 46 ◽  
pp. 568-569
Author(s):  
Karren L. More
Keyword(s):  
Thin Films ◽  
Semiconductor Device ◽  
Lattice Mismatch ◽  
Chemical Vapor ◽  
Substrate Material ◽  
Growth Interface ◽  
Si Substrates ◽  
Thermal Expansion Coefficients ◽  
Device Applications ◽  
Expansion Coefficients

Beta-SiC is an ideal candidate material for use in semiconductor device applications. Currently, monocrystalline β-SiC thin films are epitaxially grown on {100} Si substrates by chemical vapor deposition (CVD). These films, however, contain a high density of defects such as stacking faults, microtwins, and antiphase boundaries (APBs) as a result of the 20% lattice mismatch across the growth interface and an 8% difference in thermal expansion coefficients between Si and SiC. An ideal substrate material for the growth of β-SiC is α-SiC. Unfortunately, high purity, bulk α-SiC single crystals are very difficult to grow. The major source of SiC suitable for use as a substrate material is the random growth of {0001} 6H α-SiC crystals in an Acheson furnace used to make SiC grit for abrasive applications. To prepare clean, atomically smooth surfaces, the substrates are oxidized at 1473 K in flowing 02 for 1.5 h which removes ∽50 nm of the as-grown surface. The natural {0001} surface can terminate as either a Si (0001) layer or as a C (0001) layer.

Electron microscope characterization of MOCVD-grown gap layers on Si

1986 ◽  
Vol 44 ◽  
pp. 724-725
Author(s):  
K.M. Jones ◽  
M.M. Al-Jassim ◽  
J.M. Olson
Keyword(s):  
Atmospheric Pressure ◽  
Vapour Deposition ◽  
Chemical Vapour ◽  
Organic Chemical ◽  
Lattice Match ◽  
Si Substrates ◽  
Metal Organic ◽  
Good Lattice ◽  
Antiphase Domains

The epitaxial growth of III-V semiconductors on Si for integrated optoelectronic applications is currently of great interest. GaP, with a lattice constant close to that of Si, is an attractive buffer between Si and, for example, GaAsP. In spite of the good lattice match, the growth of device quality GaP on Si is not without difficulty. The formation of antiphase domains, the difficulty in cleaning the Si substrates prior to growth, and the poor layer morphology are some of the problems encountered. In this work, the structural perfection of GaP layers was investigated as a function of several process variables including growth rate and temperature, and Si substrate orientation. The GaP layers were grown in an atmospheric pressure metal organic chemical vapour deposition (MOCVD) system using trimethylgallium and phosphine in H2. The Si substrates orientations used were (100), 2° off (100) towards (110), (111) and (211).

Influence of MBE Growth Conditions on Dislocation Densities of GaAs/Ge Epilayers Grown on Silicon Substrates

1985 ◽  
Vol 43 ◽  
pp. 364-365
Author(s):  
K.M. Hones ◽  
P. Sheldon ◽  
B.G. Yacobi ◽  
A. Mason
Keyword(s):  
High Efficiency ◽  
Lattice Mismatch ◽  
Low Cost ◽  
Growth Conditions ◽  
Nonradiative Recombination ◽  
Device Structure ◽  
Si Substrates ◽  
Transmission Electron ◽  
Dislocation Densities ◽  
Dislocation Type

There is increasing interest in growing epitaxial GaAs on Si substrates. Such a device structure would allow low-cost substrates to be used for high-efficiency cascade- junction solar cells. However, high-defect densities may result from the large lattice mismatch (∼4%) between the GaAs epilayer and the silicon substrate. These defects can act as nonradiative recombination centers that can degrade the optical and electrical properties of the epitaxially grown GaAs. For this reason, it is important to optimize epilayer growth conditions in order to minimize resulting dislocation densities. The purpose of this paper is to provide an indication of the quality of the epitaxially grown GaAs layers by using transmission electron microscopy (TEM) to examine dislocation type and density as a function of various growth conditions. In this study an intermediate Ge layer was used to avoid nucleation difficulties observed for GaAs growth directly on Si substrates. GaAs/Ge epilayers were grown by molecular beam epitaxy (MBE) on Si substrates in a manner similar to that described previously.

Epitaxial ferroelectric thin films

1994 ◽  
Vol 52 ◽  
pp. 572-573
Author(s):  
S. G. Ghonge ◽  
E. Goo ◽  
R. Ramesh ◽  
R. Haakenaasen ◽  
D. K. Fork
Keyword(s):  
Single Crystal ◽  
Work Function ◽  
Nonvolatile Memory ◽  
Ferroelectric Properties ◽  
Electrical Contact ◽  
Memory Devices ◽  
Ferroelectric Films ◽  
Si Substrates ◽  
Electro Optic ◽  
Wide Range

Microstructure of epitaxial ferroelectric/conductive oxide heterostructures on LaAIO3(LAO) and Si substrates have been studied by conventional and high resolution transmission electron microscopy. The epitaxial films have a wide range of potential applications in areas such as non-volatile memory devices, electro-optic devices and pyroelectric detectors. For applications such as electro-optic devices the films must be single crystal and for applications such as nonvolatile memory devices and pyroelectric devices single crystal films will enhance the performance of the devices. The ferroelectric films studied are Pb(Zr0.2Ti0.8)O3(PLZT), PbTiO3(PT), BiTiO3(BT) and Pb0.9La0.1(Zr0.2Ti0.8)0.975O3(PLZT).Electrical contact to ferroelectric films is commonly made with metals such as Pt. Metals generally have a large difference in work function compared to the work function of the ferroelectric oxides. This results in a Schottky barrier at the interface and the interfacial space charge is believed to responsible for domain pinning and degradation in the ferroelectric properties resulting in phenomenon such as fatigue.

Transmission Electron Microscopy characterization of epitaxial III-V semiconductor thin films grown on Si(100) by ion-assisted deposition

1990 ◽  
Vol 48 (4) ◽  
pp. 686-687
Author(s):  
L. Hultman ◽  
C.-H. Choi ◽  
R. Kaspi ◽  
R. Ai ◽  
S.A. Barnett
Keyword(s):  
Electron Microscopy ◽  
Transmission Electron Microscopy ◽  
Ion Irradiation ◽  
High Energy ◽  
Nucleation Mechanism ◽  
Layer By Layer ◽  
Extended Defect ◽  
Island Formation ◽  
Si Substrates ◽  
Transmission Electron

III-V semiconductor films nucleate by the Stranski-Krastanov (SK) mechanism on Si substrates. Many of the extended defects present in the films are believed to result from the island formation and coalescence stage of SK growth. We have recently shown that low (-30 eV) energy, high flux (4 ions per deposited atom), Ar ion irradiation during nucleation of III-V semiconductors on Si substrates prolongs the 1ayer-by-layer stage of SK nucleation, leading to a decrease in extended defect densities. Furthermore, the epitaxial temperature was reduced by >100°C due to ion irradiation. The effect of ion bombardment on the nucleation mechanism was explained as being due to ion-induced dissociation of three-dimensional islands and ion-enhanced surface diffusion.For the case of InAs grown at 380°C on Si(100) (11% lattice mismatch), where island formation is expected after ≤ 1 monolayer (ML) during molecular beam epitaxy (MBE), in-situ reflection high-energy electron diffraction (RHEED) showed that 28 eV Ar ion irradiation prolonged the layer-by-layer stage of SK nucleation up to 10 ML. Otherion energies maintained layer-by-layer growth to lesser thicknesses. The ion-induced change in nucleation mechanism resulted in smoother surfaces and improved the crystalline perfection of thicker films as shown by transmission electron microscopy and X-ray rocking curve studies.

Anisotropy of interfacial defects in the initial stage of MOVPE GaAs growth On Si

1990 ◽  
Vol 48 (4) ◽  
pp. 592-593
Author(s):  
C. Vannuffel ◽  
C. Schiller ◽  
J. P. Chevalier
Keyword(s):  
Early Stage ◽  
Threading Dislocations ◽  
Mbe Growth ◽  
Detailed Mechanism ◽  
Si Substrates ◽  
Initial Stage ◽  
Interfacial Defects ◽  
Interfacial Dislocations ◽  
Step Growth ◽  
Essential Problem

Recently, interest has focused on the epitaxy of GaAs on Si as a promising material for electronic applications, potentially for integration of optoelectronic devices on silicon wafers. The essential problem concerns the 4% misfit between the two materials, and this must be accommodated by a network of interfacial dislocations with the lowest number of threading dislocations. It is thus important to understand the detailed mechanism of the formation of this network, in order to eventually reduce the dislocation density at the top of the layers.MOVPE growth is carried out on slightly misoriented, (3.5°) from (001) towards , Si substrates. Here we report on the effect of this misorientation on the interfacial defects, at a very early stage of growth. Only the first stage, of the well-known two step growth process, is thus considered. Previously, we showed that full substrate coverage occured for GaAs thicknesses of 5 nm in contrast to MBE growth, where substantially greater thicknesses are required.

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