Thermal resistance of high power LED influenced by ZnO thickness and surface roughness parameter

2016 ◽  
Vol 33 (1) ◽  
pp. 15-22 ◽  
Author(s):  
Shanmugan Subramani ◽  
Mutharasu Devarajan

Purpose – The purpose of this research is to study the effect of thickness and surface properties of ZnO solid thin film for heat dissipation application in LED. Heat dissipation in electronic packaging can be improved by applying a thermally conductive interface material (TIM) and hence the junction temperature will be maintained. ZnO is one of the oxide materials and used as a filler to increase the thermal conductivity of thermal paste. The thickness of these paste-type material cannot be controlled which restricts the heat flow from the LED junction to ambient. The controlled thickness is only possible by using a solid thin-film interface material. Design/methodology/approach – Radio Frequency (RF)-sputtered ZnO thin film on Cu substrates were used as a heat sink for high-power LED and the thermal performance of various ZnO thin film thickness on changing total thermal resistance (R th-tot) and rise in junction temperature were tested. Thermal transient analysis was used to study the performance of the given LED. The influence of surface roughness profile was also tested on the LED performance. Findings – The junction temperature was high (6.35°C) for 200 nm thickness of ZnO thin film boundary condition when compared with bare Cu substrates. Consecutively, low R th-tot values were noticed with the same boundary condition. The 600 nm thickness of ZnO thin film exhibited high R th-tot and interface resistance than the other thicknesses. Bond Line Thickness of the interface material was influenced on the interface thermal resistance which was decreased with increased BLT. Surface roughness parameter showed an immense effect on thermal transport, and hence, low R th (47.6 K/W) value was noticed with low film roughness (7 nm) as compared with bare Cu substrate (50.8 K/W) where the surface roughness was 20.5 nm. Originality/value – Instead of using thermal paste, solid thin film ZnO is used as TIM and coated Cu substrates were used as a heat sink. The thickness can be controlled, and it is a new approach for reducing the BLT between the metal core printed circuit board and heat sink.

2016 ◽  
Vol 138 (1) ◽  
Author(s):  
S. Shanmugan ◽  
O. Zeng Yin ◽  
P. Anithambigai ◽  
D. Mutharasu

All solid-state lighting products produce heat which should be removed by use of a heat sink. Since the two mating surfaces of light emitting diode (LED) package and heat sink are not flat, a thermal interface material (TIM) must be applied between them to fill the gaps resulting from their surface roughness and lack of coplanarity. The application of a traditional TIM may squeeze out when pressure is applied to join the surfaces and hence a short circuit may result. To avoid such a problem, a thin solid film based TIM has been suggested. In this study, a zinc oxide (ZnO) thin film was coated on Cu substrates and used as the TIM. The ZnO thin film coated substrates were used as heat sink purposes in this study. The prepared heat sink was tested with 3 W green LED and the observed results were compared with the results of same LED measured at bare and commercial thermal paste coated Cu substrates boundary conditions. The influence of interface material thickness on total thermal resistance (Rth-tot), rise in junction temperature (TJ), and optical properties of LED was analyzed. A noticeable reduction in Rth-tot (5.92 K/W) as well as TJ (ΔTJ = 11.83 °C) was observed for 800 nm ZnO thin film coated Cu substrates boundary conditions when compared with bare and thermal paste coated Cu substrates tested at 700 mA. Change in TJ influenced the thermal resistance of ZnO interface material. Improved lux level and decreased correlated color temperature (CCT) were also observed with ZnO coated Cu substrates.


2014 ◽  
Vol 1082 ◽  
pp. 315-318
Author(s):  
Rajendaran Vairavan ◽  
Vithyacharan Retnasamy ◽  
Zaliman Sauli ◽  
Hussin Kamarudin ◽  
Muammar Mohamad Isa ◽  
...  

In this work, thermal simulation analysis on high power LED is reported where the effect of the heat sink cooling fan and its rotation speed on the heat dissipation of the high power LED was evaluated. Ansys version 11 was utilized for the simulation. The thermal performance of the high power LED package was assessed in terms of operating junction temperature, von Mises stress and thermal resistance. The heat dissipation analysis was done under four types of convection condition:one natural convection conditionthree forced convection condition,. The forced convection condition was used to replicate the effect of a fan with various rotation speeds placed under the heat sink to increase the convective heat transfer coefficient. Results of the analysis showed that that the junction temperature, von Mises stress and thermal resistance of the GaN chip reduces with the increase of the fan rotation speed.


Author(s):  
Nico Setiawan Effendi ◽  
Kyoung Joon Kim

A computational study is conducted to explore thermal performances of natural convection hybrid fin heat sinks (HF HSs). The proposed HF HSs are a hollow hybrid fin heat sink (HHF HS) and a solid hybrid fin heat sink (SHF HS). Parametric effects such as a fin spacing, an internal channel diameter, a heat dissipation on the performance of HF HSs are investigated by CFD analysis. Study results show that the thermal resistance of the HS increases while the mass-multiplied thermal resistance of the HS decreases associated with the increase of the channel diameter. The results also shows the thermal resistance of the SHF HS is 13% smaller, and the mass-multiplied thermal resistance of the HHF HS is 32% smaller compared with the pin fin heat sink (PF HS). These interesting results are mainly due to integrated effects of the mass-reduction, the surface area enhancement, and the heat pumping via the internal channel. Such better performances of HF HSs show the feasibility of alternatives to the conventional PF HS especially for passive cooling of LED lighting modules.


2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Krzysztof Posobkiewicz ◽  
Krzysztof Górecki

Purpose The purpose of this study is to investigate the validation of the usefulness of cooling systems containing Peltier modules for cooling power devices based on measurements of the influence of selected factors on the value of thermal resistance of such a cooling system. Design/methodology/approach A cooling system containing a heat-sink, a Peltier module and a fan was built by the authors and the measurements of temperatures and thermal resistance in various supply conditions of the Peltier module and the fan were carried out and discussed. Findings Conclusions from the research carried out answer the question if the use of Peltier modules in active cooling systems provides any benefits comparing with cooling systems containing just passive heat-sinks or conventional active heat-sinks constructed of a heat-sink and a fan. Research limitations/implications The research carried out is the preliminary stage to asses if a compact thermal model of the investigated cooling system can be formulated. Originality/value In the paper, the original results of measurements and calculations of parameters of a cooling system containing a Peltier module and an active heat-sink are presented and discussed. An influence of power dissipated in the components of the cooling system on its efficiency is investigated.


2015 ◽  
Vol 2015 (CICMT) ◽  
pp. 000062-000066 ◽  
Author(s):  
T. Welker ◽  
S. Günschmann ◽  
N. Gutzeit ◽  
J. Müller

The integration density in semiconductor devices is significantly increased in the last years. This trend is already described by Moore's law what forecasts a doubling of the integration density every two years. This evolution makes greater demands on the substrate technology which is used for the first level interconnect between the semiconductor and the device package. Higher pattern resolution is required to connect more functions on a smaller chip. Also the thermal performance of the substrate is a crucial issue. The increased integration density leads to an increased power density, what means that more heat has to dissipate on a smaller area. Thus, substrates with a high thermal conductivity (e. g. direct bonded copper (DBC)) are utilized which spread the heat over a large area. However, the reduced pattern resolution caused by thick metal layers is disadvantageous for this substrate technology. Alternatively, low temperature co-fired ceramic (LTCC) can be used. This multilayer technology provides a high pattern resolution in combination with a high integration grade. The poor thermal conductivity of LTCC (3 … 5 W*m−1*K−1) requires thermal vias made of silver paste which are placed between the power chip and the heat sink and reduce the thermal resistance of the substrate. The via-pitch and diameter is limited by the LTCC technology, what allows a maximum filling grade of approx. 20 to 25 %. Alternatively, an opening in the ceramic is created, to bond the chip directly to the heat sink. This leads to technological challenges like the CTE mismatch between the chip and the heat sink material. Expensive materials like copper molybdenum composites with matched CTE have to be used. In the presented investigation, a thick silver tape is used to form a thick silver heat spreader through the LTCC substrate. An opening is structured by laser cutting in the LTCC tape and filled with a laser cut silver tape. After lamination, the substrate is fired using a constraint sintering process. The bond strength of the silver to LTCC interface is approx. 5.6 MPa. The thermal resistance of the silver structure is measured by a thermal test chip (Delphi PST1, 2.5 mm × 2.5 mm) glued with a high thermal conducting epoxy to the silver structure. The chip contains a resistor and diodes to generate heat and to determine the junction temperature respectively. The backside of the test structure is temperature stabilized by a temperature controlled heat sink. The resulting thermal resistance is in the range of 1.1 K/W to 1.5 K/W depending on the length of silver structure (5 mm to 7 mm). Advantages of the presented heat spreader are the low thermal resistance and the good embedding capability in the co-fire LTCC process.


Author(s):  
Gary L. Solbrekken ◽  
Kazuaki Yazawa ◽  
Avram Bar-Cohen

It is well established that the power dissipation for electronic components is increasing. At the same time, high performance portable equipment with volume, weight, and power limitations are gaining widespread acceptance in the marketplace. The combination of the above conditions requires thermal solutions that are high performance and yet small, light, and power efficient. This paper explores the possibility of using thermoelectric (TE) refrigeration as an integrated solution for portable electronic equipment accounting for heat sink and interface material thermal resistances. The current study shows that TE refrigeration can indeed have a benefit over using just a heat sink. Performance maps illustrating where TE refrigeration offers an advantage over an air-cooled heat sink are created for a parametric range of CPU heat flows, heat sink thermal resistances, and TE material properties. During the course of the study, it was found that setting the TE operating current based on minimizing the CPU temperature (Tj), as opposed to maximizing the amount of heat pumping, significantly reduces Tj. For the baseline case studied, a reduction of 20–30°C was demonstrated over a range of CPU heat dissipation. The parametric studies also illustrate that management of the heat sink thermal resistance appears to be more critical than the CPU/TE interfacial thermal resistance. However, setting the TE current based on a minimum Tj as opposed to maximum heat pumping reduces the system sensitivity to the heat sink thermal resistance.


2018 ◽  
Vol 35 (1) ◽  
pp. 1-11 ◽  
Author(s):  
Muna E. Raypah ◽  
Dheepan M.K. ◽  
Mutharasu Devarajan ◽  
Shanmugan Subramani ◽  
Fauziah Sulaiman

Purpose Thermal behavior of light-emitting diode (LED) device under different operating conditions must be known to enhance its reliability and efficiency in various applications. The purpose of this study is to report the influence of input current and ambient temperature on thermal resistance of InGaAlP low-power surface-mount device (SMD) LED. Design/methodology/approach Thermal parameters of the LED were measured using thermal transient measurement via Thermal Transient Tester (T3Ster). The experimental results were validated using computational fluid dynamics (CFD) software. Findings As input current increases from 50 to 90 mA at 25°C, the relative increase in LED package (ΔRthJS) and total thermal resistance (ΔRthJA) is about 10 and 4 per cent, respectively. In addition, at 50 mA and ambient temperature from 25 to 65°C, the ΔRthJS and ΔRthJA are roughly 28 and 22 per cent, respectively. A good agreement between simulation and experiment results of junction temperature. Originality/value Most of previous studies have focused on thermal management of high-power LEDs. There were no studies on thermal analysis of low-power SMD LED so far. This work will help in predicting the thermal performance of low-power LEDs in solid-state lighting applications.


2010 ◽  
Vol 139-141 ◽  
pp. 1433-1437
Author(s):  
Kai Lin Pan ◽  
Jiao Pin Wang ◽  
Jing Liu ◽  
Guo Tao Ren

Heat dissipation and cost are the key issues for light-emitting diode (LED) packaging. In this paper, based on the thermal resistance network model of LED packaging, three-dimensional heat dissipation model of high power multi-chip LED packaging is developed and analyzed with the application of finite element method. Temperature distributions of the current multi-chip LED packaging model are investigated systematically under the different materials of the chip substrate, die attach, and/or different structures of the heat sink and fin. The results show that the junction temperature can be decreased effectively by increasing the height of the heat sink, the width of the fin, and the thermal conductivity of the chip substrate and die attach materials. The lower cost and higher reliability for LED source can be obtained through reasonable selection of materials and structure parameters of the LED lighting system.


2012 ◽  
Vol 459 ◽  
pp. 609-614
Author(s):  
Kuo Zoo Liang ◽  
A Cheng Wang ◽  
Chun Ho Liu ◽  
Lung Tasi ◽  
Yan Cherng Lin

The purpose of this research is to design a new heat sink of water-cooling. With the aid of CAE (computer aided engineering), WEDM (wire electrical discharge machining), and the concept of micro-channel design, a heat sink of water-cooling can then be built with the merit of a smaller volume and lower thermal resistance. From this paper, results of the experiment indicate that the thermal resistance of heat sink can be decreased to 0.12 °C/W with input power of 60W, flow rate of 0.6 LPM, and a better heat dissipation with the in input power of 100W or 140W can be revealed.


Materials ◽  
2020 ◽  
Vol 13 (11) ◽  
pp. 2669
Author(s):  
Jiupeng Wu ◽  
Na Ren ◽  
Qing Guo ◽  
Kuang Sheng

A comparative study of surge current reliability of 1200 V/5 A 4H-SiC (silicon carbide) MPS (Merged PiN Schottky) diodes with different technologies is presented. The influences of device designs in terms of electrical and thermal aspects on the forward conduction performance and surge current capability were studied. Device forward characteristics were simulated and measured. Standard single-pulse surge current tests and thermal impedance measurements were carried to show their surge capability and thermal design differences. An advanced thermal RC (thermal resistance-capacitance) model, with the consideration of current distribution non-uniformity effects, is proposed to accurately calculate the device junction temperature during surge events. It was found that a thinner substrate and a hexagonal layout design are beneficial to the improvement of the bipolar conduction performance in high current mode, as well as the surge current capability. The thinner substrate design also has advantages on thermal aspects, as it presents the lowest thermal resistance. The calculated failure temperature during the surge tests is consistent with the aluminum melting phenomenon, which is regarded as the failure mechanism. It was demonstrated that, for a SiC MPS diode, higher bipolar conduction performance is conducive to restraining the joule heat, and a lower thermal resistance design is able to accelerate the heat dissipation and limit the junction temperature during surge events. In this way, the MPS diode using a thinner substrate and advanced layout design technology is able to achieve 60% higher surge current density capability compared to the other technologies.


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