High-Voltage MOSFETs are essential devices for complementing and extending the domains of application of any core technology including low-power, low-voltage CMOS. In this paper, we propose and describe advanced Extended-Drain MOSFETs, designed, processed and characterized in ultrathin body and buried oxide Fully Depleted Silicon on Insulator technology (UTBB-FDSOI). These transistors have been implemented in two technology nodes (28 nm and 14 nm) with different silicon film and buried oxide thicknesses (TSi < 10nm and TBOX ≤ 25nm). Our innovative concept of Dual Ground Plane (DGP) provides RESURF-like effect (reduced surface field) and offers additional flexibility for HVMOS integration directly in the ultrathin film of the FDSOI wafer. In this configuration, the primary back-gate controls the threshold voltage (VTH) to ensure performance and low leakage current. The second back-gate, located underneath the drift region, acts as a field plate enabling the improvement of the ON resistance (RON) and breakdown voltage (BV). The trade-off RON.S versus BV is investigated as a function of doping level, length and thickness of the drift region. We report promising results and discuss further developments for successful integration of high-voltage MOSFETs in ultrathin CMOS FDSOI technology.
Reducing the Short Channel Effect of Transistors and Reducing the Size of Analog Circuits
