“Shift and Match” (S…M) method for channel mobility correction in degraded MOSFETs

2020 ◽  
Author(s):  
Linglin Jing ◽  
Rui Gao ◽  
Zhigang Ji ◽  
Runsheng Wang
Keyword(s):  
Channel Mobility

scholarly journals Study and Assessment of Defect and Trap Effects on the Current Capabilities of a 4H-SiC-Based Power MOSFET

Electronics ◽  
2021 ◽  
Vol 10 (6) ◽  
pp. 735
Author(s):  
Fortunato Pezzimenti ◽  
Hichem Bencherif ◽  
Giuseppe De Martino ◽  
Lakhdar Dehimi ◽  
Riccardo Carotenuto ◽  
...  
Keyword(s):  
Drain Current ◽  
Oxide Semiconductor ◽  
Temperature Dependent ◽  
Channel Mobility ◽  
Blocking Voltage ◽  
Current Voltage ◽  
Wide Range ◽  
Temperature Ranges ◽  
Joint Contribution ◽  
State Resistance

A numerical simulation study accounting for trap and defect effects on the current-voltage characteristics of a 4H-SiC-based power metal-oxide-semiconductor field effect transistor (MOSFET) is performed in a wide range of temperatures and bias conditions. In particular, the most penalizing native defects in the starting substrate (i.e., EH6/7 and Z1/2) as well as the fixed oxide trap concentration and the density of states (DoS) at the 4H-SiC/SiO2 interface are carefully taken into account. The temperature-dependent physics of the interface traps are considered in detail. Scattering phenomena related to the joint contribution of defects and traps shift the MOSFET threshold voltage, reduce the channel mobility, and penalize the device current capabilities. However, while the MOSFET on-state resistance (RON) tends to increase with scattering centers, the sensitivity of the drain current to the temperature decreases especially when the device is operating at a high gate voltage (VGS). Assuming the temperature ranges from 300 K to 573 K, RON is about 2.5 MΩ·µm2 for VGS > 16 V with a percentage variation ΔRON lower than 20%. The device is rated to perform a blocking voltage of 650 V.

12 kV 4H-SiC p-IGBTs with Record Low Specific On-Resistance

2008 ◽  
Vol 600-603 ◽  
pp. 1187-1190 ◽  
Author(s):  
Q. Jon Zhang ◽  
Charlotte Jonas ◽  
Joseph J. Sumakeris ◽  
Anant K. Agarwal ◽  
John W. Palmour
Keyword(s):  
Carrier Lifetime ◽  
Drift Region ◽  
Gate Bias ◽  
Enhancement Layer ◽  
Channel Mobility ◽  
Dc Characteristics ◽  
Blocking Voltage ◽  
High Carrier ◽  
P Type ◽  
First Time

DC characteristics of 4H-SiC p-channel IGBTs capable of blocking -12 kV and conducting -0.4 A (-100 A/cm2) at a forward voltage of -5.2 V at 25°C are demonstrated for the first time. A record low differential on-resistance of 14 mW×cm2 was achieved with a gate bias of -20 V indicating a strong conductivity modulation in the p-type drift region. A moderately doped current enhancement layer grown on the lightly doped drift layer effectively reduces the JFET resistance while maintains a high carrier lifetime for conductivity modulation. A hole MOS channel mobility of 12.5 cm2/V-s at -20 V of gate bias was measured with a MOS threshold voltage of -5.8 V. The blocking voltage of -12 kV was achieved by Junction Termination Extension (JTE).

SiC MOSFET Channel Mobility Dependence on Substrate Doping and Temperature Considering High Density of Interface Traps

2007 ◽  
Vol 556-557 ◽  
pp. 835-838 ◽  
Author(s):  
Amador Pérez-Tomás ◽  
Michael R. Jennings ◽  
Philip A. Mawby ◽  
James A. Covington ◽  
Phillippe Godignon ◽  
...  
Keyword(s):  
Degradation Mechanism ◽  
Mobility Model ◽  
Effect Of Temperature ◽  
Coulomb Scattering ◽  
Interface Traps ◽  
Channel Mobility ◽  
Inversion Channel ◽  
Scattering Effects ◽  
Charge Concentration ◽  
Substrate Doping

In prior work we have proposed a mobility model for describing the mobility degradation observed in SiC MOSFET devices, suitable for being implemented into a commercial simulator, including Coulomb scattering effects at interface traps. In this paper, the effect of temperature and doping on the channel mobility has been modelled. The computation results suggest that the Coulomb scattering at charged interface traps is the dominant degradation mechanism. Simulations also show that a temperature increase implies an improvement in field-effect mobility since the inversion channel concentration increases and the trapped charge is reduced due to bandgap narrowing. In contrast, increasing the substrate impurity concentration further degrades the fieldeffect mobility since the inversion charge concentration decreases for a given gate bias. We have good agreement between the computational results and experimental mobility measurements.

High Mobility ZnO thin film transistors using the novel deposition of high-k dielectrics

2011 ◽  
Vol 1315 ◽  
Author(s):  
D. K. Ngwashi ◽  
R. B. M. Cross ◽  
S. Paul ◽  
Andrian P. Milanov ◽  
Anjana Devi
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Performance Metrics ◽  
Chemical Vapour ◽  
High Mobility ◽  
Hafnium Dioxide ◽  
Organic Chemical ◽  
Channel Mobility ◽  
High K ◽  
Metal Organic

ABSTRACTIn order to investigate the performance of ZnO-based thin film transistors (ZnO-TFTs), we fabricate devices using amorphous hafnium dioxide (HfO2) high-k dielectrics. Sputtered ZnO was used as the active channel layer, and aluminium source/drain electrodes were deposited by thermal evaporation, and the HfO2 high-k dielectrics are deposited by metal-organic chemical vapour deposition (MOCVD). The ZnO-TFTs with high-k HfO2 gate insulators exhibit good performance metrics and effective channel mobility which is appreciably higher in comparison to SiO2-based ZnO TFTs fabricated under similar conditions. The average channel mobility, turn-on voltage, on-off current ratio and subthreshold swing of the high-k TFTs are 31.2 cm2V-1s-1, -4.7 V, ~103, and 2.4 V/dec respectively. We compared the characteristics of a typical device consisting of HfO2 to those of a device consisting of thermally grown SiO2 to examine their potential for use as high-k dielectrics in future TFT devices.

Fabrication of a P-Channel SiC-IGBT with High Channel Mobility

2013 ◽  
Vol 740-742 ◽  
pp. 958-961 ◽  
Author(s):  
Shuji Katakami ◽  
Hiroyuki Fujisawa ◽  
Kensuke Takenaka ◽  
Hitoshi Ishimori ◽  
Shinji Takasu ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
Leakage Current Density ◽  
Current Density ◽  
Field Effect ◽  
Oxidation Process ◽  
Doping Profile ◽  
Base Layer ◽  
Channel Mobility ◽  
Insulated Gate Bipolar Transistor ◽  
Blocking Voltage

We fabricated and characterized an ultrahigh voltage (>10kV) p-channel silicon carbide insulated gate bipolar transistor (SiC-IGBT) with high channel mobility. Higher field-effect channel mobility of 13.5 cm2/Vs was achieved by the combination of adopting an n-type base layer with a retrograde doping profile and additional wet re-oxidation annealing (wet-ROA) at 1100°C in the gate oxidation process. The on-state characteristics of the p-channel SiC-IGBT at 200°C showed the low differential specific on-resistance of 24 mΩcm2 at VG = -20 V. The forward blocking voltage of the p-channel SiC-IGBT at 25°C was 10.2 kV a the leakage current density of 1.0 μA/cm2.

(Invited) Effect of Al2O3/InGaAs Interface on Channel Mobility

2019 ◽  
Vol 41 (7) ◽  
pp. 219-225 ◽  
Author(s):  
Li Yang ◽  
Cheng-Wei Cheng ◽  
Mayank T. Bulsara ◽  
Eugene A. Fitzgerald
Keyword(s):  
Channel Mobility

Analytical Treatment of Field-Effect Conduction in Polysilicon thin film Transistors

1997 ◽  
Vol 471 ◽  
Author(s):  
W. Eccleston
Keyword(s):  
Thin Film ◽  
Grain Size ◽  
Thin Film Transistors ◽  
Field Effect ◽  
Drain Current ◽  
High Current ◽  
Analytical Treatment ◽  
Channel Mobility ◽  
Current Region ◽  
The Relationship

ABSTRACTThe drift of electrons in the channels of Thin Film Transistors is analysed for discrete grains separated by grain boundaries containing amorphous silicon. The model provides the relationship channel mobility and grain size. The relationship between drain current and the terminal voltages is also predicted. The model relates to normal high current region of transistor operation.

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