scholarly journals Photoelectric Dual Control Negative Differential Resistance Device Fabricated by Standard CMOS Process

2019 ◽  
Vol 11 (3) ◽  
pp. 1-10 ◽  
Author(s):  
Jia Cong ◽  
Luhong Mao ◽  
Sheng Xie ◽  
Fan Zhao ◽  
Dong Yan ◽  
...  
2020 ◽  
Author(s):  
SMITA GAJANAN NAIK ◽  
Mohammad Hussain Kasim Rabinal

Electrical memory switching effect has received a great interest to develop emerging memory technology such as memristors. The high density, fast response, multi-bit storage and low power consumption are their...


2002 ◽  
Vol 25 (3) ◽  
pp. 233-237
Author(s):  
K. F. Yarn

First observation of switching behavior is reported in GaAs metal-insulator-p-n+structure, where the thin insulator is grown at low temperature by a liquid phase chemical-enhanced oxide (LPECO) with a thickness of 100 Å. A significant S-shaped negative differential resistance (NDR) is shown to occur that originates from the regenerative feedback in a tunnel metal/insulator/semiconductor (MIS) interface andp-n+junction. The influence of epitaxial doping concentration on the switching and holding voltages is investigated. The switching voltages are found to be decreased when increasing the epitaxial doping concentration, while the holding voltages are almost kept constant. A high turn-off/turn-on resistance ratio up to105has been obtained.


2013 ◽  
Vol 543 ◽  
pp. 176-179 ◽  
Author(s):  
D.Q. Zhao ◽  
Xia Zhang ◽  
P. Liu ◽  
F. Yang ◽  
C. Lin ◽  
...  

In this work we studied the fabrication of a monolithic bimaterial micro-cantilever resonant IR sensor with on-chip drive circuits. The effects of high temperature process and stress induced performance degradation were investigated. The post-CMOS MEMS (micro electro mechanical system) fabrication process of this IR sensor is the focus of this paper, starting from theoretical analysis and simulation, and then moving to experimental verification. The capacitive cantilever structure was fabricated by surface micromachining method, and drive circuits were prepared by standard CMOS process. While the stress introduced by MEMS films, such as the tensile silicon nitride which works as a contact etch stopper layer for MOSFETs and releasing stop layer for the MEMS structure, increases the electron mobility of NMOS, PMOS hole mobility decreases. Moreover, the NMOS threshold voltage (Vth) shifts, and transconductance (Gm) degrades. An additional step of selective removing silicon nitride capping layer and polysilicon layer upon IC area were inserted into the standard CMOS process to lower the stress in MOSFET channel regions. Selective removing silicon nitride and polysilicon before annealing can void 77% Vth shift and 86% Gm loss.


2021 ◽  
Vol 1797 (1) ◽  
pp. 012047
Author(s):  
Rinki Bhowmick ◽  
Mausumi Chattopadhyaya ◽  
Jit Chakraborty ◽  
Swarnendu Maity ◽  
Arnab Basu ◽  
...  

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