Application of Focus Ion Beam Circuit Edit in Failure Analysis

2006 ◽  
Author(s):  
S. K. Loh ◽  
HT Teo ◽  
S.P. Neo ◽  
Z.G. Song ◽  
C. K. Oh
Keyword(s):  
Failure Analysis ◽  
Ion Beam ◽  
Focus Ion Beam

A Study of SRAM Device Soft Failures Caused by Contact Volcano Defects Using Nanoprobing Analysis

2011 ◽  
Author(s):  
Yu Hsiang Shu ◽  
Vincent Huang ◽  
Chia Hsing Chao
Keyword(s):  
Failure Analysis ◽  
High Resistance ◽  
Ion Beam ◽  
Analysis Method ◽  
Root Cause ◽  
Parametric Data ◽  
Transmission Electron ◽  
Focus Ion Beam ◽  
Electrical Data

Abstract Using nanoprobing techniques to accomplish transistor parametric data has been reported as a method of failure analysis in nanometer scale defect. In this paper, we focus on how to identify the influence of Contact high resistance on device soft failures using nanoprobing analysis, and showing that the equivalent mathematical models could be used to describe the corresponding electrical data in a device with Contact high resistance issue. A case study was presented to verify that Contact volcano defect caused Contact high resistance issue, and this issue can be identified via physical failure analysis (PFA) method (e.g. Transmission Electron Microscope and Focus Ion Beam techniques) and nanoprobing analysis method. Finally, we would explain the physical root cause of Contact volcano issue.

Direct Plan View FIB Liftout for Near-Surface Defect Analysis in TEM

2013 ◽  
Author(s):  
Max L. Lifson ◽  
Carla M. Chapman ◽  
D. Philip Pokrinchak ◽  
Phyllis J. Campbell ◽  
Greg S. Chrisman ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Silicon Germanium ◽  
Focused Ion Beam ◽  
Surface Defects ◽  
Ion Beam ◽  
Misfit Dislocations ◽  
Tem Analysis ◽  
Plan View ◽  
Near Surface ◽  
Straightforward Method

Abstract Plan view TEM imaging is a powerful technique for failure analysis and semiconductor process characterization. Sample preparation for near-surface defects requires additional care, as the surface of the sample needs to be protected to avoid unintentionally induced damage. This paper demonstrates a straightforward method to create plan view samples in a dual beam focused ion beam (FIB) for TEM studies of near-surface defects, such as misfit dislocations in heteroepitaxial growths. Results show that misfit dislocations are easily imaged in bright-field TEM and STEM for silicon-germanium epitaxial growth. Since FIB tools are ubiquitous in semiconductor failure analysis labs today, the plan view method presented provides a quick to implement, fast, consistent, and straightforward method of generating samples for TEM analysis. While this technique has been optimized for near-surface defects, it can be used with any application requiring plan view TEM analysis.

Fast Turn-around Failure Analysis of Metal Interconnection Using FIB and LA ICP-MS

2010 ◽  
Author(s):  
Zixiao Pan ◽  
Wei Wei ◽  
Fuhe Li
Keyword(s):  
Failure Analysis ◽  
Inductively Coupled Plasma ◽  
Structural Damage ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Detection Sensitivity ◽  
Chemical Contamination ◽  
Inductively Coupled ◽  
Minimal Sample ◽  
Icp Ms

Abstract This paper introduces our effort in failure analysis of a 200 nm thick metal interconnection on a glass substrate and covered with a passivation layer. Structural damage in localized areas of the metal interconnections was observed with the aid of focused ion beam (FIB) cross-sectioning. Laser ablation inductively coupled plasma mass spectroscopy (LA ICP-MS) was then applied to the problematic areas on the interconnection for chemical survey. LA ICP-MS showed direct evidence of localized chemical contamination, which has likely led to corrosion (or over-etching) of the metal interconnection and the assembly failure. Due to the high detection sensitivity of LA ICP-MS and its compatibility with insulating material analysis, minimal sample preparation is required. As a result, the combination of FIB and LA ICP-MS enabled successful meso-scale failure analysis with fast turnaround and reasonable cost.

Logical-to-Physical Device Navigation using Place-and-Route Data as an Alternative to LVS

2006 ◽  
Author(s):  
Roger Nicholson
Keyword(s):  
Failure Analysis ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Traditional Methods ◽  
Navigation Data ◽  
Use Of Time ◽  
Place And Route ◽  
Physical Layout

Abstract Logical-to-physical device navigation for failure analysis is often used to drive physical probers and focused ion beam tools. Traditional methods of creating navigation data rely upon the use of time consuming Layout-versus-Schematic (LVS) based methods. By using existing place-and-route data, full cross-linked navigation between schematic and physical layout may be achieved in a fraction of the time that it takes for the LVS methods to be used. Place-and-route data offers significantly more information to the analyst than LVS based data.

Layout Overlay Techniques to Improve Failure Analysis

1998 ◽  
Author(s):  
Christian Burmer ◽  
Siegfried Görlich ◽  
Siegfried Pauthner
Keyword(s):  
Failure Analysis ◽  
Focused Ion Beam ◽  
New Technologies ◽  
Ion Beam ◽  
Image Correlation ◽  
Microelectronic Devices ◽  
Overlay Technique ◽  
Correlation Techniques ◽  
Navigation Software ◽  
Image Format

Abstract New layout overlay technique has been developed based on standard image correlation techniques to support failure analysis in modern microelectronic devices, which are critical to analyze because they are realized in new technologies using sub-ìm design rules, chemical mechanical polishing techniques (CMP) and autorouted design techniques. As the new technique is realized as an extension of a standard CAD-navigation software and as it makes use of standard image format "TIFF" for data input, which is available at all modern equipments for failure analysis, these technique can be applied to all modern failure analysis methods. Here examples are given for three areas of application: circuit modification using Focused Ion Beam (FIB), support of preparation for backside inspection and fault localization using emission microscopy.

Focused Ion Beam (FIB) Method for Reconditioning Worn Tungsten Atomic Force Probe (AFP) Tips

2005 ◽  
Author(s):  
Randal E. Mulder ◽  
Sam Subramanian ◽  
Tony Chrastecky
Keyword(s):  
Focused Ion Beam ◽  
Ion Beam ◽  
Minimal Amount ◽  
Atomic Force ◽  
Focus Ion Beam

Abstract Atomic force probing (AFP) uses very sharp tungsten tips (100nm in radius) which wear out rather quickly, even with the greater durability of tungsten as compared to silicon. This paper demonstrates how worn tips that no longer image and probe properly can be reconditioned using the focus ion beam (FIB) tool. The method works best for tips that are under approx. 750nm in diameter and are not bent. It works well for freshly manufactured tips that do not work properly due to mishandling or improper storage which allowed particulates/oxide to build up on the tip. The method also works well for fresh tips that have been worn down (or slightly bent) after several hours of scanning and probing. This method is straightforward and requires a minimal amount of time. Typically, four probe tips can be reconditioned in about 30 minutes on the FIB.

Solving the Voltage Contrast on Floating Substrate with Standard FA Toolset

2016 ◽  
Author(s):  
Julien Goxe ◽  
Béatrice Vanhuffel ◽  
Marie Castignolles ◽  
Thomas Zirilli
Keyword(s):  
Electron Microscope ◽  
Scanning Electron Microscope ◽  
Sample Preparation ◽  
Failure Analysis ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Silicon On Insulator ◽  
Mixed Signal ◽  
Voltage Contrast ◽  
Scanning Electron

Abstract Passive Voltage Contrast (PVC) in a Scanning Electron Microscope (SEM) or a Focused Ion Beam (FIB) is a key Failure Analysis (FA) technique to highlight a leaky gate. The introduction of Silicon On Insulator (SOI) substrate in our recent automotive analog mixed-signal technology highlighted a new challenge: the Bottom Oxide (BOX) layer, by isolating the Silicon Active Area from the bulk made PVC technique less effective in finding leaky MOSFET gates. A solution involving sample preparation performed with standard FA toolset is proposed to enhance PVC on SOI substrate.

High-Throughput, Site-Specific Sample Prep of Ultra-Thin TEM Lamella for Process Metrology and Failure Analysis

2012 ◽  
Author(s):  
Roger Alvis ◽  
Jeff Blackwood ◽  
Sang-Hoon Lee ◽  
Matthew Bray
Keyword(s):  
Sample Preparation ◽  
Failure Analysis ◽  
Process Monitoring ◽  
High Throughput ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Memory Devices ◽  
Site Specific ◽  
Critical Dimensions ◽  
Tem Lamella

Abstract Semiconductor devices with critical dimensions less than 20nm are now being manufactured in volume. A challenge facing the failure analysis and process-monitoring community is two-fold. The first challenge of TEM sample prep of such small devices is that the basic need to end-point on a feature-of-interest pushes the imaging limit of the instrument being used to prepare the lamella. The second challenge posed by advanced devices is to prepare an artifact-free lamella from non-planar devices such as finFETs as well as from structures incorporating ‘non-traditional’ materials. These challenges are presently overcome in many advanced logic and memory devices in the focused ion beam-based TEM sample preparation processes by inverting the specimen prior to thinning to electron transparency. This paper reports a highthroughput method for the routine preparation of artifact-free TEM lamella of 20nm thickness, or less.

Failure Modes, Reliability Analysis and Case Studies on the Integration of Copper and Low-K Technology

2004 ◽  
Author(s):  
Huixian Wu ◽  
James Cargo ◽  
Huixian Wu ◽  
Marvin White
Keyword(s):  
Failure Analysis ◽  
Case Studies ◽  
Cross Section ◽  
Focused Ion Beam ◽  
Failure Modes ◽  
Ion Beam ◽  
Copper Interconnects ◽  
Wet Chemical ◽  
Low K ◽  
Section Analysis

Abstract The integration of copper interconnects and low-K dielectrics will present novel failure modes and reliability issues to failure analysts. This paper discusses failure modes related to Cu/low-K technology. Here, physical failure analysis (FA) techniques including deprocessing and cross-section analysis have been developed. The deprocessing techniques include wet chemical etching, reactive ion etching, chemical mechanical polishing and a combination of these techniques. Case studies on different failure modes related to Cu/low k technology are discussed: copper voiding, copper extrusion; electromigration stress failure; dielectric cracks; delamination-interface adhesion; and FA on circuit-under-pad. For the cross-section analysis of copper/low-K samples, focused ion beam techniques have been developed. Scanning electron microscopy, EDX, and TEM analytical analysis have been used for failure analysis for Cu/low-K technology. Various failure modes and reliability issues have also been addressed.

Localization Techniques on a 0.15um CMOS Device: Charge Pump Failure Analysis

2002 ◽  
Author(s):  
Hui Pan ◽  
Thomas Gibson
Keyword(s):  
Failure Analysis ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Electrical Characterization ◽  
Charge Pump ◽  
Front Side ◽  
Pump Failure ◽  
Electrical Failure ◽  
Optical Proximity Correction ◽  
A Charge

Abstract In recent years, there have been many advances in the equipment and techniques used to isolate faults. There are many options available to the failure analyst. The available techniques fall into the categories of electrical, photonic, thermal and electron/ion beam [1]. Each technique has its advantages and its limitations. In this paper, we introduce a case of successful failure analysis using a combination of several fault localization techniques on a 0.15um CMOS device with seven layers of metal. It includes electrical failure mode characterization, front side photoemission, backside photoemission, Focused Ion Beam (FIB), Scanning Electron Microscope (SEM) and liquid crystal. Electrical characterization along with backside photoemission proved most useful in this case as a poly short problem was found to be causing a charge pump failure. A specific type of layout, often referred to as a hammerhead layout, and the use of Optical Proximity Correction (OPC) contributed to the poly level shorts.

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