A model for thermal fatigue of large area adhesive joints between materials with dissimilar thermal expansion

2002 ◽  
Author(s):  
A. Bjorneklett ◽  
T. Tuhus ◽  
H. Kristiansen
Keyword(s):  
Thermal Expansion ◽  
Thermal Fatigue ◽  
Adhesive Joints ◽  
Large Area

Thermal fatigue cracking of surface mount conductive adhesive joints

2004 ◽  
Vol 16 (1) ◽  
pp. 48-52 ◽  
Author(s):  
Zhimin Mo ◽  
Zonghe Lai ◽  
Shiming Li ◽  
Johan Liu
Keyword(s):  
Thermal Fatigue ◽  
Fatigue Cracking ◽  
Adhesive Joints ◽  
Conductive Adhesive ◽  
Surface Mount

Crystallization of Silicon Films on Glass: A Comparison of Methods

1982 ◽  
Vol 13 ◽  
Author(s):  
Ross A. Lemons ◽  
Martin A. Bosch ◽  
Dieter Herbst
Keyword(s):  
Thermal Expansion ◽  
Melting Temperature ◽  
Silicon Film ◽  
High Mobility ◽  
Silicon Films ◽  
Large Area ◽  
Glass Substrates ◽  
Fused Quartz ◽  
Before And After ◽  
High Bias

ABSTRACTThe lure of flat panel displays has stimulated much research on the crystallization of silicon films deposited on large-area transparent substrates. In most respects, fused quartz is ideal. It has high purity, thermal shock resistance, and a softening point above the silicon melting temperature. Unfortunately, fused quartz has such a small thermal expansion that the silicon film cracks as it cools. This problem has been attacked by patterning with islands or moats before and after crystallization, by capping, and by using silicate glass substrates that match the thermal expansion of silicon. The relative merits of these methods are compared. Melting of the silicon film to achieve high mobility has been accomplished by a variety of methods including lasers, electron beams, and strip heaters. For low melting temperature glasses, surface heating with a laser or electron beam is essential. Larger grains are obtained with the high bias temperature, strip heater techniques The low-angle grain boundaries characteristic of these films may be caused by constitutional undercooling. A model is developed to predict the boundary spacing as a function of scan rate and temperature gradient.

Carbon fiber reinforced tin-lead alloy as a low thermal expansion solder preform

1990 ◽  
Vol 5 (6) ◽  
pp. 1266-1270 ◽  
Author(s):  
C. T. Ho ◽  
D. D. L. Chung
Keyword(s):  
Tensile Strength ◽  
Thermal Expansion ◽  
Fatigue Life ◽  
Carbon Fibers ◽  
Thermal Fatigue ◽  
Solder Joints ◽  
Solder Matrix ◽  
Direction Parallel ◽  
Thermal Fatigue Life ◽  
Low Thermal Expansion

Tin-lead (40 wt. % Pb) solder-matrix composites containing 8–54 vol.% continuous unidirectional copper plated carbon fibers were fabricated by squeeze casting for use as low thermal expansion solder preforms. The low thermal expansion greatly increased the thermal fatigue life for solder joints between materials with low thermal expansion coefficients. For example, for 29 vol.% fibers, the thermal expansion coefficient was 8 ⊠ 10−6/°C (25–105°C) in the direction parallel to the fibers compared to a corresponding value of 24 ⊠ 10−6/°C for plain solder. The thermal fatigue life for cycling 2 cm long alumina-to-alumina solder joints between 25 and 100°C was increased from 98 to 183 cycles by using 29 vol.% carbon fibers in the composite solder. The fibers also increased the tensile modulus and tensile strength of the solder, but the ductility was decreased. The copper coating on the carbon fibers increased the tensile strength and ductility of the composite.

Study of Thermo-Mechanical Reliability of TSV for 8-Layer Stacked Multi Chip Package

2010 ◽  
Vol 2010 (DPC) ◽  
pp. 001697-001725
Author(s):  
Sung-Hoon Choa ◽  
Jin Young Choi ◽  
Cha Gyu Song ◽  
Haeng Soo Lee
Keyword(s):  
Thermal Expansion ◽  
Fatigue Life ◽  
Thermal Fatigue ◽  
Coefficient Of Thermal Expansion ◽  
Influential Factors ◽  
Design Parameters ◽  
Mechanical Reliability ◽  
Thermal Fatigue Life ◽  
The Impact ◽  
Underfill Material

Through silicon via (TSV) technology is becoming a hot topic for three dimensional integration in IC packaging industry. However, TSV technology raises several reliability concerns particularly caused by thermally induced stress. In this study, the thermo-mechanical reliability of copper TSV technology for the multi chip packaging was investigated using finite element method. For the multi chip package design, the 8-layer stacked chip packaging with TSV structure has been constructed as our test vehicle. The numerical analysis of stress/strain distribution and thermal fatigue life prediction were performed in order to study the impact of several design parameters such as via diameter, via pitch, die thickness, bonding pad geometry. The effects of various underfill materials which have different Young¡¯s modulus and coefficients of thermal expansion (CTEs) were also investigated. The DOE (design of experiment) analysis was performed to find the optimal design conditions for 8-layer multi chip package. The most influential factors for the stress reduction are TSV diameter and the coefficient of thermal expansion of underfill material. The larger via diameter and lower CTE showed the smaller stress distribution. On the other hand, thermal fatigue life increases with via diameter, and becomes maximum at via diameter of 20 um, then decrease with increasing via diameter. The presence of underfill material significantly increased the thermal fatigue life of TSV structure. The bonding pad design is also important for TSV durability. The smaller bonding pad showed less stress and higher thermal fatigue life. The characteristics of warpage for 8-layer multi chip package were also investigated.

Optimal Cooling of Cross-Ply Composite Laminates and Adhesive Joints

1982 ◽  
Vol 49 (4) ◽  
pp. 735-739 ◽  
Author(s):  
Y. Weitsman ◽  
B. D. Harper
Keyword(s):  
Thermal Expansion ◽  
Residual Stresses ◽  
Temperature Dependence ◽  
Composite Laminates ◽  
Thermal Stresses ◽  
Viscoelastic Behavior ◽  
Adhesive Joints ◽  
Analytical Scheme ◽  
Polymeric Resins

This paper concerns the optimal cooling of symmetric, balanced, cross-ply composite laminates and adhesive joints so as to minimize the residual thermal stresses upon termination of the cool-down process. The computations are based on a recently developed analytical scheme and employ up-to-date data on graphite/epoxy laminas. The calculations consider the thermoviscoelastic response of the polymeric resins and incorporate the temperature dependence of the coefficients of thermal expansion. It is shown that the viscoelastic behavior may contribute to a significant reduction of the residual stresses.

Method to Determine Maximum Allowable Sinterable Silver Interconnect Size

2016 ◽  
Vol 2016 (HiTEC) ◽  
pp. 000207-000215 ◽  
Author(s):  
A. A. Wereszczak ◽  
M. C. Modugno ◽  
S. B. Waters ◽  
D. J. DeVoto ◽  
P. P. Paret
Keyword(s):  
Silicon Carbide ◽  
Thermal Expansion ◽  
Room Temperature ◽  
Sintering Temperature ◽  
Coefficient Of Thermal Expansion ◽  
Bonding Temperature ◽  
Heat Sinks ◽  
Large Area ◽  
Electrical Conductivities ◽  
Sintered Silver

Abstract The use of sintered-silver for large-area interconnection is attractive for some large-area bonding applications in power electronics such as the bonding of metal-clad, electrically-insulating substrates to heat sinks. Arrays of different pad sizes and pad shapes have been considered for such large area bonding; however, rather than arbitrarily choosing their size, it is desirable to use the largest size possible where the onset of interconnect delamination does not occur. If that is achieved, then sintered-silver's high thermal and electrical conductivities can be fully taken advantage of. Toward achieving this, a simple and inexpensive proof test is described to identify the largest achievable interconnect size with sinterable silver. The method's objective is to purposely initiate failure or delamination. Copper and invar (a ferrous-nickel alloy whose coefficient of thermal expansion (CTE) is similar to that of silicon or silicon carbide) disks were used in this study and sinterable silver was used to bond them. As a consequence of the method's execution, delamination occurred in some samples during cooling from the 250°C sintering temperature to room temperature and bonding temperature and from thermal cycling in others. These occurrences and their interpretations highlight the method's utility, and the herein described results are used to speculate how sintered-silver bonding will work with other material combinations.

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