Thermal Design Guidelines for FC-BGA Package With Hot Spot Problem

Author(s):  
Eason Chen ◽  
Jeng Yuan Lai ◽  
Yu-Po Wang ◽  
C. S. Hsiao

With the evolving function integration and power consumption of high-end IC applications, thermal management has become one of the most important concerns of semiconductor designers. In particular, hot spot problem, in recent years, has turned into a popular topic in IC chip thermal management that it comes from the uneven power consumptions in various logical blocks and results in local high temperature that would increase IC chip failure risks. In this paper, thermal evaluations for hot spot impacts on Flip-Chip Ball Grid Array (FC-BGA) packages were presented using CFD modeling technique. The evaluation topics covered hot spot power density effects on substrate designs and heat sink module characterizations including passive heat sink and fan heat sink performance under various hot spot conditions. Finally, thermal suggestions were concluded for package designers to improve the substrate design in substrate via arrangements to effectively dissipate hot spot source. Also heat sink module performance was derived for different ratings of hot spots and external heat sink performance is obtained for the hot spot impact elimination.

Author(s):  
H. Y. Zhang ◽  
Xiao Yan ◽  
W. H. Zhu ◽  
Leon Lin

2.5-D package with through silicon vias (TSVs) on interposer has been envisioned as the most viable way in heterogeneous integration. In this work, several design approaches are considered in the thermal analysis and enhancements of a 2.5-D package with multi chips on through silicon interposer (TSI), which include overmolding materials, metal slug, lid attachment, pin fin heat sink and fan-driven heat sink cooling. The analysis models consist of two dummy flip chips on a silicon interposer to represent the logic die and memory die, respectively. Package submodels, especially the TSV ones, are analyzed with good modeling accuracy. Package thermal modeling indicates that the thermal conductivity of the epoxy overmolding has minimal effect on the thermal performance of copper slug package. Lid attachment further enhances the thermal performance through peripheral substrate attachment. Both designs largely rely on thermally conductive PCB (4L) to maximize power dissipation. Pin-fin heat sink, made of aluminum, can be mounted on the package top to further minimize thermal resistance and extend the power dissipation beyond 10W. For high power application, fan cooled heat sink is used to reduce excessive heat. Copper based aluminum heat sink can remove the heat of 120W from the bare-die package. Self heating due to high current density through the TSV is analyzed. The proposed analytical expression gives good prediction on the local TSV hot spot. It is demonstrated that a distributed TSV network design provides lower temperature rise, which shall have lower risk of failures and is preferred in practice.


Author(s):  
Wei-Shen Kuo ◽  
Mingzong Wang ◽  
Eason Chen ◽  
Jeng-Yuan Lai ◽  
Yu-Po Wang

With electronic package tends to be lighter, thinner and smaller, the stacking of the many chips in the 3-D stack packages become more and more popular package. However, the stacking of the multi-function chips in the 3-D stack packages will result in high thermal dissipation. Thermal management has turned into one of the most primary challenge of semiconductor designers. The new technology is required to remove the heat effectively. 3-D stacked package with Through Silicon Via (TSV) technology is developed for two chips in a package. Electrical connections in the silicon interposer are formed by TSV. The silicon interposer has better thermal conductivity than that without interposer, therefore the package thermal resistance is lower. In this paper, thermal evaluations on Flip-Chip Ball Grid Array (FC-BGA) packages were presented using CFD modeling technique. The evaluation topics covered impact of Through Silicon Via (TSV) and dummy bumps, various power consumption, die size and package size effects. Besides, the thermal performance of the package would be decided by thermal conductivity of under fill. Finally, thermal suggestions were concluded for designers to design in TSV arrangements to effectively dissipate hot source.


Author(s):  
John Mathew ◽  
Shankar Krishnan

Abstract Much effort in the area of electronics thermal management has focused on developing cooling solutions that cater to steady-state operation. However, electronic devices are increasingly being used in applications involving time-varying workloads. These include microprocessors (particularly those used in portable devices), power electronic devices such as IGBTs, and high-power semiconductor laser diode arrays. Transient thermal management solutions become essential to ensure the performance and reliability of such devices. In this review, emerging transient thermal management requirements are identified, and cooling solutions reported in the literature for such applications are presented with a focus on time scales of thermal response. Transient cooling techniques employing actively controlled two-phase microchannel heat sinks, phase change materials (PCM), heat pipes/vapor chambers, combined PCM-heat pipes/vapor chambers, and flash boiling systems are examined in detail. They are compared in terms of their thermal response times to ascertain their suitability for the thermal management of pulsed workloads associated with microprocessor chips, IGBTs, and high-power laser diode arrays. Thermal design guidelines for the selection of appropriate package level thermal resistance and capacitance combinations are also recommended.


1999 ◽  
Author(s):  
Tien-Yu Tom Lee

Abstract This paper demonstrates the advantage of applying Predictive Engineering in thermal assessment of a 279 I/Os, 6-layer, depopulated array flip chip PBGA package. Thermal simulation was conducted using a Computational Fluid Dynamics (CFD) tool to analyze the heat transfer and fluid flow in a free air environment. This study first described the modeling techniques on multilayer substrate, thermal vias, C5 ball, and PCB. For a flip chip package without any thermal enhancement, more than 90% of the total power was conducted from the front surface of the die through the solder ball interconnects to the substrate, then to the board. To enhance the thermal performance of the package, the heat transfer area from the backside of the die needs to increase dramatically. Several thermal enhancing techniques were examined. These methods included copper heat spreader with various thicknesses and with thermal pads, metallic lid, overmolded with and without heat spreader, and with heat sink. With an aluminum lid and a heat sink, it gave the best improvement; followed by a heat spreader with thermal pads. Both methods reduced thermal resistance by an average of 50%. Detailed analyses on heat flow projections are discussed.


1999 ◽  
Vol 121 (4) ◽  
pp. 222-230
Author(s):  
D. F. Baldwin ◽  
J. T. Beerensson

Direct chip attach (DCA) packaging technologies are finding increasing application in electronics manufacturing particularly in telecommunications and consumer electronics. In these systems, bare die are interconnected directly to a printed circuit board. The two primary forms of DCA included chip on board (COB) where the die are attached face up and wirebonded to the substrate and flip chip on board (FCOB) where bumped die are interconnected active face down directly to low-cost organic substrates. In the current work, thermal management of four direct chip attach technologies is investigated. Experimental measurements are conducted exploring the junction-to-ambient thermal resistance and thermal dissipation paths for COB interconnection and three FCOB interconnect technologies including solder attach, anisotropic adhesive attach, and isotropic adhesive attach. A first-order chip-scale thermal design model is developed for flip chip assemblies exhibiting good agreement with the experimental measurements.


2016 ◽  
Vol 20 (3) ◽  
pp. 899-902
Author(s):  
Kang-Jia Wang ◽  
Zhong-Liang Pan

Microchannel cooling is a promising technology for solving the three-dimensional integrated circuit thermal problems. However, the relationship between the microchannel cooling parameters and thermal behavior of the three dimensional integrated circuit is complex and difficult to understand. In this paper, we perform a detailed evaluation of the influence of the microchannel structure and the parameters of the cooling liquid on steady-state temperature profiles. The results presented in this paper are expected to aid in the development of thermal design guidelines for three dimensional integrated circuit with microchannel cooling.


2020 ◽  
Vol 5 (11) ◽  
pp. 1297-1300
Author(s):  
Mohamed Elnaggar ◽  
Mohammed Abu Hatab ◽  
Ezzaldeen Edwan

Electronics industry requires efficient design that can handle fast mathematical operations to compensate for the growing development and demand for processing power. These days, there are numerous equipment or parts inside machines called heating elements particularly with electrical or electronic devices and they should be cooled during the working process. However, with respect to their size, manufacturers are minifying day by day to satisfy requirements of users but the power should be maintained. Hence, elements withstand a high amount of heat and high heat flux (transition/mutability) is being generated during the working process. The main contribution of this study is to investigate thermal solutions using four cooling tools and to compare to each other and consider thermal design guidelines and factors as well. Furthermore, we review the appropriate thermal solutions for the produced heat from the electronic equipment and we present the effective and suitable tools which used to dissipate this heat. A heat sink, heat pipe, and vapor chamber are reviewed and compared depending on the previous studies that have implemented them.


Author(s):  
Poh-Seng Lee ◽  
Suresh V. Garimella

Recesses created in the lid of a microchannel heat sink can serve to modulate the flow, resulting in local and global heat transfer enhancement. Numerical analysis of laminar flow and heat transfer in such a modified microchannel heat sink has shown an augmentation of heat transfer without an added penalty of increased pressure drop. The presence of the recesses reduces the overall flow friction and thus pressure drop. The flow expansion into the recesses and the subsequent contraction into the downstream region causes significant local enhancement in heat transfer. Both the maximum and average wall temperatures are decreased as a result. The heat transfer is locally enhanced, by as much as 150% in the regions just downstream of the recesses due to the re-initialization of boundary layers as the flow re-enters the microchannels. The potential for hot-spot mitigation in microelectronics devices using this approach is discussed.


2018 ◽  
Vol 22 (4) ◽  
pp. 1685-1690 ◽  
Author(s):  
Kang-Jia Wang ◽  
Hong-Chang Sun ◽  
Cui-Ling Li ◽  
Guo-Dong Wang ◽  
Hong-Wei Zhu

Vertical integration for microelectronics possesses significant challenges due to its fast dissipation of heat generated in multiple device planes. This paper focuses on thermal management of a 3-D integrated circuit, and micro-channel cooling is adopted to deal with the 3-D integrated circuitthermal problems. In addition, thermal through-silicon vias are also used to improve the capacity of heat trans-mission. It is found that combination of microchannel cooling and thermal through-silicon vias can remarkably alleviate the hotspots. The results presented in this paper are expected to aid in the development of thermal design guidelines for 3-D integrated circuits.


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