A Low Offset Dynamic Comparator with Offset Elimination Circuit
2017 ◽
Vol 26
(07)
◽
pp. 1750115
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A new dynamic comparator with offset elimination circuit is proposed. The offset elimination circuit decreases the influence of the offset voltage effectively and increases the resolution of the comparator. The simulation results show that, if the pre-set offset voltage is 10[Formula: see text]mV, the offset elimination circuit can decrease to the enough low value, which meets the requirements of the system. The standard deviation of the offset voltage decreases from 7.27[Formula: see text]mV to 1.15[Formula: see text]mV with the utilization of the offset elimination circuit in Monte Carlo simulation.
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2013 ◽
Vol 22
(07)
◽
pp. 1350061
◽
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2021 ◽
Vol 48
(4)
◽
pp. 53-61
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